RTEMS 6.1-rc1
stm32h7xx_hal_spdifrx.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_SPDIFRX_H
21#define STM32H7xx_HAL_SPDIFRX_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
30
34#if defined (SPDIFRX)
35
40/* Exported types ------------------------------------------------------------*/
49typedef struct
50{
51 uint32_t InputSelection;
54 uint32_t Retries;
57 uint32_t WaitForActivity;
60 uint32_t ChannelSelection;
63 uint32_t DataFormat;
66 uint32_t StereoMode;
69 uint32_t PreambleTypeMask;
72 uint32_t ChannelStatusMask;
75 uint32_t ValidityBitMask;
78 uint32_t ParityErrorMask;
80 FunctionalState SymbolClockGen;
83 FunctionalState BackupSymbolClockGen;
85} SPDIFRX_InitTypeDef;
86
90typedef struct
91{
92 uint32_t DataFormat;
95 uint32_t StereoMode;
98 uint32_t PreambleTypeMask;
101 uint32_t ChannelStatusMask;
104 uint32_t ValidityBitMask;
107 uint32_t ParityErrorMask;
110} SPDIFRX_SetDataFormatTypeDef;
111
115typedef enum
116{
117 HAL_SPDIFRX_STATE_RESET = 0x00U,
118 HAL_SPDIFRX_STATE_READY = 0x01U,
119 HAL_SPDIFRX_STATE_BUSY = 0x02U,
120 HAL_SPDIFRX_STATE_BUSY_RX = 0x03U,
121 HAL_SPDIFRX_STATE_BUSY_CX = 0x04U,
122 HAL_SPDIFRX_STATE_ERROR = 0x07U
123} HAL_SPDIFRX_StateTypeDef;
124
128#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
129typedef struct __SPDIFRX_HandleTypeDef
130#else
131typedef struct
132#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
133{
134 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */
135
136 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */
137
138 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */
139
140 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */
141
142 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */
143
144 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter
145 (This field is initialized at the
146 same value as transfer size at the
147 beginning of the transfer and
148 decremented when a sample is received.
149 NbSamplesReceived = RxBufferSize-RxBufferCount) */
150
151 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */
152
153 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter
154 (This field is initialized at the
155 same value as transfer size at the
156 beginning of the transfer and
157 decremented when a sample is received.
158 NbSamplesReceived = RxBufferSize-RxBufferCount) */
159
160 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */
161
162 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */
163
164 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */
165
166 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */
167
168 __IO uint32_t ErrorCode; /* SPDIFRX Error code */
169
170#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
171 void (*RxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
172 void (*RxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
173 void (*CxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
174 void (*CxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
175 void (*ErrorCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
176 void (* MspInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
177 void (* MspDeInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
178#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
179
180} SPDIFRX_HandleTypeDef;
185#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
189typedef enum
190{
191 HAL_SPDIFRX_RX_HALF_CB_ID = 0x00U,
192 HAL_SPDIFRX_RX_CPLT_CB_ID = 0x01U,
193 HAL_SPDIFRX_CX_HALF_CB_ID = 0x02U,
194 HAL_SPDIFRX_CX_CPLT_CB_ID = 0x03U,
195 HAL_SPDIFRX_ERROR_CB_ID = 0x04U,
196 HAL_SPDIFRX_MSPINIT_CB_ID = 0x05U,
197 HAL_SPDIFRX_MSPDEINIT_CB_ID = 0x06U
198} HAL_SPDIFRX_CallbackIDTypeDef;
199
203typedef void (*pSPDIFRX_CallbackTypeDef)(SPDIFRX_HandleTypeDef *hspdif);
204#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
205
206/* Exported constants --------------------------------------------------------*/
215#define HAL_SPDIFRX_ERROR_NONE ((uint32_t)0x00000000U)
216#define HAL_SPDIFRX_ERROR_TIMEOUT ((uint32_t)0x00000001U)
217#define HAL_SPDIFRX_ERROR_OVR ((uint32_t)0x00000002U)
218#define HAL_SPDIFRX_ERROR_PE ((uint32_t)0x00000004U)
219#define HAL_SPDIFRX_ERROR_DMA ((uint32_t)0x00000008U)
220#define HAL_SPDIFRX_ERROR_UNKNOWN ((uint32_t)0x00000010U)
221#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
222#define HAL_SPDIFRX_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U)
223#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
232#define SPDIFRX_INPUT_IN0 ((uint32_t)0x00000000U)
233#define SPDIFRX_INPUT_IN1 ((uint32_t)0x00010000U)
234#define SPDIFRX_INPUT_IN2 ((uint32_t)0x00020000U)
235#define SPDIFRX_INPUT_IN3 ((uint32_t)0x00030000U)
244#define SPDIFRX_MAXRETRIES_NONE ((uint32_t)0x00000000U)
245#define SPDIFRX_MAXRETRIES_3 ((uint32_t)0x00001000U)
246#define SPDIFRX_MAXRETRIES_15 ((uint32_t)0x00002000U)
247#define SPDIFRX_MAXRETRIES_63 ((uint32_t)0x00003000U)
256#define SPDIFRX_WAITFORACTIVITY_OFF ((uint32_t)0x00000000U)
257#define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA)
266#define SPDIFRX_PREAMBLETYPEMASK_OFF ((uint32_t)0x00000000U)
267#define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK)
276#define SPDIFRX_CHANNELSTATUS_OFF ((uint32_t)0x00000000U) /* The channel status and user bits are copied into the SPDIF_DR */
277#define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/
286#define SPDIFRX_VALIDITYMASK_OFF ((uint32_t)0x00000000U)
287#define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK)
296#define SPDIFRX_PARITYERRORMASK_OFF ((uint32_t)0x00000000U)
297#define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK)
306#define SPDIFRX_CHANNEL_A ((uint32_t)0x00000000U)
307#define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL)
316#define SPDIFRX_DATAFORMAT_LSB ((uint32_t)0x00000000U)
317#define SPDIFRX_DATAFORMAT_MSB ((uint32_t)0x00000010U)
318#define SPDIFRX_DATAFORMAT_32BITS ((uint32_t)0x00000020U)
327#define SPDIFRX_STEREOMODE_DISABLE ((uint32_t)0x00000000U)
328#define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO)
338#define SPDIFRX_STATE_IDLE ((uint32_t)0xFFFFFFFCU)
339#define SPDIFRX_STATE_SYNC ((uint32_t)0x00000001U)
340#define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN)
349#define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE)
350#define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE)
351#define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE)
352#define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE)
353#define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE)
354#define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE)
355#define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE )
364#define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE)
365#define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE)
366#define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR)
367#define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR)
368#define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD)
369#define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD)
370#define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR)
371#define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR)
372#define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR)
381/* Exported macros -----------------------------------------------------------*/
391#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
392#define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) do{\
393 (__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET;\
394 (__HANDLE__)->MspInitCallback = NULL;\
395 (__HANDLE__)->MspDeInitCallback = NULL;\
396 }while(0)
397#else
398#define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET)
399#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
400
405#define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE)
406
411#define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC)
412
413
418#define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV)
419
420
434#define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
435#define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR\
436 &= (uint16_t)(~(__INTERRUPT__)))
437
451#define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR\
452 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
453
469#define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR)\
470 & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
471
483#define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__))
484
489/* Exported functions --------------------------------------------------------*/
497/* Initialization/de-initialization functions **********************************/
498HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif);
499HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif);
500void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif);
501void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif);
502HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat);
503
504/* Callbacks Register/UnRegister functions ***********************************/
505#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
506HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID,
507 pSPDIFRX_CallbackTypeDef pCallback);
508HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif,
509 HAL_SPDIFRX_CallbackIDTypeDef CallbackID);
510#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
518/* I/O operation functions ***************************************************/
519/* Blocking mode: Polling */
520HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
521 uint32_t Timeout);
522HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
523 uint32_t Timeout);
524
525/* Non-Blocking mode: Interrupt */
526HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
527HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
528void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif);
529
530/* Non-Blocking mode: DMA */
531HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
532HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
533HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif);
534
535/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
536void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
537void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
538void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif);
539void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
540void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
548/* Peripheral Control and State functions ************************************/
549HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const *const hspdif);
550uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const *const hspdif);
558/* Private types -------------------------------------------------------------*/
559/* Private variables ---------------------------------------------------------*/
560/* Private constants ---------------------------------------------------------*/
561/* Private macros ------------------------------------------------------------*/
566#define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \
567 ((INPUT) == SPDIFRX_INPUT_IN2) || \
568 ((INPUT) == SPDIFRX_INPUT_IN3) || \
569 ((INPUT) == SPDIFRX_INPUT_IN0))
570
571#define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \
572 ((RET) == SPDIFRX_MAXRETRIES_3) || \
573 ((RET) == SPDIFRX_MAXRETRIES_15) || \
574 ((RET) == SPDIFRX_MAXRETRIES_63))
575
576#define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \
577 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF))
578
579#define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \
580 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF))
581
582#define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \
583 ((VAL) == SPDIFRX_VALIDITYMASK_ON))
584
585#define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \
586 ((VAL) == SPDIFRX_PARITYERRORMASK_ON))
587
588#define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \
589 ((CHANNEL) == SPDIFRX_CHANNEL_B))
590
591#define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \
592 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \
593 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS))
594
595#define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \
596 ((MODE) == SPDIFRX_STEREOMODE_ENABLE))
597
598#define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \
599 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF))
600
601#define IS_SYMBOL_CLOCK_GEN(VAL) (((VAL) == ENABLE) || ((VAL) == DISABLE))
606/* Private functions ---------------------------------------------------------*/
618#endif /* SPDIFRX */
624#ifdef __cplusplus
625}
626#endif
627
628
629#endif /* STM32H7xx_HAL_SPDIFRX_H */
__IO
#define __IO
Definition: core_cm4.h:239
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
SPDIFRX_TypeDef
SPDIF-RX Interface.
Definition: stm32h723xx.h:1391
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32h7xx_hal_dma.h:138
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