RTEMS 6.1-rc1
stm32h7xx_hal_i2c.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_I2C_H
21#define STM32H7xx_HAL_I2C_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
38/* Exported types ------------------------------------------------------------*/
49typedef struct
50{
51 uint32_t Timing;
55 uint32_t OwnAddress1;
58 uint32_t AddressingMode;
61 uint32_t DualAddressMode;
64 uint32_t OwnAddress2;
67 uint32_t OwnAddress2Masks;
71 uint32_t GeneralCallMode;
74 uint32_t NoStretchMode;
77} I2C_InitTypeDef;
78
111typedef enum
112{
113 HAL_I2C_STATE_RESET = 0x00U,
114 HAL_I2C_STATE_READY = 0x20U,
115 HAL_I2C_STATE_BUSY = 0x24U,
116 HAL_I2C_STATE_BUSY_TX = 0x21U,
117 HAL_I2C_STATE_BUSY_RX = 0x22U,
118 HAL_I2C_STATE_LISTEN = 0x28U,
119 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U,
121 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU,
123 HAL_I2C_STATE_ABORT = 0x60U,
124 HAL_I2C_STATE_TIMEOUT = 0xA0U,
125 HAL_I2C_STATE_ERROR = 0xE0U
127} HAL_I2C_StateTypeDef;
128
152typedef enum
153{
154 HAL_I2C_MODE_NONE = 0x00U,
155 HAL_I2C_MODE_MASTER = 0x10U,
156 HAL_I2C_MODE_SLAVE = 0x20U,
157 HAL_I2C_MODE_MEM = 0x40U
159} HAL_I2C_ModeTypeDef;
160
170#define HAL_I2C_ERROR_NONE (0x00000000U)
171#define HAL_I2C_ERROR_BERR (0x00000001U)
172#define HAL_I2C_ERROR_ARLO (0x00000002U)
173#define HAL_I2C_ERROR_AF (0x00000004U)
174#define HAL_I2C_ERROR_OVR (0x00000008U)
175#define HAL_I2C_ERROR_DMA (0x00000010U)
176#define HAL_I2C_ERROR_TIMEOUT (0x00000020U)
177#define HAL_I2C_ERROR_SIZE (0x00000040U)
178#define HAL_I2C_ERROR_DMA_PARAM (0x00000080U)
179#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
180#define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U)
181#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
182#define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U)
192typedef struct __I2C_HandleTypeDef
193{
194 I2C_TypeDef *Instance;
196 I2C_InitTypeDef Init;
198 uint8_t *pBuffPtr;
200 uint16_t XferSize;
202 __IO uint16_t XferCount;
204 __IO uint32_t XferOptions;
207 __IO uint32_t PreviousState;
209 HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
212 DMA_HandleTypeDef *hdmatx;
214 DMA_HandleTypeDef *hdmarx;
216 HAL_LockTypeDef Lock;
218 __IO HAL_I2C_StateTypeDef State;
220 __IO HAL_I2C_ModeTypeDef Mode;
222 __IO uint32_t ErrorCode;
224 __IO uint32_t AddrEventCount;
226 __IO uint32_t Devaddress;
228 __IO uint32_t Memaddress;
230#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
231 void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
233 void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
235 void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
237 void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
239 void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
241 void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
243 void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
245 void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c);
247 void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c);
250 void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
253 void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c);
255 void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c);
258#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
259} I2C_HandleTypeDef;
260
261#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
265typedef enum
266{
267 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U,
268 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U,
269 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U,
270 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U,
271 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U,
272 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U,
273 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U,
274 HAL_I2C_ERROR_CB_ID = 0x07U,
275 HAL_I2C_ABORT_CB_ID = 0x08U,
277 HAL_I2C_MSPINIT_CB_ID = 0x09U,
278 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU
280} HAL_I2C_CallbackIDTypeDef;
281
285typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c);
287typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection,
288 uint16_t AddrMatchCode);
291#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
299/* Exported constants --------------------------------------------------------*/
300
310#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
311#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
312#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
313#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
314#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
315#define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)
316
317/* List of XferOptions in usage of :
318 * 1- Restart condition in all use cases (direction change or not)
319 */
320#define I2C_OTHER_FRAME (0x000000AAU)
321#define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U)
330#define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
331#define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
340#define I2C_DUALADDRESS_DISABLE (0x00000000U)
341#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
350#define I2C_OA2_NOMASK ((uint8_t)0x00U)
351#define I2C_OA2_MASK01 ((uint8_t)0x01U)
352#define I2C_OA2_MASK02 ((uint8_t)0x02U)
353#define I2C_OA2_MASK03 ((uint8_t)0x03U)
354#define I2C_OA2_MASK04 ((uint8_t)0x04U)
355#define I2C_OA2_MASK05 ((uint8_t)0x05U)
356#define I2C_OA2_MASK06 ((uint8_t)0x06U)
357#define I2C_OA2_MASK07 ((uint8_t)0x07U)
366#define I2C_GENERALCALL_DISABLE (0x00000000U)
367#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
376#define I2C_NOSTRETCH_DISABLE (0x00000000U)
377#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
386#define I2C_MEMADD_SIZE_8BIT (0x00000001U)
387#define I2C_MEMADD_SIZE_16BIT (0x00000002U)
396#define I2C_DIRECTION_TRANSMIT (0x00000000U)
397#define I2C_DIRECTION_RECEIVE (0x00000001U)
406#define I2C_RELOAD_MODE I2C_CR2_RELOAD
407#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
408#define I2C_SOFTEND_MODE (0x00000000U)
417#define I2C_NO_STARTSTOP (0x00000000U)
418#define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)
419#define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
420#define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
432#define I2C_IT_ERRI I2C_CR1_ERRIE
433#define I2C_IT_TCI I2C_CR1_TCIE
434#define I2C_IT_STOPI I2C_CR1_STOPIE
435#define I2C_IT_NACKI I2C_CR1_NACKIE
436#define I2C_IT_ADDRI I2C_CR1_ADDRIE
437#define I2C_IT_RXI I2C_CR1_RXIE
438#define I2C_IT_TXI I2C_CR1_TXIE
447#define I2C_FLAG_TXE I2C_ISR_TXE
448#define I2C_FLAG_TXIS I2C_ISR_TXIS
449#define I2C_FLAG_RXNE I2C_ISR_RXNE
450#define I2C_FLAG_ADDR I2C_ISR_ADDR
451#define I2C_FLAG_AF I2C_ISR_NACKF
452#define I2C_FLAG_STOPF I2C_ISR_STOPF
453#define I2C_FLAG_TC I2C_ISR_TC
454#define I2C_FLAG_TCR I2C_ISR_TCR
455#define I2C_FLAG_BERR I2C_ISR_BERR
456#define I2C_FLAG_ARLO I2C_ISR_ARLO
457#define I2C_FLAG_OVR I2C_ISR_OVR
458#define I2C_FLAG_PECERR I2C_ISR_PECERR
459#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
460#define I2C_FLAG_ALERT I2C_ISR_ALERT
461#define I2C_FLAG_BUSY I2C_ISR_BUSY
462#define I2C_FLAG_DIR I2C_ISR_DIR
471/* Exported macros -----------------------------------------------------------*/
472
482#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
483#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
484 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \
485 (__HANDLE__)->MspInitCallback = NULL; \
486 (__HANDLE__)->MspDeInitCallback = NULL; \
487 } while(0)
488#else
489#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
490#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
491
506#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
507
522#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
523
538#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \
539 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
540
564#define I2C_FLAG_MASK (0x0001FFFFU)
565#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \
566 (__FLAG__)) == (__FLAG__)) ? SET : RESET)
567
585#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? \
586 ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \
587 ((__HANDLE__)->Instance->ICR = (__FLAG__)))
588
593#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
594
599#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
600
605#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
610/* Include I2C HAL Extended module */
611#include "stm32h7xx_hal_i2c_ex.h"
612
613/* Exported functions --------------------------------------------------------*/
621/* Initialization and de-initialization functions******************************/
622HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
623HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
624void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
625void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
626
627/* Callbacks Register/UnRegister functions ***********************************/
628#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
629HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID,
630 pI2C_CallbackTypeDef pCallback);
631HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
632
633HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
634HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
635#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
643/* IO operation functions ****************************************************/
644/******* Blocking mode: Polling */
645HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
646 uint16_t Size, uint32_t Timeout);
647HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
648 uint16_t Size, uint32_t Timeout);
649HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
650 uint32_t Timeout);
651HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
652 uint32_t Timeout);
653HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
654 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
655HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
656 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
657HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials,
658 uint32_t Timeout);
659
660/******* Non-Blocking mode: Interrupt */
661HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
662 uint16_t Size);
663HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
664 uint16_t Size);
665HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
666HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
667HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
668 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
669HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
670 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
671
672HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
673 uint16_t Size, uint32_t XferOptions);
674HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
675 uint16_t Size, uint32_t XferOptions);
676HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
677 uint32_t XferOptions);
678HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
679 uint32_t XferOptions);
680HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
681HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
682HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
683
684/******* Non-Blocking mode: DMA */
685HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
686 uint16_t Size);
687HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
688 uint16_t Size);
689HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
690HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
691HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
692 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
693HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
694 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
695
696HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
697 uint16_t Size, uint32_t XferOptions);
698HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
699 uint16_t Size, uint32_t XferOptions);
700HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
701 uint32_t XferOptions);
702HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
703 uint32_t XferOptions);
711/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
712void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
713void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
714void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
715void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
716void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
717void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
718void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
719void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
720void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
721void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
722void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
723void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
731/* Peripheral State, Mode and Error functions *********************************/
732HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c);
733HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c);
734uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c);
735
744/* Private constants ---------------------------------------------------------*/
754/* Private macros ------------------------------------------------------------*/
760#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
761 ((MODE) == I2C_ADDRESSINGMODE_10BIT))
762
763#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
764 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
765
766#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
767 ((MASK) == I2C_OA2_MASK01) || \
768 ((MASK) == I2C_OA2_MASK02) || \
769 ((MASK) == I2C_OA2_MASK03) || \
770 ((MASK) == I2C_OA2_MASK04) || \
771 ((MASK) == I2C_OA2_MASK05) || \
772 ((MASK) == I2C_OA2_MASK06) || \
773 ((MASK) == I2C_OA2_MASK07))
774
775#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
776 ((CALL) == I2C_GENERALCALL_ENABLE))
777
778#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
779 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
780
781#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
782 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
783
784#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
785 ((MODE) == I2C_AUTOEND_MODE) || \
786 ((MODE) == I2C_SOFTEND_MODE))
787
788#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
789 ((REQUEST) == I2C_GENERATE_START_READ) || \
790 ((REQUEST) == I2C_GENERATE_START_WRITE) || \
791 ((REQUEST) == I2C_NO_STARTSTOP))
792
793#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
794 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
795 ((REQUEST) == I2C_NEXT_FRAME) || \
796 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
797 ((REQUEST) == I2C_LAST_FRAME) || \
798 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
799 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
800
801#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
802 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
803
804#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \
805 (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \
806 I2C_CR2_NBYTES | I2C_CR2_RELOAD | \
807 I2C_CR2_RD_WRN)))
808
809#define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) \
810 >> 16U))
811#define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) \
812 >> 16U))
813#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
814#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))
815#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))
816
817#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
818#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
819
820#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \
821 (uint16_t)(0xFF00U))) >> 8U)))
822#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
823
824#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? \
825 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
826 (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \
827 (~I2C_CR2_RD_WRN)) : \
828 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
829 (I2C_CR2_ADD10) | (I2C_CR2_START)) & \
830 (~I2C_CR2_RD_WRN)))
831
832#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \
833 ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
834#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
839/* Private Functions ---------------------------------------------------------*/
844/* Private functions are defined in stm32h7xx_hal_i2c.c file */
857#ifdef __cplusplus
858}
859#endif
860
861
862#endif /* STM32H7xx_HAL_I2C_H */
__IO
#define __IO
Definition: core_cm4.h:239
HAL_I2C_ModeTypeDef
HAL_I2C_ModeTypeDef
Definition: stm32h7xx_hal_i2c.h:153
HAL_I2C_MODE_MASTER
@ HAL_I2C_MODE_MASTER
Definition: stm32h7xx_hal_i2c.h:155
HAL_I2C_MODE_MEM
@ HAL_I2C_MODE_MEM
Definition: stm32h7xx_hal_i2c.h:157
HAL_I2C_MODE_SLAVE
@ HAL_I2C_MODE_SLAVE
Definition: stm32h7xx_hal_i2c.h:156
HAL_I2C_MODE_NONE
@ HAL_I2C_MODE_NONE
Definition: stm32h7xx_hal_i2c.h:154
HAL_I2C_StateTypeDef
HAL_I2C_StateTypeDef
Definition: stm32h7xx_hal_i2c.h:112
HAL_I2C_STATE_BUSY
@ HAL_I2C_STATE_BUSY
Definition: stm32h7xx_hal_i2c.h:115
HAL_I2C_STATE_LISTEN
@ HAL_I2C_STATE_LISTEN
Definition: stm32h7xx_hal_i2c.h:118
HAL_I2C_STATE_BUSY_TX_LISTEN
@ HAL_I2C_STATE_BUSY_TX_LISTEN
Definition: stm32h7xx_hal_i2c.h:119
HAL_I2C_STATE_ABORT
@ HAL_I2C_STATE_ABORT
Definition: stm32h7xx_hal_i2c.h:123
HAL_I2C_STATE_TIMEOUT
@ HAL_I2C_STATE_TIMEOUT
Definition: stm32h7xx_hal_i2c.h:124
HAL_I2C_STATE_BUSY_RX
@ HAL_I2C_STATE_BUSY_RX
Definition: stm32h7xx_hal_i2c.h:117
HAL_I2C_STATE_BUSY_RX_LISTEN
@ HAL_I2C_STATE_BUSY_RX_LISTEN
Definition: stm32h7xx_hal_i2c.h:121
HAL_I2C_STATE_RESET
@ HAL_I2C_STATE_RESET
Definition: stm32h7xx_hal_i2c.h:113
HAL_I2C_STATE_BUSY_TX
@ HAL_I2C_STATE_BUSY_TX
Definition: stm32h7xx_hal_i2c.h:116
HAL_I2C_STATE_READY
@ HAL_I2C_STATE_READY
Definition: stm32h7xx_hal_i2c.h:114
HAL_I2C_STATE_ERROR
@ HAL_I2C_STATE_ERROR
Definition: stm32h7xx_hal_i2c.h:125
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
stm32h7xx_hal_i2c_ex.h
Header file of I2C HAL Extended module.
I2C_InitTypeDef
Definition: stm32h7xx_hal_i2c.h:50
I2C_InitTypeDef::GeneralCallMode
uint32_t GeneralCallMode
Definition: stm32h7xx_hal_i2c.h:71
I2C_InitTypeDef::NoStretchMode
uint32_t NoStretchMode
Definition: stm32h7xx_hal_i2c.h:74
I2C_InitTypeDef::OwnAddress2Masks
uint32_t OwnAddress2Masks
Definition: stm32h7xx_hal_i2c.h:67
I2C_InitTypeDef::AddressingMode
uint32_t AddressingMode
Definition: stm32h7xx_hal_i2c.h:58
I2C_InitTypeDef::OwnAddress2
uint32_t OwnAddress2
Definition: stm32h7xx_hal_i2c.h:64
I2C_InitTypeDef::Timing
uint32_t Timing
Definition: stm32h7xx_hal_i2c.h:51
I2C_InitTypeDef::OwnAddress1
uint32_t OwnAddress1
Definition: stm32h7xx_hal_i2c.h:55
I2C_InitTypeDef::DualAddressMode
uint32_t DualAddressMode
Definition: stm32h7xx_hal_i2c.h:61
I2C_TypeDef
Inter-integrated Circuit Interface.
Definition: stm32h723xx.h:1133
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32h7xx_hal_dma.h:138
__I2C_HandleTypeDef
Definition: stm32h7xx_hal_i2c.h:193
__I2C_HandleTypeDef::PreviousState
__IO uint32_t PreviousState
Definition: stm32h7xx_hal_i2c.h:207
__I2C_HandleTypeDef::Instance
I2C_TypeDef * Instance
Definition: stm32h7xx_hal_i2c.h:194
__I2C_HandleTypeDef::XferSize
uint16_t XferSize
Definition: stm32h7xx_hal_i2c.h:200
__I2C_HandleTypeDef::XferISR
HAL_StatusTypeDef(* XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
Definition: stm32h7xx_hal_i2c.h:209
__I2C_HandleTypeDef::XferCount
__IO uint16_t XferCount
Definition: stm32h7xx_hal_i2c.h:202
__I2C_HandleTypeDef::State
__IO HAL_I2C_StateTypeDef State
Definition: stm32h7xx_hal_i2c.h:218
__I2C_HandleTypeDef::Memaddress
__IO uint32_t Memaddress
Definition: stm32h7xx_hal_i2c.h:228
__I2C_HandleTypeDef::hdmarx
DMA_HandleTypeDef * hdmarx
Definition: stm32h7xx_hal_i2c.h:214
__I2C_HandleTypeDef::XferOptions
__IO uint32_t XferOptions
Definition: stm32h7xx_hal_i2c.h:204
__I2C_HandleTypeDef::Devaddress
__IO uint32_t Devaddress
Definition: stm32h7xx_hal_i2c.h:226
__I2C_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
Definition: stm32h7xx_hal_i2c.h:222
__I2C_HandleTypeDef::Init
I2C_InitTypeDef Init
Definition: stm32h7xx_hal_i2c.h:196
__I2C_HandleTypeDef::Lock
HAL_LockTypeDef Lock
Definition: stm32h7xx_hal_i2c.h:216
__I2C_HandleTypeDef::Mode
__IO HAL_I2C_ModeTypeDef Mode
Definition: stm32h7xx_hal_i2c.h:220
__I2C_HandleTypeDef::AddrEventCount
__IO uint32_t AddrEventCount
Definition: stm32h7xx_hal_i2c.h:224
__I2C_HandleTypeDef::hdmatx
DMA_HandleTypeDef * hdmatx
Definition: stm32h7xx_hal_i2c.h:212
__I2C_HandleTypeDef::pBuffPtr
uint8_t * pBuffPtr
Definition: stm32h7xx_hal_i2c.h:198
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