RTEMS 6.1-rc1
stm32h7xx_hal_fmac.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_FMAC_H
21#define STM32H7xx_HAL_FMAC_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
30#if defined(FMAC)
39/* Exported types ------------------------------------------------------------*/
48typedef enum
49{
50 HAL_FMAC_STATE_RESET = 0x00U,
51 HAL_FMAC_STATE_READY = 0x20U,
52 HAL_FMAC_STATE_BUSY = 0x24U,
53 HAL_FMAC_STATE_BUSY_RD = 0x25U,
54 HAL_FMAC_STATE_BUSY_WR = 0x26U,
55 HAL_FMAC_STATE_TIMEOUT = 0xA0U,
56 HAL_FMAC_STATE_ERROR = 0xE0U
57} HAL_FMAC_StateTypeDef;
58
62#if (USE_HAL_FMAC_REGISTER_CALLBACKS == 1)
63typedef struct __FMAC_HandleTypeDef
64#else
65typedef struct
66#endif /* USE_HAL_FMAC_REGISTER_CALLBACKS */
67{
68 FMAC_TypeDef *Instance;
70 uint32_t FilterParam;
73 uint8_t InputAccess;
77 uint8_t OutputAccess;
81 int16_t *pInput;
83 uint16_t InputCurrentSize;
85 uint16_t *pInputSize;
89 int16_t *pOutput;
91 uint16_t OutputCurrentSize;
93 uint16_t *pOutputSize;
97 DMA_HandleTypeDef *hdmaIn;
99 DMA_HandleTypeDef *hdmaOut;
101 DMA_HandleTypeDef *hdmaPreload;
104#if (USE_HAL_FMAC_REGISTER_CALLBACKS == 1)
105 void (* ErrorCallback)(struct __FMAC_HandleTypeDef *hfmac);
107 void (* HalfGetDataCallback)(struct __FMAC_HandleTypeDef *hfmac);
109 void (* GetDataCallback)(struct __FMAC_HandleTypeDef *hfmac);
111 void (* HalfOutputDataReadyCallback)(struct __FMAC_HandleTypeDef *hfmac);
113 void (* OutputDataReadyCallback)(struct __FMAC_HandleTypeDef *hfmac);
115 void (* FilterConfigCallback)(struct __FMAC_HandleTypeDef *hfmac);
117 void (* FilterPreloadCallback)(struct __FMAC_HandleTypeDef *hfmac);
119 void (* MspInitCallback)(struct __FMAC_HandleTypeDef *hfmac);
121 void (* MspDeInitCallback)(struct __FMAC_HandleTypeDef *hfmac);
123#endif /* (USE_HAL_FMAC_REGISTER_CALLBACKS) */
124
125 HAL_LockTypeDef Lock;
127 __IO HAL_FMAC_StateTypeDef State;
130 __IO HAL_FMAC_StateTypeDef RdState;
133 __IO HAL_FMAC_StateTypeDef WrState;
136 __IO uint32_t ErrorCode;
139} FMAC_HandleTypeDef;
140
141#if (USE_HAL_FMAC_REGISTER_CALLBACKS == 1)
145typedef enum
146{
147 HAL_FMAC_ERROR_CB_ID = 0x00U,
148 HAL_FMAC_HALF_GET_DATA_CB_ID = 0x01U,
149 HAL_FMAC_GET_DATA_CB_ID = 0x02U,
150 HAL_FMAC_HALF_OUTPUT_DATA_READY_CB_ID = 0x03U,
151 HAL_FMAC_OUTPUT_DATA_READY_CB_ID = 0x04U,
152 HAL_FMAC_FILTER_CONFIG_CB_ID = 0x05U,
153 HAL_FMAC_FILTER_PRELOAD_CB_ID = 0x06U,
155 HAL_FMAC_MSPINIT_CB_ID = 0x07U,
156 HAL_FMAC_MSPDEINIT_CB_ID = 0x08U,
157} HAL_FMAC_CallbackIDTypeDef;
158
162typedef void (*pFMAC_CallbackTypeDef)(FMAC_HandleTypeDef *hfmac);
164#endif /* USE_HAL_FMAC_REGISTER_CALLBACKS */
165
169typedef struct
170{
171 uint8_t InputBaseAddress;
176 uint8_t InputBufferSize;
180 uint32_t InputThreshold;
185 uint8_t CoeffBaseAddress;
190 uint8_t CoeffBufferSize;
193 uint8_t OutputBaseAddress;
198 uint8_t OutputBufferSize;
202 uint32_t OutputThreshold;
207 int16_t *pCoeffA;
210 uint8_t CoeffASize;
212 int16_t *pCoeffB;
216 uint8_t CoeffBSize;
218 uint8_t InputAccess;
222 uint8_t OutputAccess;
226 uint32_t Clip;
231 uint32_t Filter;
235 uint8_t P;
237 uint8_t Q;
239 uint8_t R;
241} FMAC_FilterConfigTypeDef;
242
248/* Exported constants --------------------------------------------------------*/
249
250
260#define HAL_FMAC_ERROR_NONE 0x00000000U
261#define HAL_FMAC_ERROR_SAT 0x00000001U
262#define HAL_FMAC_ERROR_UNFL 0x00000002U
263#define HAL_FMAC_ERROR_OVFL 0x00000004U
264#define HAL_FMAC_ERROR_DMA 0x00000008U
265#define HAL_FMAC_ERROR_RESET 0x00000010U
266#define HAL_FMAC_ERROR_PARAM 0x00000020U
267#if (USE_HAL_FMAC_REGISTER_CALLBACKS == 1)
268#define HAL_FMAC_ERROR_INVALID_CALLBACK 0x00000040U
269#endif /* USE_HAL_FMAC_REGISTER_CALLBACKS */
270#define HAL_FMAC_ERROR_TIMEOUT 0x00000080U
280#define FMAC_FUNC_LOAD_X1 (FMAC_PARAM_FUNC_0)
281#define FMAC_FUNC_LOAD_X2 (FMAC_PARAM_FUNC_1)
282#define FMAC_FUNC_LOAD_Y (FMAC_PARAM_FUNC_1 | FMAC_PARAM_FUNC_0)
283#define FMAC_FUNC_CONVO_FIR (FMAC_PARAM_FUNC_3)
284#define FMAC_FUNC_IIR_DIRECT_FORM_1 (FMAC_PARAM_FUNC_3 | FMAC_PARAM_FUNC_0)
294#define FMAC_THRESHOLD_1 0x00000000U
298#define FMAC_THRESHOLD_2 0x01000000U
302#define FMAC_THRESHOLD_4 0x02000000U
306#define FMAC_THRESHOLD_8 0x03000000U
310#define FMAC_THRESHOLD_NO_VALUE 0xFFFFFFFFU
319#define FMAC_BUFFER_ACCESS_NONE 0x00U
320#define FMAC_BUFFER_ACCESS_DMA 0x01U
321#define FMAC_BUFFER_ACCESS_POLLING 0x02U
322#define FMAC_BUFFER_ACCESS_IT 0x03U
331#define FMAC_CLIP_DISABLED 0x00000000U
332#define FMAC_CLIP_ENABLED FMAC_CR_CLIPEN
341#define FMAC_FLAG_YEMPTY FMAC_SR_YEMPTY
342#define FMAC_FLAG_X1FULL FMAC_SR_X1FULL
343#define FMAC_FLAG_OVFL FMAC_SR_OVFL
344#define FMAC_FLAG_UNFL FMAC_SR_UNFL
345#define FMAC_FLAG_SAT FMAC_SR_SAT
355#define FMAC_IT_RIEN FMAC_CR_RIEN
356#define FMAC_IT_WIEN FMAC_CR_WIEN
357#define FMAC_IT_OVFLIEN FMAC_CR_OVFLIEN
358#define FMAC_IT_UNFLIEN FMAC_CR_UNFLIEN
359#define FMAC_IT_SATIEN FMAC_CR_SATIEN
370/* Exported variables --------------------------------------------------------*/
379/* Exported macros -----------------------------------------------------------*/
390#if (USE_HAL_FMAC_REGISTER_CALLBACKS == 1)
391#define __HAL_FMAC_RESET_HANDLE_STATE(__HANDLE__) do{ \
392 (__HANDLE__)->State = HAL_FMAC_STATE_RESET; \
393 (__HANDLE__)->MspInitCallback = NULL; \
394 (__HANDLE__)->MspDeInitCallback = NULL; \
395 } while(0U)
396#else
397#define __HAL_FMAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FMAC_STATE_RESET)
398#endif /* USE_HAL_FMAC_REGISTER_CALLBACKS */
399
412#define __HAL_FMAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
413 (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
414
427#define __HAL_FMAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
428 (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
429
442#define __HAL_FMAC_GET_IT(__HANDLE__, __INTERRUPT__) \
443 (((__HANDLE__)->Instance->SR) &= ~(__INTERRUPT__))
444
452#define __HAL_FMAC_CLEAR_IT(__HANDLE__, __INTERRUPT__) /* Dummy macro */
453
466#define __HAL_FMAC_GET_FLAG(__HANDLE__, __FLAG__) \
467 ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
468
476#define __HAL_FMAC_CLEAR_FLAG(__HANDLE__, __FLAG__) /* Dummy macro */
477
490#define __HAL_FMAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \
491 (((__HANDLE__)->Instance->CR) & (__INTERRUPT__))
492
497/* Private Macros-----------------------------------------------------------*/
507#define IS_FMAC_FUNCTION(__FUNCTION__) (((__FUNCTION__) == FMAC_FUNC_LOAD_X1) || \
508 ((__FUNCTION__) == FMAC_FUNC_LOAD_X2) || \
509 ((__FUNCTION__) == FMAC_FUNC_LOAD_Y) || \
510 ((__FUNCTION__) == FMAC_FUNC_CONVO_FIR) || \
511 ((__FUNCTION__) == FMAC_FUNC_IIR_DIRECT_FORM_1))
512
518#define IS_FMAC_LOAD_FUNCTION(__FUNCTION__) (((__FUNCTION__) == FMAC_FUNC_LOAD_X1) || \
519 ((__FUNCTION__) == FMAC_FUNC_LOAD_X2) || \
520 ((__FUNCTION__) == FMAC_FUNC_LOAD_Y))
521
527#define IS_FMAC_N_LOAD_FUNCTION(__FUNCTION__) (((__FUNCTION__) == FMAC_FUNC_LOAD_X1) || \
528 ((__FUNCTION__) == FMAC_FUNC_LOAD_Y))
529
535#define IS_FMAC_N_M_LOAD_FUNCTION(__FUNCTION__) ((__FUNCTION__) == FMAC_FUNC_LOAD_X2)
536
542#define IS_FMAC_FILTER_FUNCTION(__FUNCTION__) (((__FUNCTION__) == FMAC_FUNC_CONVO_FIR) || \
543 ((__FUNCTION__) == FMAC_FUNC_IIR_DIRECT_FORM_1))
544
545
551#define IS_FMAC_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == FMAC_THRESHOLD_1) || \
552 ((__THRESHOLD__) == FMAC_THRESHOLD_2) || \
553 ((__THRESHOLD__) == FMAC_THRESHOLD_4) || \
554 ((__THRESHOLD__) == FMAC_THRESHOLD_NO_VALUE) || \
555 ((__THRESHOLD__) == FMAC_THRESHOLD_8))
556
563#define IS_FMAC_PARAM_P(__FUNCTION__, __P__) ( (((__FUNCTION__) == FMAC_FUNC_CONVO_FIR) && \
564 (((__P__) >= 2U) && ((__P__) <= 127U))) || \
565 (((__FUNCTION__) == FMAC_FUNC_IIR_DIRECT_FORM_1) && \
566 (((__P__) >= 2U) && ((__P__) <= 64U))) )
567
574#define IS_FMAC_PARAM_Q(__FUNCTION__, __Q__) ( ((__FUNCTION__) == FMAC_FUNC_CONVO_FIR) || \
575 (((__FUNCTION__) == FMAC_FUNC_IIR_DIRECT_FORM_1) && \
576 (((__Q__) >= 1U) && ((__Q__) <= 63U))) )
577
584#define IS_FMAC_PARAM_R(__FUNCTION__, __R__) ( (((__FUNCTION__) == FMAC_FUNC_CONVO_FIR) || \
585 ((__FUNCTION__) == FMAC_FUNC_IIR_DIRECT_FORM_1)) && \
586 ((__R__) <= 7U))
587
593#define IS_FMAC_BUFFER_ACCESS(__BUFFER_ACCESS__) (((__BUFFER_ACCESS__) == FMAC_BUFFER_ACCESS_NONE) || \
594 ((__BUFFER_ACCESS__) == FMAC_BUFFER_ACCESS_DMA) || \
595 ((__BUFFER_ACCESS__) == FMAC_BUFFER_ACCESS_POLLING) || \
596 ((__BUFFER_ACCESS__) == FMAC_BUFFER_ACCESS_IT))
597
603#define IS_FMAC_CLIP_STATE(__CLIP_STATE__) (((__CLIP_STATE__) == FMAC_CLIP_DISABLED) || \
604 ((__CLIP_STATE__) == FMAC_CLIP_ENABLED))
605
613#define IS_FMAC_THRESHOLD_APPLICABLE(__SIZE__, __WM__, __ACCESS__) \
614 (( (__SIZE__) >= (((__WM__) == FMAC_THRESHOLD_1)? 1U: \
615 ((__WM__) == FMAC_THRESHOLD_2)? 2U: \
616 ((__WM__) == FMAC_THRESHOLD_4)? 4U:8U))&& \
617 ((((__ACCESS__) == FMAC_BUFFER_ACCESS_DMA)&& \
618 ((__WM__) == FMAC_THRESHOLD_1))|| \
619 ((__ACCESS__ )!= FMAC_BUFFER_ACCESS_DMA)))
620
625/* Exported functions ------------------------------------------------------- */
633/* Initialization and de-initialization functions ****************************/
634HAL_StatusTypeDef HAL_FMAC_Init(FMAC_HandleTypeDef *hfmac);
635HAL_StatusTypeDef HAL_FMAC_DeInit(FMAC_HandleTypeDef *hfmac);
636void HAL_FMAC_MspInit(FMAC_HandleTypeDef *hfmac);
637void HAL_FMAC_MspDeInit(FMAC_HandleTypeDef *hfmac);
638
639#if (USE_HAL_FMAC_REGISTER_CALLBACKS == 1)
640/* Callbacks Register/UnRegister functions ***********************************/
641HAL_StatusTypeDef HAL_FMAC_RegisterCallback(FMAC_HandleTypeDef *hfmac, HAL_FMAC_CallbackIDTypeDef CallbackID,
642 pFMAC_CallbackTypeDef pCallback);
643HAL_StatusTypeDef HAL_FMAC_UnRegisterCallback(FMAC_HandleTypeDef *hfmac, HAL_FMAC_CallbackIDTypeDef CallbackID);
644#endif /* USE_HAL_FMAC_REGISTER_CALLBACKS */
652/* Peripheral Control functions ***********************************************/
653HAL_StatusTypeDef HAL_FMAC_FilterConfig(FMAC_HandleTypeDef *hfmac, FMAC_FilterConfigTypeDef *pConfig);
654HAL_StatusTypeDef HAL_FMAC_FilterConfig_DMA(FMAC_HandleTypeDef *hfmac, FMAC_FilterConfigTypeDef *pConfig);
655HAL_StatusTypeDef HAL_FMAC_FilterPreload(FMAC_HandleTypeDef *hfmac, int16_t *pInput, uint8_t InputSize,
656 int16_t *pOutput, uint8_t OutputSize);
657HAL_StatusTypeDef HAL_FMAC_FilterPreload_DMA(FMAC_HandleTypeDef *hfmac, int16_t *pInput, uint8_t InputSize,
658 int16_t *pOutput, uint8_t OutputSize);
659HAL_StatusTypeDef HAL_FMAC_FilterStart(FMAC_HandleTypeDef *hfmac, int16_t *pOutput, uint16_t *pOutputSize);
660HAL_StatusTypeDef HAL_FMAC_AppendFilterData(FMAC_HandleTypeDef *hfmac, int16_t *pInput, uint16_t *pInputSize);
661HAL_StatusTypeDef HAL_FMAC_ConfigFilterOutputBuffer(FMAC_HandleTypeDef *hfmac, int16_t *pOutput, uint16_t *pOutputSize);
662HAL_StatusTypeDef HAL_FMAC_PollFilterData(FMAC_HandleTypeDef *hfmac, uint32_t Timeout);
663HAL_StatusTypeDef HAL_FMAC_FilterStop(FMAC_HandleTypeDef *hfmac);
671/* Callback functions *********************************************************/
672void HAL_FMAC_ErrorCallback(FMAC_HandleTypeDef *hfmac);
673void HAL_FMAC_HalfGetDataCallback(FMAC_HandleTypeDef *hfmac);
674void HAL_FMAC_GetDataCallback(FMAC_HandleTypeDef *hfmac);
675void HAL_FMAC_HalfOutputDataReadyCallback(FMAC_HandleTypeDef *hfmac);
676void HAL_FMAC_OutputDataReadyCallback(FMAC_HandleTypeDef *hfmac);
677void HAL_FMAC_FilterConfigCallback(FMAC_HandleTypeDef *hfmac);
678void HAL_FMAC_FilterPreloadCallback(FMAC_HandleTypeDef *hfmac);
686/* IRQ handler management *****************************************************/
687void HAL_FMAC_IRQHandler(FMAC_HandleTypeDef *hfmac);
695/* Peripheral State functions *************************************************/
696HAL_FMAC_StateTypeDef HAL_FMAC_GetState(FMAC_HandleTypeDef *hfmac);
697uint32_t HAL_FMAC_GetError(FMAC_HandleTypeDef *hfmac);
714#endif /* FMAC */
715
716#ifdef __cplusplus
717}
718#endif
719
720#endif /* STM32H7xx_HAL_FMAC_H */
#define __IO
Definition: core_cm4.h:239
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
Filter and Mathematical ACcelerator.
Definition: stm32h723xx.h:990
DMA handle Structure definition.
Definition: stm32h7xx_hal_dma.h:138