html/doxygen/stm32h7xx__hal__fdcan_8h_source.html

/* Define to prevent recursive inclusion -------------------------------------*/

#ifndef STM32H7xx_HAL_FDCAN_H

#define STM32H7xx_HAL_FDCAN_H


#ifdef __cplusplus

extern "C" {

#endif


/* Includes ------------------------------------------------------------------*/

#include "stm32h7xx_hal_def.h"


#if defined(FDCAN1)


/* Exported types ------------------------------------------------------------*/

typedef enum

{

  HAL_FDCAN_STATE_RESET      = 0x00U,

  HAL_FDCAN_STATE_READY      = 0x01U,

  HAL_FDCAN_STATE_BUSY       = 0x02U,

  HAL_FDCAN_STATE_ERROR      = 0x03U

} HAL_FDCAN_StateTypeDef;


typedef struct

{

  uint32_t FrameFormat;

  uint32_t Mode;

  FunctionalState AutoRetransmission;

  FunctionalState TransmitPause;

  FunctionalState ProtocolException;

  uint32_t NominalPrescaler;

  uint32_t NominalSyncJumpWidth;

  uint32_t NominalTimeSeg1;

  uint32_t NominalTimeSeg2;

  uint32_t DataPrescaler;

  uint32_t DataSyncJumpWidth;

  uint32_t DataTimeSeg1;

  uint32_t DataTimeSeg2;

  uint32_t MessageRAMOffset;

  uint32_t StdFiltersNbr;

  uint32_t ExtFiltersNbr;

  uint32_t RxFifo0ElmtsNbr;

  uint32_t RxFifo0ElmtSize;

  uint32_t RxFifo1ElmtsNbr;

  uint32_t RxFifo1ElmtSize;

  uint32_t RxBuffersNbr;

  uint32_t RxBufferSize;

  uint32_t TxEventsNbr;

  uint32_t TxBuffersNbr;

  uint32_t TxFifoQueueElmtsNbr;

  uint32_t TxFifoQueueMode;

  uint32_t TxElmtSize;

} FDCAN_InitTypeDef;


typedef struct

{

  uint32_t ClockCalibration;

  uint32_t ClockDivider;

  uint32_t MinOscClkPeriods;

  uint32_t CalFieldLength;

  uint32_t TimeQuantaPerBitTime;

  uint32_t WatchdogStartValue;

} FDCAN_ClkCalUnitTypeDef;


typedef struct

{

  uint32_t IdType;

  uint32_t FilterIndex;

  uint32_t FilterType;

  uint32_t FilterConfig;

  uint32_t FilterID1;

  uint32_t FilterID2;

  uint32_t RxBufferIndex;

  uint32_t IsCalibrationMsg;

} FDCAN_FilterTypeDef;


typedef struct

{

  uint32_t Identifier;

  uint32_t IdType;

  uint32_t TxFrameType;

  uint32_t DataLength;

  uint32_t ErrorStateIndicator;

  uint32_t BitRateSwitch;

  uint32_t FDFormat;

  uint32_t TxEventFifoControl;

  uint32_t MessageMarker;

} FDCAN_TxHeaderTypeDef;


typedef struct

{

  uint32_t Identifier;

  uint32_t IdType;

  uint32_t RxFrameType;

  uint32_t DataLength;

  uint32_t ErrorStateIndicator;

  uint32_t BitRateSwitch;

  uint32_t FDFormat;

  uint32_t RxTimestamp;

  uint32_t FilterIndex;

  uint32_t IsFilterMatchingFrame;

} FDCAN_RxHeaderTypeDef;


typedef struct

{

  uint32_t Identifier;

  uint32_t IdType;

  uint32_t TxFrameType;

  uint32_t DataLength;

  uint32_t ErrorStateIndicator;

  uint32_t BitRateSwitch;

  uint32_t FDFormat;

  uint32_t TxTimestamp;

  uint32_t MessageMarker;

  uint32_t EventType;

} FDCAN_TxEventFifoTypeDef;


typedef struct

{

  uint32_t FilterList;

  uint32_t FilterIndex;

  uint32_t MessageStorage;

  uint32_t MessageIndex;

} FDCAN_HpMsgStatusTypeDef;


typedef struct

{

  uint32_t LastErrorCode;

  uint32_t DataLastErrorCode;

  uint32_t Activity;

  uint32_t ErrorPassive;

  uint32_t Warning;

  uint32_t BusOff;

  uint32_t RxESIflag;

  uint32_t RxBRSflag;

  uint32_t RxFDFflag;

  uint32_t ProtocolException;

  uint32_t TDCvalue;

} FDCAN_ProtocolStatusTypeDef;


typedef struct

{

  uint32_t TxErrorCnt;

  uint32_t RxErrorCnt;

  uint32_t RxErrorPassive;

  uint32_t ErrorLogging;

} FDCAN_ErrorCountersTypeDef;


typedef struct

{

  uint32_t OperationMode;

  uint32_t GapEnable;

  uint32_t TimeMaster;

  uint32_t SyncDevLimit;

  uint32_t InitRefTrigOffset;

  uint32_t ExternalClkSync;

  uint32_t AppWdgLimit;

  uint32_t GlobalTimeFilter;

  uint32_t ClockCalibration;

  uint32_t EvtTrigPolarity;

  uint32_t BasicCyclesNbr;

  uint32_t CycleStartSync;

  uint32_t TxEnableWindow;

  uint32_t ExpTxTrigNbr;

  uint32_t TURNumerator;

  uint32_t TURDenominator;

  uint32_t TriggerMemoryNbr;

  uint32_t StopWatchTrigSel;

  uint32_t EventTrigSel;

} FDCAN_TT_ConfigTypeDef;


typedef struct

{

  uint32_t TriggerIndex;

  uint32_t TimeMark;

  uint32_t RepeatFactor;

  uint32_t StartCycle;

  uint32_t TmEventInt;

  uint32_t TmEventExt;

  uint32_t TriggerType;

  uint32_t FilterType;

  uint32_t TxBufferIndex;

  uint32_t FilterIndex;

} FDCAN_TriggerTypeDef;


typedef struct

{

  uint32_t ErrorLevel;

  uint32_t MasterState;

  uint32_t SyncState;

  uint32_t GTimeQuality;

  uint32_t ClockQuality;

  uint32_t RefTrigOffset;

  uint32_t GTimeDiscPending;

  uint32_t GapFinished;

  uint32_t MasterPriority;

  uint32_t GapStarted;

  uint32_t WaitForEvt;

  uint32_t AppWdgEvt;

  uint32_t ECSPending;

  uint32_t PhaseLock;

} FDCAN_TTOperationStatusTypeDef;


typedef struct

{

  uint32_t StandardFilterSA;

  uint32_t ExtendedFilterSA;

  uint32_t RxFIFO0SA;

  uint32_t RxFIFO1SA;

  uint32_t RxBufferSA;

  uint32_t TxEventFIFOSA;

  uint32_t TxBufferSA;

  uint32_t TxFIFOQSA;

  uint32_t TTMemorySA;

  uint32_t EndAddress;

} FDCAN_MsgRamAddressTypeDef;


#if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1

typedef struct __FDCAN_HandleTypeDef

#else

typedef struct

#endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */

{

  FDCAN_GlobalTypeDef         *Instance;

  TTCAN_TypeDef               *ttcan;

  FDCAN_InitTypeDef           Init;

  FDCAN_MsgRamAddressTypeDef  msgRam;

  uint32_t                    LatestTxFifoQRequest;

  __IO HAL_FDCAN_StateTypeDef State;

  HAL_LockTypeDef             Lock;

  __IO uint32_t               ErrorCode;

#if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1

  void (* ClockCalibrationCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t ClkCalibrationITs);

  void (* TxEventFifoCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t TxEventFifoITs);

  void (* RxFifo0Callback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs);

  void (* RxFifo1Callback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo1ITs);

  void (* TxFifoEmptyCallback)(struct __FDCAN_HandleTypeDef *hfdcan);

  void (* TxBufferCompleteCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes);

  void (* TxBufferAbortCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes);

  void (* RxBufferNewMessageCallback)(struct __FDCAN_HandleTypeDef *hfdcan);

  void (* HighPriorityMessageCallback)(struct __FDCAN_HandleTypeDef *hfdcan);

  void (* TimestampWraparoundCallback)(struct __FDCAN_HandleTypeDef *hfdcan);

  void (* TimeoutOccurredCallback)(struct __FDCAN_HandleTypeDef *hfdcan);

  void (* ErrorCallback)(struct __FDCAN_HandleTypeDef *hfdcan);

  void (* ErrorStatusCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t ErrorStatusITs);

  void (* TT_ScheduleSyncCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t TTSchedSyncITs);

  void (* TT_TimeMarkCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t TTTimeMarkITs);

  void (* TT_StopWatchCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t SWTime, uint32_t SWCycleCount);

  void (* TT_GlobalTimeCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t TTGlobTimeITs);

  void (* MspInitCallback)(struct __FDCAN_HandleTypeDef *hfdcan);

  void (* MspDeInitCallback)(struct __FDCAN_HandleTypeDef *hfdcan);

#endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */


} FDCAN_HandleTypeDef;


#if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1

typedef enum

{

  HAL_FDCAN_TX_FIFO_EMPTY_CB_ID        = 0x00U,

  HAL_FDCAN_RX_BUFFER_NEW_MSG_CB_ID    = 0x01U,

  HAL_FDCAN_HIGH_PRIO_MESSAGE_CB_ID    = 0x02U,

  HAL_FDCAN_TIMESTAMP_WRAPAROUND_CB_ID = 0x03U,

  HAL_FDCAN_TIMEOUT_OCCURRED_CB_ID     = 0x04U,

  HAL_FDCAN_ERROR_CALLBACK_CB_ID       = 0x05U,

  HAL_FDCAN_MSPINIT_CB_ID              = 0x06U,

  HAL_FDCAN_MSPDEINIT_CB_ID            = 0x07U,

} HAL_FDCAN_CallbackIDTypeDef;


typedef  void (*pFDCAN_CallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan);

typedef  void (*pFDCAN_ClockCalibrationCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t ClkCalibrationITs);

typedef  void (*pFDCAN_TxEventFifoCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t TxEventFifoITs);

typedef  void (*pFDCAN_RxFifo0CallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs);

typedef  void (*pFDCAN_RxFifo1CallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo1ITs);

typedef  void (*pFDCAN_TxBufferCompleteCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes);

typedef  void (*pFDCAN_TxBufferAbortCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes);

typedef  void (*pFDCAN_ErrorStatusCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t ErrorStatusITs);

typedef  void (*pFDCAN_TT_ScheduleSyncCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t TTSchedSyncITs);

typedef  void (*pFDCAN_TT_TimeMarkCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t TTTimeMarkITs);

typedef  void (*pFDCAN_TT_StopWatchCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t SWTime, uint32_t SWCycleCount);

typedef  void (*pFDCAN_TT_GlobalTimeCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t TTGlobTimeITs);

#endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */


/* Exported constants --------------------------------------------------------*/

#define HAL_FDCAN_ERROR_NONE            ((uint32_t)0x00000000U)

#define HAL_FDCAN_ERROR_TIMEOUT         ((uint32_t)0x00000001U)

#define HAL_FDCAN_ERROR_NOT_INITIALIZED ((uint32_t)0x00000002U)

#define HAL_FDCAN_ERROR_NOT_READY       ((uint32_t)0x00000004U)

#define HAL_FDCAN_ERROR_NOT_STARTED     ((uint32_t)0x00000008U)

#define HAL_FDCAN_ERROR_NOT_SUPPORTED   ((uint32_t)0x00000010U)

#define HAL_FDCAN_ERROR_PARAM           ((uint32_t)0x00000020U)

#define HAL_FDCAN_ERROR_PENDING         ((uint32_t)0x00000040U)

#define HAL_FDCAN_ERROR_RAM_ACCESS      ((uint32_t)0x00000080U)

#define HAL_FDCAN_ERROR_FIFO_EMPTY      ((uint32_t)0x00000100U)

#define HAL_FDCAN_ERROR_FIFO_FULL       ((uint32_t)0x00000200U)

#define HAL_FDCAN_ERROR_LOG_OVERFLOW    FDCAN_IR_ELO

#define HAL_FDCAN_ERROR_RAM_WDG         FDCAN_IR_WDI

#define HAL_FDCAN_ERROR_PROTOCOL_ARBT   FDCAN_IR_PEA

#define HAL_FDCAN_ERROR_PROTOCOL_DATA   FDCAN_IR_PED

#define HAL_FDCAN_ERROR_RESERVED_AREA   FDCAN_IR_ARA

#define HAL_FDCAN_ERROR_TT_GLOBAL_TIME  FDCAN_TTIR_GTE

#define HAL_FDCAN_ERROR_TT_TX_UNDERFLOW FDCAN_TTIR_TXU

#define HAL_FDCAN_ERROR_TT_TX_OVERFLOW  FDCAN_TTIR_TXO

#define HAL_FDCAN_ERROR_TT_SCHEDULE1    FDCAN_TTIR_SE1

#define HAL_FDCAN_ERROR_TT_SCHEDULE2    FDCAN_TTIR_SE2

#define HAL_FDCAN_ERROR_TT_NO_INIT_REF  FDCAN_TTIR_IWT

#define HAL_FDCAN_ERROR_TT_NO_REF       FDCAN_TTIR_WT

#define HAL_FDCAN_ERROR_TT_APPL_WDG     FDCAN_TTIR_AW

#define HAL_FDCAN_ERROR_TT_CONFIG       FDCAN_TTIR_CER

#if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1

#define HAL_FDCAN_ERROR_INVALID_CALLBACK ((uint32_t)0x00000100U)

#endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */

#define FDCAN_FRAME_CLASSIC   ((uint32_t)0x00000000U)

#define FDCAN_FRAME_FD_NO_BRS ((uint32_t)FDCAN_CCCR_FDOE)

#define FDCAN_FRAME_FD_BRS    ((uint32_t)(FDCAN_CCCR_FDOE | FDCAN_CCCR_BRSE))

#define FDCAN_MODE_NORMAL               ((uint32_t)0x00000000U)

#define FDCAN_MODE_RESTRICTED_OPERATION ((uint32_t)0x00000001U)

#define FDCAN_MODE_BUS_MONITORING       ((uint32_t)0x00000002U)

#define FDCAN_MODE_INTERNAL_LOOPBACK    ((uint32_t)0x00000003U)

#define FDCAN_MODE_EXTERNAL_LOOPBACK    ((uint32_t)0x00000004U)

#define FDCAN_CLOCK_CALIBRATION_DISABLE ((uint32_t)0x00000000U)

#define FDCAN_CLOCK_CALIBRATION_ENABLE  ((uint32_t)0x00000001U)

#define FDCAN_CLOCK_DIV1  ((uint32_t)0x00000000U)

#define FDCAN_CLOCK_DIV2  ((uint32_t)0x00010000U)

#define FDCAN_CLOCK_DIV4  ((uint32_t)0x00020000U)

#define FDCAN_CLOCK_DIV6  ((uint32_t)0x00030000U)

#define FDCAN_CLOCK_DIV8  ((uint32_t)0x00040000U)

#define FDCAN_CLOCK_DIV10 ((uint32_t)0x00050000U)

#define FDCAN_CLOCK_DIV12 ((uint32_t)0x00060000U)

#define FDCAN_CLOCK_DIV14 ((uint32_t)0x00070000U)

#define FDCAN_CLOCK_DIV16 ((uint32_t)0x00080000U)

#define FDCAN_CLOCK_DIV18 ((uint32_t)0x00090000U)

#define FDCAN_CLOCK_DIV20 ((uint32_t)0x000A0000U)

#define FDCAN_CLOCK_DIV22 ((uint32_t)0x000B0000U)

#define FDCAN_CLOCK_DIV24 ((uint32_t)0x000C0000U)

#define FDCAN_CLOCK_DIV26 ((uint32_t)0x000D0000U)

#define FDCAN_CLOCK_DIV28 ((uint32_t)0x000E0000U)

#define FDCAN_CLOCK_DIV30 ((uint32_t)0x000F0000U)

#define FDCAN_CALIB_FIELD_LENGTH_32 ((uint32_t)0x00000000U)

#define FDCAN_CALIB_FIELD_LENGTH_64 ((uint32_t)FDCANCCU_CCFG_CFL)

#define FDCAN_CLOCK_NOT_CALIBRATED       ((uint32_t)0x00000000U)

#define FDCAN_CLOCK_BASIC_CALIBRATED     ((uint32_t)0x40000000U)

#define FDCAN_CLOCK_PRECISION_CALIBRATED ((uint32_t)0x80000000U)

#define FDCAN_CALIB_TIME_QUANTA_COUNTER  ((uint32_t)0x00000000U)

#define FDCAN_CALIB_CLOCK_PERIOD_COUNTER ((uint32_t)0x00000001U)

#define FDCAN_CALIB_WATCHDOG_COUNTER     ((uint32_t)0x00000002U)

#define FDCAN_DATA_BYTES_8  ((uint32_t)0x00000004U)

#define FDCAN_DATA_BYTES_12 ((uint32_t)0x00000005U)

#define FDCAN_DATA_BYTES_16 ((uint32_t)0x00000006U)

#define FDCAN_DATA_BYTES_20 ((uint32_t)0x00000007U)

#define FDCAN_DATA_BYTES_24 ((uint32_t)0x00000008U)

#define FDCAN_DATA_BYTES_32 ((uint32_t)0x0000000AU)

#define FDCAN_DATA_BYTES_48 ((uint32_t)0x0000000EU)

#define FDCAN_DATA_BYTES_64 ((uint32_t)0x00000012U)

#define FDCAN_TX_FIFO_OPERATION  ((uint32_t)0x00000000U)

#define FDCAN_TX_QUEUE_OPERATION ((uint32_t)FDCAN_TXBC_TFQM)

#define FDCAN_STANDARD_ID ((uint32_t)0x00000000U)

#define FDCAN_EXTENDED_ID ((uint32_t)0x40000000U)

#define FDCAN_DATA_FRAME   ((uint32_t)0x00000000U)

#define FDCAN_REMOTE_FRAME ((uint32_t)0x20000000U)

#define FDCAN_DLC_BYTES_0  ((uint32_t)0x00000000U)

#define FDCAN_DLC_BYTES_1  ((uint32_t)0x00010000U)

#define FDCAN_DLC_BYTES_2  ((uint32_t)0x00020000U)

#define FDCAN_DLC_BYTES_3  ((uint32_t)0x00030000U)

#define FDCAN_DLC_BYTES_4  ((uint32_t)0x00040000U)

#define FDCAN_DLC_BYTES_5  ((uint32_t)0x00050000U)

#define FDCAN_DLC_BYTES_6  ((uint32_t)0x00060000U)

#define FDCAN_DLC_BYTES_7  ((uint32_t)0x00070000U)

#define FDCAN_DLC_BYTES_8  ((uint32_t)0x00080000U)

#define FDCAN_DLC_BYTES_12 ((uint32_t)0x00090000U)

#define FDCAN_DLC_BYTES_16 ((uint32_t)0x000A0000U)

#define FDCAN_DLC_BYTES_20 ((uint32_t)0x000B0000U)

#define FDCAN_DLC_BYTES_24 ((uint32_t)0x000C0000U)

#define FDCAN_DLC_BYTES_32 ((uint32_t)0x000D0000U)

#define FDCAN_DLC_BYTES_48 ((uint32_t)0x000E0000U)

#define FDCAN_DLC_BYTES_64 ((uint32_t)0x000F0000U)

#define FDCAN_ESI_ACTIVE  ((uint32_t)0x00000000U)

#define FDCAN_ESI_PASSIVE ((uint32_t)0x80000000U)

#define FDCAN_BRS_OFF ((uint32_t)0x00000000U)

#define FDCAN_BRS_ON  ((uint32_t)0x00100000U)

#define FDCAN_CLASSIC_CAN ((uint32_t)0x00000000U)

#define FDCAN_FD_CAN      ((uint32_t)0x00200000U)

#define FDCAN_NO_TX_EVENTS    ((uint32_t)0x00000000U)

#define FDCAN_STORE_TX_EVENTS ((uint32_t)0x00800000U)

#define FDCAN_FILTER_RANGE         ((uint32_t)0x00000000U)

#define FDCAN_FILTER_DUAL          ((uint32_t)0x00000001U)

#define FDCAN_FILTER_MASK          ((uint32_t)0x00000002U)

#define FDCAN_FILTER_RANGE_NO_EIDM ((uint32_t)0x00000003U)

#define FDCAN_FILTER_DISABLE       ((uint32_t)0x00000000U)

#define FDCAN_FILTER_TO_RXFIFO0    ((uint32_t)0x00000001U)

#define FDCAN_FILTER_TO_RXFIFO1    ((uint32_t)0x00000002U)

#define FDCAN_FILTER_REJECT        ((uint32_t)0x00000003U)

#define FDCAN_FILTER_HP            ((uint32_t)0x00000004U)

#define FDCAN_FILTER_TO_RXFIFO0_HP ((uint32_t)0x00000005U)

#define FDCAN_FILTER_TO_RXFIFO1_HP ((uint32_t)0x00000006U)

#define FDCAN_FILTER_TO_RXBUFFER   ((uint32_t)0x00000007U)

#define FDCAN_TX_BUFFER0  ((uint32_t)0x00000001U)

#define FDCAN_TX_BUFFER1  ((uint32_t)0x00000002U)

#define FDCAN_TX_BUFFER2  ((uint32_t)0x00000004U)

#define FDCAN_TX_BUFFER3  ((uint32_t)0x00000008U)

#define FDCAN_TX_BUFFER4  ((uint32_t)0x00000010U)

#define FDCAN_TX_BUFFER5  ((uint32_t)0x00000020U)

#define FDCAN_TX_BUFFER6  ((uint32_t)0x00000040U)

#define FDCAN_TX_BUFFER7  ((uint32_t)0x00000080U)

#define FDCAN_TX_BUFFER8  ((uint32_t)0x00000100U)

#define FDCAN_TX_BUFFER9  ((uint32_t)0x00000200U)

#define FDCAN_TX_BUFFER10 ((uint32_t)0x00000400U)

#define FDCAN_TX_BUFFER11 ((uint32_t)0x00000800U)

#define FDCAN_TX_BUFFER12 ((uint32_t)0x00001000U)

#define FDCAN_TX_BUFFER13 ((uint32_t)0x00002000U)

#define FDCAN_TX_BUFFER14 ((uint32_t)0x00004000U)

#define FDCAN_TX_BUFFER15 ((uint32_t)0x00008000U)

#define FDCAN_TX_BUFFER16 ((uint32_t)0x00010000U)

#define FDCAN_TX_BUFFER17 ((uint32_t)0x00020000U)

#define FDCAN_TX_BUFFER18 ((uint32_t)0x00040000U)

#define FDCAN_TX_BUFFER19 ((uint32_t)0x00080000U)

#define FDCAN_TX_BUFFER20 ((uint32_t)0x00100000U)

#define FDCAN_TX_BUFFER21 ((uint32_t)0x00200000U)

#define FDCAN_TX_BUFFER22 ((uint32_t)0x00400000U)

#define FDCAN_TX_BUFFER23 ((uint32_t)0x00800000U)

#define FDCAN_TX_BUFFER24 ((uint32_t)0x01000000U)

#define FDCAN_TX_BUFFER25 ((uint32_t)0x02000000U)

#define FDCAN_TX_BUFFER26 ((uint32_t)0x04000000U)

#define FDCAN_TX_BUFFER27 ((uint32_t)0x08000000U)

#define FDCAN_TX_BUFFER28 ((uint32_t)0x10000000U)

#define FDCAN_TX_BUFFER29 ((uint32_t)0x20000000U)

#define FDCAN_TX_BUFFER30 ((uint32_t)0x40000000U)

#define FDCAN_TX_BUFFER31 ((uint32_t)0x80000000U)

#define FDCAN_RX_FIFO0    ((uint32_t)0x00000040U)

#define FDCAN_RX_FIFO1    ((uint32_t)0x00000041U)

#define FDCAN_RX_BUFFER0  ((uint32_t)0x00000000U)

#define FDCAN_RX_BUFFER1  ((uint32_t)0x00000001U)

#define FDCAN_RX_BUFFER2  ((uint32_t)0x00000002U)

#define FDCAN_RX_BUFFER3  ((uint32_t)0x00000003U)

#define FDCAN_RX_BUFFER4  ((uint32_t)0x00000004U)

#define FDCAN_RX_BUFFER5  ((uint32_t)0x00000005U)

#define FDCAN_RX_BUFFER6  ((uint32_t)0x00000006U)

#define FDCAN_RX_BUFFER7  ((uint32_t)0x00000007U)

#define FDCAN_RX_BUFFER8  ((uint32_t)0x00000008U)

#define FDCAN_RX_BUFFER9  ((uint32_t)0x00000009U)

#define FDCAN_RX_BUFFER10 ((uint32_t)0x0000000AU)

#define FDCAN_RX_BUFFER11 ((uint32_t)0x0000000BU)

#define FDCAN_RX_BUFFER12 ((uint32_t)0x0000000CU)

#define FDCAN_RX_BUFFER13 ((uint32_t)0x0000000DU)

#define FDCAN_RX_BUFFER14 ((uint32_t)0x0000000EU)

#define FDCAN_RX_BUFFER15 ((uint32_t)0x0000000FU)

#define FDCAN_RX_BUFFER16 ((uint32_t)0x00000010U)

#define FDCAN_RX_BUFFER17 ((uint32_t)0x00000011U)

#define FDCAN_RX_BUFFER18 ((uint32_t)0x00000012U)

#define FDCAN_RX_BUFFER19 ((uint32_t)0x00000013U)

#define FDCAN_RX_BUFFER20 ((uint32_t)0x00000014U)

#define FDCAN_RX_BUFFER21 ((uint32_t)0x00000015U)

#define FDCAN_RX_BUFFER22 ((uint32_t)0x00000016U)

#define FDCAN_RX_BUFFER23 ((uint32_t)0x00000017U)

#define FDCAN_RX_BUFFER24 ((uint32_t)0x00000018U)

#define FDCAN_RX_BUFFER25 ((uint32_t)0x00000019U)

#define FDCAN_RX_BUFFER26 ((uint32_t)0x0000001AU)

#define FDCAN_RX_BUFFER27 ((uint32_t)0x0000001BU)

#define FDCAN_RX_BUFFER28 ((uint32_t)0x0000001CU)

#define FDCAN_RX_BUFFER29 ((uint32_t)0x0000001DU)

#define FDCAN_RX_BUFFER30 ((uint32_t)0x0000001EU)

#define FDCAN_RX_BUFFER31 ((uint32_t)0x0000001FU)

#define FDCAN_RX_BUFFER32 ((uint32_t)0x00000020U)

#define FDCAN_RX_BUFFER33 ((uint32_t)0x00000021U)

#define FDCAN_RX_BUFFER34 ((uint32_t)0x00000022U)

#define FDCAN_RX_BUFFER35 ((uint32_t)0x00000023U)

#define FDCAN_RX_BUFFER36 ((uint32_t)0x00000024U)

#define FDCAN_RX_BUFFER37 ((uint32_t)0x00000025U)

#define FDCAN_RX_BUFFER38 ((uint32_t)0x00000026U)

#define FDCAN_RX_BUFFER39 ((uint32_t)0x00000027U)

#define FDCAN_RX_BUFFER40 ((uint32_t)0x00000028U)

#define FDCAN_RX_BUFFER41 ((uint32_t)0x00000029U)

#define FDCAN_RX_BUFFER42 ((uint32_t)0x0000002AU)

#define FDCAN_RX_BUFFER43 ((uint32_t)0x0000002BU)

#define FDCAN_RX_BUFFER44 ((uint32_t)0x0000002CU)

#define FDCAN_RX_BUFFER45 ((uint32_t)0x0000002DU)

#define FDCAN_RX_BUFFER46 ((uint32_t)0x0000002EU)

#define FDCAN_RX_BUFFER47 ((uint32_t)0x0000002FU)

#define FDCAN_RX_BUFFER48 ((uint32_t)0x00000030U)

#define FDCAN_RX_BUFFER49 ((uint32_t)0x00000031U)

#define FDCAN_RX_BUFFER50 ((uint32_t)0x00000032U)

#define FDCAN_RX_BUFFER51 ((uint32_t)0x00000033U)

#define FDCAN_RX_BUFFER52 ((uint32_t)0x00000034U)

#define FDCAN_RX_BUFFER53 ((uint32_t)0x00000035U)

#define FDCAN_RX_BUFFER54 ((uint32_t)0x00000036U)

#define FDCAN_RX_BUFFER55 ((uint32_t)0x00000037U)

#define FDCAN_RX_BUFFER56 ((uint32_t)0x00000038U)

#define FDCAN_RX_BUFFER57 ((uint32_t)0x00000039U)

#define FDCAN_RX_BUFFER58 ((uint32_t)0x0000003AU)

#define FDCAN_RX_BUFFER59 ((uint32_t)0x0000003BU)

#define FDCAN_RX_BUFFER60 ((uint32_t)0x0000003CU)

#define FDCAN_RX_BUFFER61 ((uint32_t)0x0000003DU)

#define FDCAN_RX_BUFFER62 ((uint32_t)0x0000003EU)

#define FDCAN_RX_BUFFER63 ((uint32_t)0x0000003FU)

#define FDCAN_TX_EVENT             ((uint32_t)0x00400000U)

#define FDCAN_TX_IN_SPITE_OF_ABORT ((uint32_t)0x00800000U)

#define FDCAN_HP_STORAGE_NO_FIFO  ((uint32_t)0x00000000U)

#define FDCAN_HP_STORAGE_MSG_LOST ((uint32_t)0x00000040U)

#define FDCAN_HP_STORAGE_RXFIFO0  ((uint32_t)0x00000080U)

#define FDCAN_HP_STORAGE_RXFIFO1  ((uint32_t)0x000000C0U)

#define FDCAN_PROTOCOL_ERROR_NONE      ((uint32_t)0x00000000U)

#define FDCAN_PROTOCOL_ERROR_STUFF     ((uint32_t)0x00000001U)

#define FDCAN_PROTOCOL_ERROR_FORM      ((uint32_t)0x00000002U)

#define FDCAN_PROTOCOL_ERROR_ACK       ((uint32_t)0x00000003U)

#define FDCAN_PROTOCOL_ERROR_BIT1      ((uint32_t)0x00000004U)

#define FDCAN_PROTOCOL_ERROR_BIT0      ((uint32_t)0x00000005U)

#define FDCAN_PROTOCOL_ERROR_CRC       ((uint32_t)0x00000006U)

#define FDCAN_PROTOCOL_ERROR_NO_CHANGE ((uint32_t)0x00000007U)

#define FDCAN_COM_STATE_SYNC ((uint32_t)0x00000000U)

#define FDCAN_COM_STATE_IDLE ((uint32_t)0x00000008U)

#define FDCAN_COM_STATE_RX   ((uint32_t)0x00000010U)

#define FDCAN_COM_STATE_TX   ((uint32_t)0x00000018U)

#define FDCAN_CFG_TX_EVENT_FIFO ((uint32_t)0x00000000U)

#define FDCAN_CFG_RX_FIFO0      ((uint32_t)0x00000001U)

#define FDCAN_CFG_RX_FIFO1      ((uint32_t)0x00000002U)

#define FDCAN_RX_FIFO_BLOCKING  ((uint32_t)0x00000000U)

#define FDCAN_RX_FIFO_OVERWRITE ((uint32_t)0x80000000U)

#define FDCAN_ACCEPT_IN_RX_FIFO0 ((uint32_t)0x00000000U)

#define FDCAN_ACCEPT_IN_RX_FIFO1 ((uint32_t)0x00000001U)

#define FDCAN_REJECT             ((uint32_t)0x00000002U)

#define FDCAN_FILTER_REMOTE ((uint32_t)0x00000000U)

#define FDCAN_REJECT_REMOTE ((uint32_t)0x00000001U)

#define FDCAN_INTERRUPT_LINE0 ((uint32_t)0x00000001U)

#define FDCAN_INTERRUPT_LINE1 ((uint32_t)0x00000002U)

#define FDCAN_TIMESTAMP_INTERNAL ((uint32_t)0x00000001U)

#define FDCAN_TIMESTAMP_EXTERNAL ((uint32_t)0x00000002U)

#define FDCAN_TIMESTAMP_PRESC_1  ((uint32_t)0x00000000U)

#define FDCAN_TIMESTAMP_PRESC_2  ((uint32_t)0x00010000U)

#define FDCAN_TIMESTAMP_PRESC_3  ((uint32_t)0x00020000U)

#define FDCAN_TIMESTAMP_PRESC_4  ((uint32_t)0x00030000U)

#define FDCAN_TIMESTAMP_PRESC_5  ((uint32_t)0x00040000U)

#define FDCAN_TIMESTAMP_PRESC_6  ((uint32_t)0x00050000U)

#define FDCAN_TIMESTAMP_PRESC_7  ((uint32_t)0x00060000U)

#define FDCAN_TIMESTAMP_PRESC_8  ((uint32_t)0x00070000U)

#define FDCAN_TIMESTAMP_PRESC_9  ((uint32_t)0x00080000U)

#define FDCAN_TIMESTAMP_PRESC_10 ((uint32_t)0x00090000U)

#define FDCAN_TIMESTAMP_PRESC_11 ((uint32_t)0x000A0000U)

#define FDCAN_TIMESTAMP_PRESC_12 ((uint32_t)0x000B0000U)

#define FDCAN_TIMESTAMP_PRESC_13 ((uint32_t)0x000C0000U)

#define FDCAN_TIMESTAMP_PRESC_14 ((uint32_t)0x000D0000U)

#define FDCAN_TIMESTAMP_PRESC_15 ((uint32_t)0x000E0000U)

#define FDCAN_TIMESTAMP_PRESC_16 ((uint32_t)0x000F0000U)

#define FDCAN_TIMEOUT_CONTINUOUS    ((uint32_t)0x00000000U)

#define FDCAN_TIMEOUT_TX_EVENT_FIFO ((uint32_t)0x00000002U)

#define FDCAN_TIMEOUT_RX_FIFO0      ((uint32_t)0x00000004U)

#define FDCAN_TIMEOUT_RX_FIFO1      ((uint32_t)0x00000006U)

#define FDCAN_TT_REF_MESSAGE_NO_PAYLOAD  ((uint32_t)0x00000000U)

#define FDCAN_TT_REF_MESSAGE_ADD_PAYLOAD ((uint32_t)FDCAN_TTRMC_RMPS)

#define FDCAN_TT_REPEAT_EVERY_CYCLE      ((uint32_t)0x00000000U)

#define FDCAN_TT_REPEAT_EVERY_2ND_CYCLE  ((uint32_t)0x00000002U)

#define FDCAN_TT_REPEAT_EVERY_4TH_CYCLE  ((uint32_t)0x00000004U)

#define FDCAN_TT_REPEAT_EVERY_8TH_CYCLE  ((uint32_t)0x00000008U)

#define FDCAN_TT_REPEAT_EVERY_16TH_CYCLE ((uint32_t)0x00000010U)

#define FDCAN_TT_REPEAT_EVERY_32ND_CYCLE ((uint32_t)0x00000020U)

#define FDCAN_TT_REPEAT_EVERY_64TH_CYCLE ((uint32_t)0x00000040U)

#define FDCAN_TT_TX_REF_TRIGGER         ((uint32_t)0x00000000U)

#define FDCAN_TT_TX_REF_TRIGGER_GAP     ((uint32_t)0x00000001U)

#define FDCAN_TT_TX_TRIGGER_SINGLE      ((uint32_t)0x00000002U)

#define FDCAN_TT_TX_TRIGGER_CONTINUOUS  ((uint32_t)0x00000003U)

#define FDCAN_TT_TX_TRIGGER_ARBITRATION ((uint32_t)0x00000004U)

#define FDCAN_TT_TX_TRIGGER_MERGED      ((uint32_t)0x00000005U)

#define FDCAN_TT_WATCH_TRIGGER          ((uint32_t)0x00000006U)

#define FDCAN_TT_WATCH_TRIGGER_GAP      ((uint32_t)0x00000007U)

#define FDCAN_TT_RX_TRIGGER             ((uint32_t)0x00000008U)

#define FDCAN_TT_TIME_BASE_TRIGGER      ((uint32_t)0x00000009U)

#define FDCAN_TT_END_OF_LIST            ((uint32_t)0x0000000AU)

#define FDCAN_TT_TM_NO_INTERNAL_EVENT  ((uint32_t)0x00000000U)

#define FDCAN_TT_TM_GEN_INTERNAL_EVENT ((uint32_t)0x00000020U)

#define FDCAN_TT_TM_NO_EXTERNAL_EVENT  ((uint32_t)0x00000000U)

#define FDCAN_TT_TM_GEN_EXTERNAL_EVENT ((uint32_t)0x00000010U)

#define FDCAN_TT_COMMUNICATION_LEVEL1    ((uint32_t)0x00000001U)

#define FDCAN_TT_COMMUNICATION_LEVEL2    ((uint32_t)0x00000002U)

#define FDCAN_TT_COMMUNICATION_LEVEL0    ((uint32_t)0x00000003U)

#define FDCAN_STRICTLY_TT_OPERATION     ((uint32_t)0x00000000U)

#define FDCAN_EXT_EVT_SYNC_TT_OPERATION ((uint32_t)FDCAN_TTOCF_GEN)

#define FDCAN_TT_SLAVE            ((uint32_t)0x00000000U)

#define FDCAN_TT_POTENTIAL_MASTER ((uint32_t)FDCAN_TTOCF_TM)

#define FDCAN_TT_EXT_CLK_SYNC_DISABLE ((uint32_t)0x00000000U)

#define FDCAN_TT_EXT_CLK_SYNC_ENABLE  ((uint32_t)FDCAN_TTOCF_EECS)

#define FDCAN_TT_GLOB_TIME_FILT_DISABLE ((uint32_t)0x00000000U)

#define FDCAN_TT_GLOB_TIME_FILT_ENABLE  ((uint32_t)FDCAN_TTOCF_EGTF)

#define FDCAN_TT_AUTO_CLK_CALIB_DISABLE ((uint32_t)0x00000000U)

#define FDCAN_TT_AUTO_CLK_CALIB_ENABLE  ((uint32_t)FDCAN_TTOCF_ECC)

#define FDCAN_TT_EVT_TRIG_POL_RISING  ((uint32_t)0x00000000U)

#define FDCAN_TT_EVT_TRIG_POL_FALLING ((uint32_t)FDCAN_TTOCF_EVTP)

#define FDCAN_TT_CYCLES_PER_MATRIX_1  ((uint32_t)0x00000000U)

#define FDCAN_TT_CYCLES_PER_MATRIX_2  ((uint32_t)0x00000001U)

#define FDCAN_TT_CYCLES_PER_MATRIX_4  ((uint32_t)0x00000003U)

#define FDCAN_TT_CYCLES_PER_MATRIX_8  ((uint32_t)0x00000007U)

#define FDCAN_TT_CYCLES_PER_MATRIX_16 ((uint32_t)0x0000000FU)

#define FDCAN_TT_CYCLES_PER_MATRIX_32 ((uint32_t)0x0000001FU)

#define FDCAN_TT_CYCLES_PER_MATRIX_64 ((uint32_t)0x0000003FU)

#define FDCAN_TT_NO_SYNC_PULSE          ((uint32_t)0x00000000U)

#define FDCAN_TT_SYNC_BASIC_CYCLE_START ((uint32_t)0x00000040U)

#define FDCAN_TT_SYNC_MATRIX_START      ((uint32_t)0x00000080U)

#define FDCAN_TT_STOP_WATCH_TRIGGER_0 ((uint32_t)0x00000000U)

#define FDCAN_TT_STOP_WATCH_TRIGGER_1 ((uint32_t)0x00000001U)

#define FDCAN_TT_STOP_WATCH_TRIGGER_2 ((uint32_t)0x00000002U)

#define FDCAN_TT_STOP_WATCH_TRIGGER_3 ((uint32_t)0x00000003U)

#define FDCAN_TT_EVENT_TRIGGER_0 ((uint32_t)0x00000000U)

#define FDCAN_TT_EVENT_TRIGGER_1 ((uint32_t)0x00000010U)

#define FDCAN_TT_EVENT_TRIGGER_2 ((uint32_t)0x00000020U)

#define FDCAN_TT_EVENT_TRIGGER_3 ((uint32_t)0x00000030U)

#define FDCAN_TT_STOP_WATCH_DISABLED    ((uint32_t)0x00000000U)

#define FDCAN_TT_STOP_WATCH_CYCLE_TIME  ((uint32_t)0x00000008U)

#define FDCAN_TT_STOP_WATCH_LOCAL_TIME  ((uint32_t)0x00000010U)

#define FDCAN_TT_STOP_WATCH_GLOBAL_TIME ((uint32_t)0x00000018U)

#define FDCAN_TT_STOP_WATCH_RISING  ((uint32_t)0x00000000U)

#define FDCAN_TT_STOP_WATCH_FALLING ((uint32_t)0x00000004U)

#define FDCAN_TT_REG_TIMEMARK_DIABLED  ((uint32_t)0x00000000U)

#define FDCAN_TT_REG_TIMEMARK_CYC_TIME ((uint32_t)0x00000040U)

#define FDCAN_TT_REG_TIMEMARK_LOC_TIME ((uint32_t)0x00000080U)

#define FDCAN_TT_REG_TIMEMARK_GLO_TIME ((uint32_t)0x000000C0U)

#define FDCAN_TT_NO_ERROR     ((uint32_t)0x00000000U)

#define FDCAN_TT_WARNING      ((uint32_t)0x00000001U)

#define FDCAN_TT_ERROR        ((uint32_t)0x00000002U)

#define FDCAN_TT_SEVERE_ERROR ((uint32_t)0x00000003U)

#define FDCAN_TT_MASTER_OFF          ((uint32_t)0x00000000U)

#define FDCAN_TT_TIME_SLAVE          ((uint32_t)0x00000004U)

#define FDCAN_TT_BACKUP_TIME_MASTER  ((uint32_t)0x00000008U)

#define FDCAN_TT_CURRENT_TIME_MASTER ((uint32_t)0x0000000CU)

#define FDCAN_TT_OUT_OF_SYNC   ((uint32_t)0x00000000U)

#define FDCAN_TT_SYNCHRONIZING ((uint32_t)0x00000010U)

#define FDCAN_TT_IN_GAP        ((uint32_t)0x00000020U)

#define FDCAN_TT_IN_SCHEDULE   ((uint32_t)0x00000030U)

#define FDCAN_IR_MASK ((uint32_t)0x3FCFFFFFU)

#define CCU_IR_MASK   ((uint32_t)0xC0000000U)

#define FDCAN_FLAG_TX_COMPLETE             FDCAN_IR_TC

#define FDCAN_FLAG_TX_ABORT_COMPLETE       FDCAN_IR_TCF

#define FDCAN_FLAG_TX_FIFO_EMPTY           FDCAN_IR_TFE

#define FDCAN_FLAG_RX_HIGH_PRIORITY_MSG    FDCAN_IR_HPM

#define FDCAN_FLAG_RX_BUFFER_NEW_MESSAGE   FDCAN_IR_DRX

#define FDCAN_FLAG_TX_EVT_FIFO_ELT_LOST    FDCAN_IR_TEFL

#define FDCAN_FLAG_TX_EVT_FIFO_FULL        FDCAN_IR_TEFF

#define FDCAN_FLAG_TX_EVT_FIFO_WATERMARK   FDCAN_IR_TEFW

#define FDCAN_FLAG_TX_EVT_FIFO_NEW_DATA    FDCAN_IR_TEFN

#define FDCAN_FLAG_RX_FIFO0_MESSAGE_LOST   FDCAN_IR_RF0L

#define FDCAN_FLAG_RX_FIFO0_FULL           FDCAN_IR_RF0F

#define FDCAN_FLAG_RX_FIFO0_WATERMARK      FDCAN_IR_RF0W

#define FDCAN_FLAG_RX_FIFO0_NEW_MESSAGE    FDCAN_IR_RF0N

#define FDCAN_FLAG_RX_FIFO1_MESSAGE_LOST   FDCAN_IR_RF1L

#define FDCAN_FLAG_RX_FIFO1_FULL           FDCAN_IR_RF1F

#define FDCAN_FLAG_RX_FIFO1_WATERMARK      FDCAN_IR_RF1W

#define FDCAN_FLAG_RX_FIFO1_NEW_MESSAGE    FDCAN_IR_RF1N

#define FDCAN_FLAG_RAM_ACCESS_FAILURE      FDCAN_IR_MRAF

#define FDCAN_FLAG_ERROR_LOGGING_OVERFLOW  FDCAN_IR_ELO

#define FDCAN_FLAG_ERROR_PASSIVE           FDCAN_IR_EP

#define FDCAN_FLAG_ERROR_WARNING           FDCAN_IR_EW

#define FDCAN_FLAG_BUS_OFF                 FDCAN_IR_BO

#define FDCAN_FLAG_RAM_WATCHDOG            FDCAN_IR_WDI

#define FDCAN_FLAG_ARB_PROTOCOL_ERROR      FDCAN_IR_PEA

#define FDCAN_FLAG_DATA_PROTOCOL_ERROR     FDCAN_IR_PED

#define FDCAN_FLAG_RESERVED_ADDRESS_ACCESS FDCAN_IR_ARA

#define FDCAN_FLAG_TIMESTAMP_WRAPAROUND    FDCAN_IR_TSW

#define FDCAN_FLAG_TIMEOUT_OCCURRED        FDCAN_IR_TOO

#define FDCAN_FLAG_CALIB_STATE_CHANGED     (FDCANCCU_IR_CSC << 30)

#define FDCAN_FLAG_CALIB_WATCHDOG_EVENT    (FDCANCCU_IR_CWE << 30)

#define FDCAN_IT_TX_COMPLETE           FDCAN_IE_TCE

#define FDCAN_IT_TX_ABORT_COMPLETE     FDCAN_IE_TCFE

#define FDCAN_IT_TX_FIFO_EMPTY         FDCAN_IE_TFEE

#define FDCAN_IT_RX_HIGH_PRIORITY_MSG  FDCAN_IE_HPME

#define FDCAN_IT_RX_BUFFER_NEW_MESSAGE FDCAN_IE_DRXE

#define FDCAN_IT_TIMESTAMP_WRAPAROUND  FDCAN_IE_TSWE

#define FDCAN_IT_TIMEOUT_OCCURRED      FDCAN_IE_TOOE

#define FDCAN_IT_CALIB_STATE_CHANGED  (FDCANCCU_IE_CSCE << 30)

#define FDCAN_IT_CALIB_WATCHDOG_EVENT (FDCANCCU_IE_CWEE << 30)

#define FDCAN_IT_TX_EVT_FIFO_ELT_LOST  FDCAN_IE_TEFLE

#define FDCAN_IT_TX_EVT_FIFO_FULL      FDCAN_IE_TEFFE

#define FDCAN_IT_TX_EVT_FIFO_WATERMARK FDCAN_IE_TEFWE

#define FDCAN_IT_TX_EVT_FIFO_NEW_DATA  FDCAN_IE_TEFNE

#define FDCAN_IT_RX_FIFO0_MESSAGE_LOST FDCAN_IE_RF0LE

#define FDCAN_IT_RX_FIFO0_FULL         FDCAN_IE_RF0FE

#define FDCAN_IT_RX_FIFO0_WATERMARK    FDCAN_IE_RF0WE

#define FDCAN_IT_RX_FIFO0_NEW_MESSAGE  FDCAN_IE_RF0NE

#define FDCAN_IT_RX_FIFO1_MESSAGE_LOST FDCAN_IE_RF1LE

#define FDCAN_IT_RX_FIFO1_FULL         FDCAN_IE_RF1FE

#define FDCAN_IT_RX_FIFO1_WATERMARK    FDCAN_IE_RF1WE

#define FDCAN_IT_RX_FIFO1_NEW_MESSAGE  FDCAN_IE_RF1NE

#define FDCAN_IT_RAM_ACCESS_FAILURE      FDCAN_IE_MRAFE

#define FDCAN_IT_ERROR_LOGGING_OVERFLOW  FDCAN_IE_ELOE

#define FDCAN_IT_RAM_WATCHDOG            FDCAN_IE_WDIE

#define FDCAN_IT_ARB_PROTOCOL_ERROR      FDCAN_IE_PEAE

#define FDCAN_IT_DATA_PROTOCOL_ERROR     FDCAN_IE_PEDE

#define FDCAN_IT_RESERVED_ADDRESS_ACCESS FDCAN_IE_ARAE

#define FDCAN_IT_ERROR_PASSIVE FDCAN_IE_EPE

#define FDCAN_IT_ERROR_WARNING FDCAN_IE_EWE

#define FDCAN_IT_BUS_OFF       FDCAN_IE_BOE

#define FDCAN_TT_FLAG_BASIC_CYCLE_START    FDCAN_TTIR_SBC

#define FDCAN_TT_FLAG_MATRIX_CYCLE_START   FDCAN_TTIR_SMC

#define FDCAN_TT_FLAG_SYNC_MODE_CHANGE     FDCAN_TTIR_CSM

#define FDCAN_TT_FLAG_START_OF_GAP         FDCAN_TTIR_SOG

#define FDCAN_TT_FLAG_REG_TIME_MARK        FDCAN_TTIR_RTMI

#define FDCAN_TT_FLAG_TRIG_TIME_MARK       FDCAN_TTIR_TTMI

#define FDCAN_TT_FLAG_STOP_WATCH           FDCAN_TTIR_SWE

#define FDCAN_TT_FLAG_GLOBAL_TIME_WRAP     FDCAN_TTIR_GTW

#define FDCAN_TT_FLAG_GLOBAL_TIME_DISC     FDCAN_TTIR_GTD

#define FDCAN_TT_FLAG_GLOBAL_TIME_ERROR    FDCAN_TTIR_GTE

#define FDCAN_TT_FLAG_TX_COUNT_UNDERFLOW   FDCAN_TTIR_TXU

#define FDCAN_TT_FLAG_TX_COUNT_OVERFLOW    FDCAN_TTIR_TXO

#define FDCAN_TT_FLAG_SCHEDULING_ERROR_1   FDCAN_TTIR_SE1

#define FDCAN_TT_FLAG_SCHEDULING_ERROR_2   FDCAN_TTIR_SE2

#define FDCAN_TT_FLAG_ERROR_LEVEL_CHANGE   FDCAN_TTIR_ELC

#define FDCAN_TT_FLAG_INIT_WATCH_TRIGGER   FDCAN_TTIR_IWT

#define FDCAN_TT_FLAG_WATCH_TRIGGER        FDCAN_TTIR_WT

#define FDCAN_TT_FLAG_APPLICATION_WATCHDOG FDCAN_TTIR_AW

#define FDCAN_TT_FLAG_CONFIG_ERROR         FDCAN_TTIR_CER

#define FDCAN_TT_IT_BASIC_CYCLE_START  FDCAN_TTIE_SBCE

#define FDCAN_TT_IT_MATRIX_CYCLE_START FDCAN_TTIE_SMCE

#define FDCAN_TT_IT_SYNC_MODE_CHANGE   FDCAN_TTIE_CSME

#define FDCAN_TT_IT_START_OF_GAP       FDCAN_TTIE_SOGE

#define FDCAN_TT_IT_REG_TIME_MARK  FDCAN_TTIE_RTMIE

#define FDCAN_TT_IT_TRIG_TIME_MARK FDCAN_TTIE_TTMIE

#define FDCAN_TT_IT_STOP_WATCH FDCAN_TTIE_SWEE

#define FDCAN_TT_IT_GLOBAL_TIME_WRAP FDCAN_TTIE_GTWE

#define FDCAN_TT_IT_GLOBAL_TIME_DISC FDCAN_TTIE_GTDE

#define FDCAN_TT_IT_GLOBAL_TIME_ERROR  FDCAN_TTIE_GTEE

#define FDCAN_TT_IT_TX_COUNT_UNDERFLOW FDCAN_TTIE_TXUE

#define FDCAN_TT_IT_TX_COUNT_OVERFLOW  FDCAN_TTIE_TXOE

#define FDCAN_TT_IT_SCHEDULING_ERROR_1 FDCAN_TTIE_SE1E

#define FDCAN_TT_IT_SCHEDULING_ERROR_2 FDCAN_TTIE_SE2E

#define FDCAN_TT_IT_ERROR_LEVEL_CHANGE FDCAN_TTIE_ELCE

#define FDCAN_TT_IT_INIT_WATCH_TRIGGER   FDCAN_TTIE_IWTE

#define FDCAN_TT_IT_WATCH_TRIGGER        FDCAN_TTIE_WTE

#define FDCAN_TT_IT_APPLICATION_WATCHDOG FDCAN_TTIE_AWE

#define FDCAN_TT_IT_CONFIG_ERROR         FDCAN_TTIE_CERE

/* Exported macro ------------------------------------------------------------*/

#if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1

#define __HAL_FDCAN_RESET_HANDLE_STATE(__HANDLE__) do{                                                \

                                                      (__HANDLE__)->State = HAL_FDCAN_STATE_RESET;    \

                                                      (__HANDLE__)->MspInitCallback = NULL;           \

                                                      (__HANDLE__)->MspDeInitCallback = NULL;         \

                                                     } while(0)

#else

#define __HAL_FDCAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FDCAN_STATE_RESET)

#endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */


#define __HAL_FDCAN_ENABLE_IT(__HANDLE__, __INTERRUPT__)             \

  do{                                                                \

    (__HANDLE__)->Instance->IE |= ((__INTERRUPT__) & FDCAN_IR_MASK); \

    FDCAN_CCU->IE |= (((__INTERRUPT__) & CCU_IR_MASK) >> 30);        \

  }while(0)


#define __HAL_FDCAN_DISABLE_IT(__HANDLE__, __INTERRUPT__)               \

  do{                                                                   \

    ((__HANDLE__)->Instance->IE) &= ~((__INTERRUPT__) & FDCAN_IR_MASK); \

    FDCAN_CCU->IE &= ~(((__INTERRUPT__) & CCU_IR_MASK) >> 30);          \

  }while(0)


#define __HAL_FDCAN_GET_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) < FDCAN_IT_CALIB_WATCHDOG_EVENT) ? ((__HANDLE__)->Instance->IR & (__INTERRUPT__)) : ((FDCAN_CCU->IR << 30) & (__INTERRUPT__)))


#define __HAL_FDCAN_CLEAR_IT(__HANDLE__, __INTERRUPT__)               \

do{                                                                   \

    ((__HANDLE__)->Instance->IR) = ((__INTERRUPT__) & FDCAN_IR_MASK); \

    FDCAN_CCU->IR = (((__INTERRUPT__) & CCU_IR_MASK) >> 30);          \

  }while(0)


#define __HAL_FDCAN_GET_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) < FDCAN_FLAG_CALIB_WATCHDOG_EVENT) ? ((__HANDLE__)->Instance->IR & (__FLAG__)) : ((FDCAN_CCU->IR << 30) & (__FLAG__)))


#define __HAL_FDCAN_CLEAR_FLAG(__HANDLE__, __FLAG__)             \

do{                                                              \

    ((__HANDLE__)->Instance->IR) = ((__FLAG__) & FDCAN_IR_MASK); \

    FDCAN_CCU->IR = (((__FLAG__) & CCU_IR_MASK) >> 30);          \

  }while(0)


#define __HAL_FDCAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) < FDCAN_IT_CALIB_WATCHDOG_EVENT) ? ((__HANDLE__)->Instance->IE & (__INTERRUPT__)) : ((FDCAN_CCU->IE << 30) & (__INTERRUPT__)))


#define __HAL_FDCAN_TT_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->ttcan->TTIE) |= (__INTERRUPT__))


#define __HAL_FDCAN_TT_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->ttcan->TTIE) &= ~(__INTERRUPT__))


#define __HAL_FDCAN_TT_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->ttcan->TTIR) & (__INTERRUPT__))


#define __HAL_FDCAN_TT_CLEAR_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->ttcan->TTIR) = (__INTERRUPT__))


#define __HAL_FDCAN_TT_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->ttcan->TTIR) & (__FLAG__))


#define __HAL_FDCAN_TT_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->ttcan->TTIR) = (__FLAG__))


#define __HAL_FDCAN_TT_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->ttcan->TTIE) & (__INTERRUPT__))


/* Exported functions --------------------------------------------------------*/

/* Initialization and de-initialization functions *****************************/

HAL_StatusTypeDef HAL_FDCAN_Init(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_DeInit(FDCAN_HandleTypeDef *hfdcan);

void              HAL_FDCAN_MspInit(FDCAN_HandleTypeDef *hfdcan);

void              HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_EnterPowerDownMode(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_ExitPowerDownMode(FDCAN_HandleTypeDef *hfdcan);


#if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1

/* Callbacks Register/UnRegister functions  ***********************************/

HAL_StatusTypeDef HAL_FDCAN_RegisterCallback(FDCAN_HandleTypeDef *hfdcan, HAL_FDCAN_CallbackIDTypeDef CallbackID, pFDCAN_CallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterCallback(FDCAN_HandleTypeDef *hfdcan, HAL_FDCAN_CallbackIDTypeDef CallbackID);

HAL_StatusTypeDef HAL_FDCAN_RegisterClockCalibrationCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_ClockCalibrationCallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterClockCalibrationCallback(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_RegisterTxEventFifoCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TxEventFifoCallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterTxEventFifoCallback(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_RegisterRxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_RxFifo0CallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterRxFifo0Callback(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_RegisterRxFifo1Callback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_RxFifo1CallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterRxFifo1Callback(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_RegisterTxBufferCompleteCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TxBufferCompleteCallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterTxBufferCompleteCallback(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_RegisterTxBufferAbortCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TxBufferAbortCallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterTxBufferAbortCallback(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_RegisterErrorStatusCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_ErrorStatusCallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterErrorStatusCallback(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_RegisterTTScheduleSyncCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TT_ScheduleSyncCallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterTTScheduleSyncCallback(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_RegisterTTTimeMarkCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TT_TimeMarkCallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterTTTimeMarkCallback(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_RegisterTTStopWatchCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TT_StopWatchCallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterTTStopWatchCallback(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_RegisterTTGlobalTimeCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TT_GlobalTimeCallbackTypeDef pCallback);

HAL_StatusTypeDef HAL_FDCAN_UnRegisterTTGlobalTimeCallback(FDCAN_HandleTypeDef *hfdcan);

#endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */

/* Configuration functions ****************************************************/

HAL_StatusTypeDef HAL_FDCAN_ConfigClockCalibration(FDCAN_HandleTypeDef *hfdcan, FDCAN_ClkCalUnitTypeDef *sCcuConfig);

uint32_t          HAL_FDCAN_GetClockCalibrationState(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_ResetClockCalibrationState(FDCAN_HandleTypeDef *hfdcan);

uint32_t          HAL_FDCAN_GetClockCalibrationCounter(FDCAN_HandleTypeDef *hfdcan, uint32_t Counter);

HAL_StatusTypeDef HAL_FDCAN_ConfigFilter(FDCAN_HandleTypeDef *hfdcan, FDCAN_FilterTypeDef *sFilterConfig);

HAL_StatusTypeDef HAL_FDCAN_ConfigGlobalFilter(FDCAN_HandleTypeDef *hfdcan, uint32_t NonMatchingStd, uint32_t NonMatchingExt, uint32_t RejectRemoteStd, uint32_t RejectRemoteExt);

HAL_StatusTypeDef HAL_FDCAN_ConfigExtendedIdMask(FDCAN_HandleTypeDef *hfdcan, uint32_t Mask);

HAL_StatusTypeDef HAL_FDCAN_ConfigRxFifoOverwrite(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo, uint32_t OperationMode);

HAL_StatusTypeDef HAL_FDCAN_ConfigFifoWatermark(FDCAN_HandleTypeDef *hfdcan, uint32_t FIFO, uint32_t Watermark);

HAL_StatusTypeDef HAL_FDCAN_ConfigRamWatchdog(FDCAN_HandleTypeDef *hfdcan, uint32_t CounterStartValue);

HAL_StatusTypeDef HAL_FDCAN_ConfigTimestampCounter(FDCAN_HandleTypeDef *hfdcan, uint32_t TimestampPrescaler);

HAL_StatusTypeDef HAL_FDCAN_EnableTimestampCounter(FDCAN_HandleTypeDef *hfdcan, uint32_t TimestampOperation);

HAL_StatusTypeDef HAL_FDCAN_DisableTimestampCounter(FDCAN_HandleTypeDef *hfdcan);

uint16_t          HAL_FDCAN_GetTimestampCounter(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_ResetTimestampCounter(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_ConfigTimeoutCounter(FDCAN_HandleTypeDef *hfdcan, uint32_t TimeoutOperation, uint32_t TimeoutPeriod);

HAL_StatusTypeDef HAL_FDCAN_EnableTimeoutCounter(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_DisableTimeoutCounter(FDCAN_HandleTypeDef *hfdcan);

uint16_t          HAL_FDCAN_GetTimeoutCounter(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_ResetTimeoutCounter(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_ConfigTxDelayCompensation(FDCAN_HandleTypeDef *hfdcan, uint32_t TdcOffset, uint32_t TdcFilter);

HAL_StatusTypeDef HAL_FDCAN_EnableTxDelayCompensation(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_DisableTxDelayCompensation(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_EnableISOMode(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_DisableISOMode(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_EnableEdgeFiltering(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_DisableEdgeFiltering(FDCAN_HandleTypeDef *hfdcan);

/* Control functions **********************************************************/

HAL_StatusTypeDef HAL_FDCAN_Start(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_Stop(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_AddMessageToTxFifoQ(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData);

HAL_StatusTypeDef HAL_FDCAN_AddMessageToTxBuffer(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData, uint32_t BufferIndex);

HAL_StatusTypeDef HAL_FDCAN_EnableTxBufferRequest(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndex);

uint32_t HAL_FDCAN_GetLatestTxFifoQRequestBuffer(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_AbortTxRequest(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndex);

HAL_StatusTypeDef HAL_FDCAN_GetRxMessage(FDCAN_HandleTypeDef *hfdcan, uint32_t RxLocation, FDCAN_RxHeaderTypeDef *pRxHeader, uint8_t *pRxData);

HAL_StatusTypeDef HAL_FDCAN_GetTxEvent(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxEventFifoTypeDef *pTxEvent);

HAL_StatusTypeDef HAL_FDCAN_GetHighPriorityMessageStatus(FDCAN_HandleTypeDef *hfdcan, FDCAN_HpMsgStatusTypeDef *HpMsgStatus);

HAL_StatusTypeDef HAL_FDCAN_GetProtocolStatus(FDCAN_HandleTypeDef *hfdcan, FDCAN_ProtocolStatusTypeDef *ProtocolStatus);

HAL_StatusTypeDef HAL_FDCAN_GetErrorCounters(FDCAN_HandleTypeDef *hfdcan, FDCAN_ErrorCountersTypeDef *ErrorCounters);

uint32_t HAL_FDCAN_IsRxBufferMessageAvailable(FDCAN_HandleTypeDef *hfdcan, uint32_t RxBufferIndex);

uint32_t HAL_FDCAN_IsTxBufferMessagePending(FDCAN_HandleTypeDef *hfdcan, uint32_t TxBufferIndex);

uint32_t HAL_FDCAN_GetRxFifoFillLevel(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo);

uint32_t HAL_FDCAN_GetTxFifoFreeLevel(FDCAN_HandleTypeDef *hfdcan);

uint32_t HAL_FDCAN_IsRestrictedOperationMode(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_ExitRestrictedOperationMode(FDCAN_HandleTypeDef *hfdcan);

/* TT Configuration and control functions**************************************/

HAL_StatusTypeDef HAL_FDCAN_TT_ConfigOperation(FDCAN_HandleTypeDef *hfdcan, FDCAN_TT_ConfigTypeDef *pTTParams);

HAL_StatusTypeDef HAL_FDCAN_TT_ConfigReferenceMessage(FDCAN_HandleTypeDef *hfdcan, uint32_t IdType, uint32_t Identifier, uint32_t Payload);

HAL_StatusTypeDef HAL_FDCAN_TT_ConfigTrigger(FDCAN_HandleTypeDef *hfdcan, FDCAN_TriggerTypeDef *sTriggerConfig);

HAL_StatusTypeDef HAL_FDCAN_TT_SetGlobalTime(FDCAN_HandleTypeDef *hfdcan, uint32_t TimePreset);

HAL_StatusTypeDef HAL_FDCAN_TT_SetClockSynchronization(FDCAN_HandleTypeDef *hfdcan, uint32_t NewTURNumerator);

HAL_StatusTypeDef HAL_FDCAN_TT_ConfigStopWatch(FDCAN_HandleTypeDef *hfdcan, uint32_t Source, uint32_t Polarity);

HAL_StatusTypeDef HAL_FDCAN_TT_ConfigRegisterTimeMark(FDCAN_HandleTypeDef *hfdcan, uint32_t TimeMarkSource, uint32_t TimeMarkValue, uint32_t RepeatFactor, uint32_t StartCycle);

HAL_StatusTypeDef HAL_FDCAN_TT_EnableRegisterTimeMarkPulse(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_DisableRegisterTimeMarkPulse(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_EnableTriggerTimeMarkPulse(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_DisableTriggerTimeMarkPulse(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_EnableHardwareGapControl(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_DisableHardwareGapControl(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_EnableTimeMarkGapControl(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_DisableTimeMarkGapControl(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_SetNextIsGap(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_SetEndOfGap(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_ConfigExternalSyncPhase(FDCAN_HandleTypeDef *hfdcan, uint32_t TargetPhase);

HAL_StatusTypeDef HAL_FDCAN_TT_EnableExternalSynchronization(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_DisableExternalSynchronization(FDCAN_HandleTypeDef *hfdcan);

HAL_StatusTypeDef HAL_FDCAN_TT_GetOperationStatus(FDCAN_HandleTypeDef *hfdcan, FDCAN_TTOperationStatusTypeDef *TTOpStatus);

/* Interrupts management ******************************************************/

HAL_StatusTypeDef HAL_FDCAN_ConfigInterruptLines(FDCAN_HandleTypeDef *hfdcan, uint32_t ITList, uint32_t InterruptLine);

HAL_StatusTypeDef HAL_FDCAN_TT_ConfigInterruptLines(FDCAN_HandleTypeDef *hfdcan, uint32_t TTITList, uint32_t InterruptLine);

HAL_StatusTypeDef HAL_FDCAN_ActivateNotification(FDCAN_HandleTypeDef *hfdcan, uint32_t ActiveITs, uint32_t BufferIndexes);

HAL_StatusTypeDef HAL_FDCAN_DeactivateNotification(FDCAN_HandleTypeDef *hfdcan, uint32_t InactiveITs);

HAL_StatusTypeDef HAL_FDCAN_TT_ActivateNotification(FDCAN_HandleTypeDef *hfdcan, uint32_t ActiveTTITs);

HAL_StatusTypeDef HAL_FDCAN_TT_DeactivateNotification(FDCAN_HandleTypeDef *hfdcan, uint32_t InactiveTTITs);

void              HAL_FDCAN_IRQHandler(FDCAN_HandleTypeDef *hfdcan);

/* Callback functions *********************************************************/

void HAL_FDCAN_ClockCalibrationCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t ClkCalibrationITs);

void HAL_FDCAN_TxEventFifoCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TxEventFifoITs);

void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs);

void HAL_FDCAN_RxFifo1Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo1ITs);

void HAL_FDCAN_TxFifoEmptyCallback(FDCAN_HandleTypeDef *hfdcan);

void HAL_FDCAN_TxBufferCompleteCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes);

void HAL_FDCAN_TxBufferAbortCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes);

void HAL_FDCAN_RxBufferNewMessageCallback(FDCAN_HandleTypeDef *hfdcan);

void HAL_FDCAN_HighPriorityMessageCallback(FDCAN_HandleTypeDef *hfdcan);

void HAL_FDCAN_TimestampWraparoundCallback(FDCAN_HandleTypeDef *hfdcan);

void HAL_FDCAN_TimeoutOccurredCallback(FDCAN_HandleTypeDef *hfdcan);

void HAL_FDCAN_ErrorCallback(FDCAN_HandleTypeDef *hfdcan);

void HAL_FDCAN_ErrorStatusCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t ErrorStatusITs);

void HAL_FDCAN_TT_ScheduleSyncCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTSchedSyncITs);

void HAL_FDCAN_TT_TimeMarkCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTTimeMarkITs);

void HAL_FDCAN_TT_StopWatchCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t SWTime, uint32_t SWCycleCount);

void HAL_FDCAN_TT_GlobalTimeCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTGlobTimeITs);

/* Peripheral State functions *************************************************/

uint32_t HAL_FDCAN_GetError(FDCAN_HandleTypeDef *hfdcan);

HAL_FDCAN_StateTypeDef HAL_FDCAN_GetState(FDCAN_HandleTypeDef *hfdcan);

/* Private types -------------------------------------------------------------*/

/* Private variables ---------------------------------------------------------*/

/* Private constants ---------------------------------------------------------*/

/* Private macros ------------------------------------------------------------*/

#define IS_FDCAN_FRAME_FORMAT(FORMAT) (((FORMAT) == FDCAN_FRAME_CLASSIC  ) || \

                                       ((FORMAT) == FDCAN_FRAME_FD_NO_BRS) || \

                                       ((FORMAT) == FDCAN_FRAME_FD_BRS   ))

#define IS_FDCAN_MODE(MODE) (((MODE) == FDCAN_MODE_NORMAL              ) || \

                             ((MODE) == FDCAN_MODE_RESTRICTED_OPERATION) || \

                             ((MODE) == FDCAN_MODE_BUS_MONITORING      ) || \

                             ((MODE) == FDCAN_MODE_INTERNAL_LOOPBACK   ) || \

                             ((MODE) == FDCAN_MODE_EXTERNAL_LOOPBACK   ))


#define IS_FDCAN_CLOCK_CALIBRATION(CALIBRATION) (((CALIBRATION) == FDCAN_CLOCK_CALIBRATION_DISABLE) || \

                                                 ((CALIBRATION) == FDCAN_CLOCK_CALIBRATION_ENABLE ))


#define IS_FDCAN_CKDIV(CKDIV) (((CKDIV) == FDCAN_CLOCK_DIV1 ) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV2 ) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV4 ) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV6 ) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV8 ) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV10) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV12) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV14) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV16) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV18) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV20) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV22) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV24) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV26) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV28) || \

                               ((CKDIV) == FDCAN_CLOCK_DIV30))

#define IS_FDCAN_NOMINAL_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 512U))

#define IS_FDCAN_NOMINAL_SJW(SJW) (((SJW) >= 1U) && ((SJW) <= 128U))

#define IS_FDCAN_NOMINAL_TSEG1(TSEG1) (((TSEG1) >= 1U) && ((TSEG1) <= 256U))

#define IS_FDCAN_NOMINAL_TSEG2(TSEG2) (((TSEG2) >= 1U) && ((TSEG2) <= 128U))

#define IS_FDCAN_DATA_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 32U))

#define IS_FDCAN_DATA_SJW(SJW) (((SJW) >= 1U) && ((SJW) <= 16U))

#define IS_FDCAN_DATA_TSEG1(TSEG1) (((TSEG1) >= 1U) && ((TSEG1) <= 32U))

#define IS_FDCAN_DATA_TSEG2(TSEG2) (((TSEG2) >= 1U) && ((TSEG2) <= 16U))

#define IS_FDCAN_MAX_VALUE(VALUE, MAX) ((VALUE) <= (MAX))

#define IS_FDCAN_MIN_VALUE(VALUE, MIN) ((VALUE) >= (MIN))

#define IS_FDCAN_DATA_SIZE(SIZE) (((SIZE) == FDCAN_DATA_BYTES_8 ) || \

                                  ((SIZE) == FDCAN_DATA_BYTES_12) || \

                                  ((SIZE) == FDCAN_DATA_BYTES_16) || \

                                  ((SIZE) == FDCAN_DATA_BYTES_20) || \

                                  ((SIZE) == FDCAN_DATA_BYTES_24) || \

                                  ((SIZE) == FDCAN_DATA_BYTES_32) || \

                                  ((SIZE) == FDCAN_DATA_BYTES_48) || \

                                  ((SIZE) == FDCAN_DATA_BYTES_64))

#define IS_FDCAN_TX_FIFO_QUEUE_MODE(MODE) (((MODE) == FDCAN_TX_FIFO_OPERATION ) || \

                                           ((MODE) == FDCAN_TX_QUEUE_OPERATION))

#define IS_FDCAN_ID_TYPE(ID_TYPE) (((ID_TYPE) == FDCAN_STANDARD_ID) || \

                                   ((ID_TYPE) == FDCAN_EXTENDED_ID))

#define IS_FDCAN_FILTER_CFG(CONFIG) (((CONFIG) == FDCAN_FILTER_DISABLE      ) || \

                                     ((CONFIG) == FDCAN_FILTER_TO_RXFIFO0   ) || \

                                     ((CONFIG) == FDCAN_FILTER_TO_RXFIFO1   ) || \

                                     ((CONFIG) == FDCAN_FILTER_REJECT       ) || \

                                     ((CONFIG) == FDCAN_FILTER_HP           ) || \

                                     ((CONFIG) == FDCAN_FILTER_TO_RXFIFO0_HP) || \

                                     ((CONFIG) == FDCAN_FILTER_TO_RXFIFO1_HP) || \

                                     ((CONFIG) == FDCAN_FILTER_TO_RXBUFFER  ))

#define IS_FDCAN_TX_LOCATION(LOCATION) (((LOCATION) == FDCAN_TX_BUFFER0 ) || ((LOCATION) == FDCAN_TX_BUFFER1 ) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER2 ) || ((LOCATION) == FDCAN_TX_BUFFER3 ) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER4 ) || ((LOCATION) == FDCAN_TX_BUFFER5 ) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER6 ) || ((LOCATION) == FDCAN_TX_BUFFER7 ) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER8 ) || ((LOCATION) == FDCAN_TX_BUFFER9 ) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER10) || ((LOCATION) == FDCAN_TX_BUFFER11) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER12) || ((LOCATION) == FDCAN_TX_BUFFER13) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER14) || ((LOCATION) == FDCAN_TX_BUFFER15) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER16) || ((LOCATION) == FDCAN_TX_BUFFER17) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER18) || ((LOCATION) == FDCAN_TX_BUFFER19) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER20) || ((LOCATION) == FDCAN_TX_BUFFER21) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER22) || ((LOCATION) == FDCAN_TX_BUFFER23) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER24) || ((LOCATION) == FDCAN_TX_BUFFER25) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER26) || ((LOCATION) == FDCAN_TX_BUFFER27) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER28) || ((LOCATION) == FDCAN_TX_BUFFER29) || \

                                        ((LOCATION) == FDCAN_TX_BUFFER30) || ((LOCATION) == FDCAN_TX_BUFFER31))

#define IS_FDCAN_RX_FIFO(FIFO) (((FIFO) == FDCAN_RX_FIFO0) || \

                                ((FIFO) == FDCAN_RX_FIFO1))

#define IS_FDCAN_RX_FIFO_MODE(MODE) (((MODE) == FDCAN_RX_FIFO_BLOCKING ) || \

                                     ((MODE) == FDCAN_RX_FIFO_OVERWRITE))

#define IS_FDCAN_STD_FILTER_TYPE(TYPE) (((TYPE) == FDCAN_FILTER_RANGE) || \

                                        ((TYPE) == FDCAN_FILTER_DUAL ) || \

                                        ((TYPE) == FDCAN_FILTER_MASK ))

#define IS_FDCAN_EXT_FILTER_TYPE(TYPE) (((TYPE) == FDCAN_FILTER_RANGE        ) || \

                                        ((TYPE) == FDCAN_FILTER_DUAL         ) || \

                                        ((TYPE) == FDCAN_FILTER_MASK         ) || \

                                        ((TYPE) == FDCAN_FILTER_RANGE_NO_EIDM))

#define IS_FDCAN_FRAME_TYPE(TYPE) (((TYPE) == FDCAN_DATA_FRAME  ) || \

                                   ((TYPE) == FDCAN_REMOTE_FRAME))

#define IS_FDCAN_DLC(DLC) (((DLC) == FDCAN_DLC_BYTES_0 ) || \

                           ((DLC) == FDCAN_DLC_BYTES_1 ) || \

                           ((DLC) == FDCAN_DLC_BYTES_2 ) || \

                           ((DLC) == FDCAN_DLC_BYTES_3 ) || \

                           ((DLC) == FDCAN_DLC_BYTES_4 ) || \

                           ((DLC) == FDCAN_DLC_BYTES_5 ) || \

                           ((DLC) == FDCAN_DLC_BYTES_6 ) || \

                           ((DLC) == FDCAN_DLC_BYTES_7 ) || \

                           ((DLC) == FDCAN_DLC_BYTES_8 ) || \

                           ((DLC) == FDCAN_DLC_BYTES_12) || \

                           ((DLC) == FDCAN_DLC_BYTES_16) || \

                           ((DLC) == FDCAN_DLC_BYTES_20) || \

                           ((DLC) == FDCAN_DLC_BYTES_24) || \

                           ((DLC) == FDCAN_DLC_BYTES_32) || \

                           ((DLC) == FDCAN_DLC_BYTES_48) || \

                           ((DLC) == FDCAN_DLC_BYTES_64))

#define IS_FDCAN_ESI(ESI) (((ESI) == FDCAN_ESI_ACTIVE ) || \

                           ((ESI) == FDCAN_ESI_PASSIVE))

#define IS_FDCAN_BRS(BRS) (((BRS) == FDCAN_BRS_OFF) || \

                           ((BRS) == FDCAN_BRS_ON ))

#define IS_FDCAN_FDF(FDF) (((FDF) == FDCAN_CLASSIC_CAN) || \

                           ((FDF) == FDCAN_FD_CAN     ))

#define IS_FDCAN_EFC(EFC) (((EFC) == FDCAN_NO_TX_EVENTS   ) || \

                           ((EFC) == FDCAN_STORE_TX_EVENTS))

#define IS_FDCAN_IT(IT) (((IT) & ~(FDCAN_IR_MASK | CCU_IR_MASK)) == 0U)

#define IS_FDCAN_TT_IT(IT) (((IT) & 0xFFF80000U) == 0U)

#define IS_FDCAN_FIFO_WATERMARK(FIFO) (((FIFO) == FDCAN_CFG_TX_EVENT_FIFO) || \

                                       ((FIFO) == FDCAN_CFG_RX_FIFO0     ) || \

                                       ((FIFO) == FDCAN_CFG_RX_FIFO1     ))

#define IS_FDCAN_NON_MATCHING(DESTINATION) (((DESTINATION) == FDCAN_ACCEPT_IN_RX_FIFO0) || \

                                            ((DESTINATION) == FDCAN_ACCEPT_IN_RX_FIFO1) || \

                                            ((DESTINATION) == FDCAN_REJECT            ))

#define IS_FDCAN_REJECT_REMOTE(DESTINATION) (((DESTINATION) == FDCAN_FILTER_REMOTE) || \

                                             ((DESTINATION) == FDCAN_REJECT_REMOTE))

#define IS_FDCAN_IT_LINE(IT_LINE) (((IT_LINE) == FDCAN_INTERRUPT_LINE0) || \

                                   ((IT_LINE) == FDCAN_INTERRUPT_LINE1))

#define IS_FDCAN_TIMESTAMP(OPERATION) (((OPERATION) == FDCAN_TIMESTAMP_INTERNAL) || \

                                       ((OPERATION) == FDCAN_TIMESTAMP_EXTERNAL))

#define IS_FDCAN_TIMESTAMP_PRESCALER(PRESCALER) (((PRESCALER) == FDCAN_TIMESTAMP_PRESC_1 ) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_2 ) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_3 ) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_4 ) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_5 ) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_6 ) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_7 ) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_8 ) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_9 ) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_10) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_11) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_12) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_13) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_14) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_15) || \

                                                 ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_16))

#define IS_FDCAN_TIMEOUT(OPERATION) (((OPERATION) == FDCAN_TIMEOUT_CONTINUOUS   ) || \

                                     ((OPERATION) == FDCAN_TIMEOUT_TX_EVENT_FIFO) || \

                                     ((OPERATION) == FDCAN_TIMEOUT_RX_FIFO0     ) || \

                                     ((OPERATION) == FDCAN_TIMEOUT_RX_FIFO1     ))

#define IS_FDCAN_CALIBRATION_FIELD_LENGTH(LENGTH) (((LENGTH) == FDCAN_CALIB_FIELD_LENGTH_32) || \

                                                   ((LENGTH) == FDCAN_CALIB_FIELD_LENGTH_64))

#define IS_FDCAN_CALIBRATION_COUNTER(COUNTER) (((COUNTER) == FDCAN_CALIB_TIME_QUANTA_COUNTER ) || \

                                               ((COUNTER) == FDCAN_CALIB_CLOCK_PERIOD_COUNTER) || \

                                               ((COUNTER) == FDCAN_CALIB_WATCHDOG_COUNTER    ))

#define IS_FDCAN_TT_REFERENCE_MESSAGE_PAYLOAD(PAYLOAD) (((PAYLOAD) == FDCAN_TT_REF_MESSAGE_NO_PAYLOAD ) || \

                                                        ((PAYLOAD) == FDCAN_TT_REF_MESSAGE_ADD_PAYLOAD))

#define IS_FDCAN_TT_REPEAT_FACTOR(FACTOR) (((FACTOR) == FDCAN_TT_REPEAT_EVERY_CYCLE     ) || \

                                           ((FACTOR) == FDCAN_TT_REPEAT_EVERY_2ND_CYCLE ) || \

                                           ((FACTOR) == FDCAN_TT_REPEAT_EVERY_4TH_CYCLE ) || \

                                           ((FACTOR) == FDCAN_TT_REPEAT_EVERY_8TH_CYCLE ) || \

                                           ((FACTOR) == FDCAN_TT_REPEAT_EVERY_16TH_CYCLE) || \

                                           ((FACTOR) == FDCAN_TT_REPEAT_EVERY_32ND_CYCLE) || \

                                           ((FACTOR) == FDCAN_TT_REPEAT_EVERY_64TH_CYCLE))

#define IS_FDCAN_TT_TRIGGER_TYPE(TYPE) (((TYPE) == FDCAN_TT_TX_REF_TRIGGER        ) || \

                                        ((TYPE) == FDCAN_TT_TX_REF_TRIGGER_GAP    ) || \

                                        ((TYPE) == FDCAN_TT_TX_TRIGGER_SINGLE     ) || \

                                        ((TYPE) == FDCAN_TT_TX_TRIGGER_CONTINUOUS ) || \

                                        ((TYPE) == FDCAN_TT_TX_TRIGGER_ARBITRATION) || \

                                        ((TYPE) == FDCAN_TT_TX_TRIGGER_MERGED     ) || \

                                        ((TYPE) == FDCAN_TT_WATCH_TRIGGER         ) || \

                                        ((TYPE) == FDCAN_TT_WATCH_TRIGGER_GAP     ) || \

                                        ((TYPE) == FDCAN_TT_RX_TRIGGER            ) || \

                                        ((TYPE) == FDCAN_TT_TIME_BASE_TRIGGER     ) || \

                                        ((TYPE) == FDCAN_TT_END_OF_LIST           ))

#define IS_FDCAN_TT_TM_EVENT_INTERNAL(EVENT) (((EVENT) == FDCAN_TT_TM_NO_INTERNAL_EVENT ) || \

                                              ((EVENT) == FDCAN_TT_TM_GEN_INTERNAL_EVENT))

#define IS_FDCAN_TT_TM_EVENT_EXTERNAL(EVENT) (((EVENT) == FDCAN_TT_TM_NO_EXTERNAL_EVENT ) || \

                                              ((EVENT) == FDCAN_TT_TM_GEN_EXTERNAL_EVENT))

#define IS_FDCAN_OPERATION_MODE(MODE) (((MODE) == FDCAN_TT_COMMUNICATION_LEVEL1 ) || \

                                       ((MODE) == FDCAN_TT_COMMUNICATION_LEVEL2 ) || \

                                       ((MODE) == FDCAN_TT_COMMUNICATION_LEVEL0 ))

#define IS_FDCAN_TT_OPERATION(OPERATION) (((OPERATION) == FDCAN_STRICTLY_TT_OPERATION      ) || \

                                          ((OPERATION) == FDCAN_EXT_EVT_SYNC_TT_OPERATION))

#define IS_FDCAN_TT_TIME_MASTER(FUNCTION) (((FUNCTION) == FDCAN_TT_SLAVE           ) || \

                                           ((FUNCTION) == FDCAN_TT_POTENTIAL_MASTER))

#define IS_FDCAN_TT_EXTERNAL_CLK_SYNC(SYNC) (((SYNC) == FDCAN_TT_EXT_CLK_SYNC_DISABLE) || \

                                             ((SYNC) == FDCAN_TT_EXT_CLK_SYNC_ENABLE ))

#define IS_FDCAN_TT_GLOBAL_TIME_FILTERING(FILTERING) (((FILTERING) == FDCAN_TT_GLOB_TIME_FILT_DISABLE) || \

                                                      ((FILTERING) == FDCAN_TT_GLOB_TIME_FILT_ENABLE ))

#define IS_FDCAN_TT_AUTO_CLK_CALIBRATION(CALIBRATION) (((CALIBRATION) == FDCAN_TT_AUTO_CLK_CALIB_DISABLE) || \

                                                       ((CALIBRATION) == FDCAN_TT_AUTO_CLK_CALIB_ENABLE ))

#define IS_FDCAN_TT_EVENT_TRIGGER_POLARITY(POLARITY) (((POLARITY) == FDCAN_TT_EVT_TRIG_POL_RISING ) || \

                                                      ((POLARITY) == FDCAN_TT_EVT_TRIG_POL_FALLING))

#define IS_FDCAN_TT_BASIC_CYCLES_NUMBER(NUMBER) (((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_1 ) || \

                                                 ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_2 ) || \

                                                 ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_4 ) || \

                                                 ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_8 ) || \

                                                 ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_16) || \

                                                 ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_32) || \

                                                 ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_64))

#define IS_FDCAN_TT_CYCLE_START_SYNC(SYNC) (((SYNC) == FDCAN_TT_NO_SYNC_PULSE         ) || \

                                            ((SYNC) == FDCAN_TT_SYNC_BASIC_CYCLE_START) || \

                                            ((SYNC) == FDCAN_TT_SYNC_MATRIX_START     ))

#define IS_FDCAN_TT_TX_ENABLE_WINDOW(NTU) (((NTU) >= 1U) && ((NTU) <= 16U))

#define IS_FDCAN_TT_TUR_NUMERATOR(NUMERATOR) (((NUMERATOR) >= 0x10000U) && ((NUMERATOR) <= 0x1FFFFU))

#define IS_FDCAN_TT_TUR_DENOMINATOR(DENOMINATOR) (((DENOMINATOR) >= 0x0001U) && ((DENOMINATOR) <= 0x3FFFU))

#define IS_FDCAN_TT_TUR_LEVEL_1(NC,DC) ((NC) >= (4U * (DC)))

#define IS_FDCAN_TT_TUR_LEVEL_0_2(NC,DC) ((NC) >= (8U * (DC)))

#define IS_FDCAN_TT_STOP_WATCH_TRIGGER(TRIGGER) (((TRIGGER) == FDCAN_TT_STOP_WATCH_TRIGGER_0) || \

                                                 ((TRIGGER) == FDCAN_TT_STOP_WATCH_TRIGGER_1) || \

                                                 ((TRIGGER) == FDCAN_TT_STOP_WATCH_TRIGGER_2) || \

                                                 ((TRIGGER) == FDCAN_TT_STOP_WATCH_TRIGGER_3))

#define IS_FDCAN_TT_EVENT_TRIGGER(TRIGGER) (((TRIGGER) == FDCAN_TT_EVENT_TRIGGER_0) || \

                                            ((TRIGGER) == FDCAN_TT_EVENT_TRIGGER_1) || \

                                            ((TRIGGER) == FDCAN_TT_EVENT_TRIGGER_2) || \

                                            ((TRIGGER) == FDCAN_TT_EVENT_TRIGGER_3))

#define IS_FDCAN_TT_TIME_PRESET(TIME) (((TIME) <= 0xFFFFU) && ((TIME) != 0x8000U))

#define IS_FDCAN_TT_STOP_WATCH_SOURCE(SOURCE) (((SOURCE) == FDCAN_TT_STOP_WATCH_DISABLED   ) || \

                                               ((SOURCE) == FDCAN_TT_STOP_WATCH_CYCLE_TIME ) || \

                                               ((SOURCE) == FDCAN_TT_STOP_WATCH_LOCAL_TIME ) || \

                                               ((SOURCE) == FDCAN_TT_STOP_WATCH_GLOBAL_TIME))

#define IS_FDCAN_TT_STOP_WATCH_POLARITY(POLARITY) (((POLARITY) == FDCAN_TT_STOP_WATCH_RISING ) || \

                                                   ((POLARITY) == FDCAN_TT_STOP_WATCH_FALLING))

#define IS_FDCAN_TT_REGISTER_TIME_MARK_SOURCE(SOURCE) (((SOURCE) == FDCAN_TT_REG_TIMEMARK_DIABLED ) || \

                                                       ((SOURCE) == FDCAN_TT_REG_TIMEMARK_CYC_TIME) || \

                                                       ((SOURCE) == FDCAN_TT_REG_TIMEMARK_LOC_TIME) || \

                                                       ((SOURCE) == FDCAN_TT_REG_TIMEMARK_GLO_TIME))


#define FDCAN_CHECK_IT_SOURCE(__IE__, __IT__)  ((((__IE__) & (__IT__)) == (__IT__)) ? SET : RESET)


#define FDCAN_CHECK_FLAG(__IR__, __FLAG__) ((((__IR__) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)

/* Private functions prototypes ----------------------------------------------*/

/* Private functions ---------------------------------------------------------*/

#endif /* FDCAN1 */


#ifdef __cplusplus

}

#endif


#endif /* STM32H7xx_HAL_FDCAN_H */


__IO
#define __IO
Definition: core_cm4.h:239

stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.

HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47

HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58

FDCAN_GlobalTypeDef
FD Controller Area Network.
Definition: stm32h723xx.h:315

TTCAN_TypeDef
TTFD Controller Area Network.
Definition: stm32h723xx.h:376