20#ifndef STM32H7xx_HAL_CEC_H
21#define STM32H7xx_HAL_CEC_H
51 uint32_t SignalFreeTime;
66 uint32_t BREErrorBitGen;
72 uint32_t LBPEErrorBitGen;
78 uint32_t BroadcastMsgNoErrorBitGen;
96 uint32_t SignalFreeTimeOption;
162typedef uint32_t HAL_CEC_StateTypeDef;
167#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
168typedef struct __CEC_HandleTypeDef
175 CEC_InitTypeDef Init;
177 const uint8_t *pTxBuffPtr;
179 uint16_t TxXferCount;
185 HAL_CEC_StateTypeDef gState;
189 HAL_CEC_StateTypeDef RxState;
195#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
196 void (* TxCpltCallback)(
struct __CEC_HandleTypeDef
198 void (* RxCpltCallback)(
struct __CEC_HandleTypeDef *hcec,
199 uint32_t RxFrameSize);
200 void (* ErrorCallback)(
struct __CEC_HandleTypeDef *hcec);
202 void (* MspInitCallback)(
struct __CEC_HandleTypeDef *hcec);
203 void (* MspDeInitCallback)(
struct __CEC_HandleTypeDef *hcec);
208#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
214 HAL_CEC_TX_CPLT_CB_ID = 0x00U,
215 HAL_CEC_RX_CPLT_CB_ID = 0x01U,
216 HAL_CEC_ERROR_CB_ID = 0x02U,
217 HAL_CEC_MSPINIT_CB_ID = 0x03U,
218 HAL_CEC_MSPDEINIT_CB_ID = 0x04U
219} HAL_CEC_CallbackIDTypeDef;
224typedef void (*pCEC_CallbackTypeDef)(CEC_HandleTypeDef *hcec);
225typedef void (*pCEC_RxCallbackTypeDef)(CEC_HandleTypeDef *hcec,
226 uint32_t RxFrameSize);
242#define HAL_CEC_STATE_RESET ((uint32_t)0x00000000)
244#define HAL_CEC_STATE_READY ((uint32_t)0x00000020)
246#define HAL_CEC_STATE_BUSY ((uint32_t)0x00000024)
248#define HAL_CEC_STATE_BUSY_RX ((uint32_t)0x00000022)
250#define HAL_CEC_STATE_BUSY_TX ((uint32_t)0x00000021)
252#define HAL_CEC_STATE_BUSY_RX_TX ((uint32_t)0x00000023)
254#define HAL_CEC_STATE_ERROR ((uint32_t)0x00000050)
262#define HAL_CEC_ERROR_NONE (uint32_t) 0x0000U
263#define HAL_CEC_ERROR_RXOVR CEC_ISR_RXOVR
264#define HAL_CEC_ERROR_BRE CEC_ISR_BRE
265#define HAL_CEC_ERROR_SBPE CEC_ISR_SBPE
266#define HAL_CEC_ERROR_LBPE CEC_ISR_LBPE
267#define HAL_CEC_ERROR_RXACKE CEC_ISR_RXACKE
268#define HAL_CEC_ERROR_ARBLST CEC_ISR_ARBLST
269#define HAL_CEC_ERROR_TXUDR CEC_ISR_TXUDR
270#define HAL_CEC_ERROR_TXERR CEC_ISR_TXERR
271#define HAL_CEC_ERROR_TXACKE CEC_ISR_TXACKE
272#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
273#define HAL_CEC_ERROR_INVALID_CALLBACK ((uint32_t)0x00002000U)
283#define CEC_DEFAULT_SFT ((uint32_t)0x00000000U)
284#define CEC_0_5_BITPERIOD_SFT ((uint32_t)0x00000001U)
285#define CEC_1_5_BITPERIOD_SFT ((uint32_t)0x00000002U)
286#define CEC_2_5_BITPERIOD_SFT ((uint32_t)0x00000003U)
287#define CEC_3_5_BITPERIOD_SFT ((uint32_t)0x00000004U)
288#define CEC_4_5_BITPERIOD_SFT ((uint32_t)0x00000005U)
289#define CEC_5_5_BITPERIOD_SFT ((uint32_t)0x00000006U)
290#define CEC_6_5_BITPERIOD_SFT ((uint32_t)0x00000007U)
299#define CEC_STANDARD_TOLERANCE ((uint32_t)0x00000000U)
300#define CEC_EXTENDED_TOLERANCE ((uint32_t)CEC_CFGR_RXTOL)
309#define CEC_NO_RX_STOP_ON_BRE ((uint32_t)0x00000000U)
310#define CEC_RX_STOP_ON_BRE ((uint32_t)CEC_CFGR_BRESTP)
319#define CEC_BRE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U)
320#define CEC_BRE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BREGEN)
329#define CEC_LBPE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U)
330#define CEC_LBPE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_LBPEGEN)
339#define CEC_BROADCASTERROR_ERRORBIT_GENERATION ((uint32_t)0x00000000U)
340#define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BRDNOGEN)
349#define CEC_SFT_START_ON_TXSOM ((uint32_t)0x00000000U)
350#define CEC_SFT_START_ON_TX_RX_END ((uint32_t)CEC_CFGR_SFTOPT)
359#define CEC_REDUCED_LISTENING_MODE ((uint32_t)0x00000000U)
360#define CEC_FULL_LISTENING_MODE ((uint32_t)CEC_CFGR_LSTN)
369#define CEC_CFGR_OAR_LSB_POS ((uint32_t) 16U)
378#define CEC_INITIATOR_LSB_POS ((uint32_t) 4U)
387#define CEC_OWN_ADDRESS_NONE ((uint16_t) 0x0000U)
388#define CEC_OWN_ADDRESS_0 ((uint16_t) 0x0001U)
389#define CEC_OWN_ADDRESS_1 ((uint16_t) 0x0002U)
390#define CEC_OWN_ADDRESS_2 ((uint16_t) 0x0004U)
391#define CEC_OWN_ADDRESS_3 ((uint16_t) 0x0008U)
392#define CEC_OWN_ADDRESS_4 ((uint16_t) 0x0010U)
393#define CEC_OWN_ADDRESS_5 ((uint16_t) 0x0020U)
394#define CEC_OWN_ADDRESS_6 ((uint16_t) 0x0040U)
395#define CEC_OWN_ADDRESS_7 ((uint16_t) 0x0080U)
396#define CEC_OWN_ADDRESS_8 ((uint16_t) 0x0100U)
397#define CEC_OWN_ADDRESS_9 ((uint16_t) 0x0200U)
398#define CEC_OWN_ADDRESS_10 ((uint16_t) 0x0400U)
399#define CEC_OWN_ADDRESS_11 ((uint16_t) 0x0800U)
400#define CEC_OWN_ADDRESS_12 ((uint16_t) 0x1000U)
401#define CEC_OWN_ADDRESS_13 ((uint16_t) 0x2000U)
402#define CEC_OWN_ADDRESS_14 ((uint16_t) 0x4000U)
411#define CEC_IT_TXACKE CEC_IER_TXACKEIE
412#define CEC_IT_TXERR CEC_IER_TXERRIE
413#define CEC_IT_TXUDR CEC_IER_TXUDRIE
414#define CEC_IT_TXEND CEC_IER_TXENDIE
415#define CEC_IT_TXBR CEC_IER_TXBRIE
416#define CEC_IT_ARBLST CEC_IER_ARBLSTIE
417#define CEC_IT_RXACKE CEC_IER_RXACKEIE
418#define CEC_IT_LBPE CEC_IER_LBPEIE
419#define CEC_IT_SBPE CEC_IER_SBPEIE
420#define CEC_IT_BRE CEC_IER_BREIE
421#define CEC_IT_RXOVR CEC_IER_RXOVRIE
422#define CEC_IT_RXEND CEC_IER_RXENDIE
423#define CEC_IT_RXBR CEC_IER_RXBRIE
432#define CEC_FLAG_TXACKE CEC_ISR_TXACKE
433#define CEC_FLAG_TXERR CEC_ISR_TXERR
434#define CEC_FLAG_TXUDR CEC_ISR_TXUDR
435#define CEC_FLAG_TXEND CEC_ISR_TXEND
436#define CEC_FLAG_TXBR CEC_ISR_TXBR
437#define CEC_FLAG_ARBLST CEC_ISR_ARBLST
438#define CEC_FLAG_RXACKE CEC_ISR_RXACKE
439#define CEC_FLAG_LBPE CEC_ISR_LBPE
440#define CEC_FLAG_SBPE CEC_ISR_SBPE
441#define CEC_FLAG_BRE CEC_ISR_BRE
442#define CEC_FLAG_RXOVR CEC_ISR_RXOVR
443#define CEC_FLAG_RXEND CEC_ISR_RXEND
444#define CEC_FLAG_RXBR CEC_ISR_RXBR
453#define CEC_ISR_ALL_ERROR ((uint32_t)CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|\
454 CEC_ISR_ARBLST|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)
463#define CEC_IER_RX_ALL_ERR ((uint32_t)CEC_IER_RXACKEIE|CEC_IER_LBPEIE|CEC_IER_SBPEIE|CEC_IER_BREIE|CEC_IER_RXOVRIE)
472#define CEC_IER_TX_ALL_ERR ((uint32_t)CEC_IER_TXACKEIE|CEC_IER_TXERRIE|CEC_IER_TXUDRIE|CEC_IER_ARBLSTIE)
491#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
492#define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{ \
493 (__HANDLE__)->gState = HAL_CEC_STATE_RESET; \
494 (__HANDLE__)->RxState = HAL_CEC_STATE_RESET; \
495 (__HANDLE__)->MspInitCallback = NULL; \
496 (__HANDLE__)->MspDeInitCallback = NULL; \
499#define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{ \
500 (__HANDLE__)->gState = HAL_CEC_STATE_RESET; \
501 (__HANDLE__)->RxState = HAL_CEC_STATE_RESET; \
522#define __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
543#define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR |= (__FLAG__))
564#define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
585#define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
606#define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
612#define __HAL_CEC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_CECEN)
618#define __HAL_CEC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CEC_CR_CECEN)
624#define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXSOM)
631#define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXEOM)
637#define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXSOM)
643#define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXEOM)
649#define __HAL_CEC_CLEAR_OAR(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_OAR)
657#define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) SET_BIT((__HANDLE__)->Instance->CFGR, \
658 (__ADDRESS__)<< CEC_CFGR_OAR_LSB_POS)
675HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress);
676void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
677void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
679#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
680HAL_StatusTypeDef HAL_CEC_RegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID,
681 pCEC_CallbackTypeDef pCallback);
682HAL_StatusTypeDef HAL_CEC_UnRegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID);
684HAL_StatusTypeDef HAL_CEC_RegisterRxCpltCallback(CEC_HandleTypeDef *hcec, pCEC_RxCallbackTypeDef pCallback);
695HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress,
696 const uint8_t *pData, uint32_t Size);
697uint32_t HAL_CEC_GetLastReceivedFrameSize(
const CEC_HandleTypeDef *hcec);
698void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t *Rxbuffer);
699void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
700void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
701void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize);
702void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec);
711HAL_CEC_StateTypeDef HAL_CEC_GetState(
const CEC_HandleTypeDef *hcec);
712uint32_t HAL_CEC_GetError(
const CEC_HandleTypeDef *hcec);
757#define IS_CEC_SIGNALFREETIME(__SFT__) ((__SFT__) <= CEC_CFGR_SFT)
759#define IS_CEC_TOLERANCE(__RXTOL__) (((__RXTOL__) == CEC_STANDARD_TOLERANCE) || \
760 ((__RXTOL__) == CEC_EXTENDED_TOLERANCE))
762#define IS_CEC_BRERXSTOP(__BRERXSTOP__) (((__BRERXSTOP__) == CEC_NO_RX_STOP_ON_BRE) || \
763 ((__BRERXSTOP__) == CEC_RX_STOP_ON_BRE))
765#define IS_CEC_BREERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_NO_GENERATION) || \
766 ((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_GENERATION))
768#define IS_CEC_LBPEERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_NO_GENERATION) || \
769 ((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_GENERATION))
771#define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(__ERRORBITGEN__) \
772 (((__ERRORBITGEN__) == CEC_BROADCASTERROR_ERRORBIT_GENERATION) || \
773 ((__ERRORBITGEN__) == CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION))
775#define IS_CEC_SFTOP(__SFTOP__) (((__SFTOP__) == CEC_SFT_START_ON_TXSOM) || \
776 ((__SFTOP__) == CEC_SFT_START_ON_TX_RX_END))
778#define IS_CEC_LISTENING_MODE(__MODE__) (((__MODE__) == CEC_REDUCED_LISTENING_MODE) || \
779 ((__MODE__) == CEC_FULL_LISTENING_MODE))
788#define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0x10U)
795#define IS_CEC_OWN_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x7FFFU)
802#define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xFU)
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
Consumer Electronics Control.
Definition: stm32h723xx.h:418