44 uint32_t rx_fifo_data;
45 uint32_t rx_fifo_data_aliases [7];
46 uint32_t tx_fifo_data;
47 uint32_t tx_fifo_data_aliases [7];
48 uint32_t rx_fifo_status;
49 uint32_t rx_fifo_status_peek;
50 uint32_t tx_fifo_status;
51 uint32_t tx_fifo_status_peek;
74 uint32_t mac_csr_data;
84#ifdef SMSC9218I_BIG_ENDIAN_SUPPORT
98#ifdef SMSC9218I_BIG_ENDIAN_SUPPORT
99 #define SMSC9218I_BIT_POS(pos) (pos)
101 #define SMSC9218I_BIT_POS(pos) \
103 ((pos) > 23 ? (pos) - 24 : (pos) - 8) \
104 : ((pos) > 7 ? (pos) + 8 : (pos) + 24))
107#define SMSC9218I_FLAG(pos) \
108 (1U << SMSC9218I_BIT_POS(pos))
110#define SMSC9218I_FIELD_8(val, pos) \
111 (((val) & 0xff) << SMSC9218I_BIT_POS(pos))
113#define SMSC9218I_GET_FIELD_8(reg, pos) \
114 (((reg) >> SMSC9218I_BIT_POS(pos)) & 0xff)
116#define SMSC9218I_FIELD_16(val, pos) \
117 (SMSC9218I_FIELD_8((val) >> 8, (pos) + 8) \
118 | SMSC9218I_FIELD_8((val), pos))
120#define SMSC9218I_GET_FIELD_16(reg, pos) \
121 ((SMSC9218I_GET_FIELD_8(reg, (pos) + 8) << 8) \
122 | SMSC9218I_GET_FIELD_8(reg, pos))
124#ifdef SMSC9218I_BIG_ENDIAN_SUPPORT
125 #define SMSC9218I_SWAP(val) (val)
127 #define SMSC9218I_SWAP(val) \
128 ((((val) >> 24) & 0xff) \
129 | ((((val) >> 16) & 0xff) << 8) \
130 | ((((val) >> 8) & 0xff) << 16) \
131 | (((val) & 0xff) << 24))
139#define SMSC9218I_RX_STS_FILTER_FAIL SMSC9218I_FLAG(30)
140#define SMSC9218I_RX_STS_GET_LENGTH(reg) (SMSC9218I_GET_FIELD_16(reg, 16) & 0x3fff)
141#define SMSC9218I_RX_STS_ERROR SMSC9218I_FLAG(15)
142#define SMSC9218I_RX_STS_BROADCAST SMSC9218I_FLAG(13)
143#define SMSC9218I_RX_STS_ERROR_LENGTH SMSC9218I_FLAG(12)
144#define SMSC9218I_RX_STS_ERROR_RUNT_FRAME SMSC9218I_FLAG(11)
145#define SMSC9218I_RX_STS_MULTICAST SMSC9218I_FLAG(10)
146#define SMSC9218I_RX_STS_ERROR_TOO_LONG SMSC9218I_FLAG(7)
147#define SMSC9218I_RX_STS_ERROR_COLLISION SMSC9218I_FLAG(6)
148#define SMSC9218I_RX_STS_TYPE SMSC9218I_FLAG(5)
149#define SMSC9218I_RX_STS_WATCHDOG SMSC9218I_FLAG(4)
150#define SMSC9218I_RX_STS_ERROR_MII SMSC9218I_FLAG(3)
151#define SMSC9218I_RX_STS_DRIBBLING_BIT SMSC9218I_FLAG(2)
152#define SMSC9218I_RX_STS_ERROR_CRC SMSC9218I_FLAG(1)
161#define SMSC9218I_TX_STS_GET_TAG(reg) SMSC9218I_GET_FIELD_16(reg, 16)
162#define SMSC9218I_TX_STS_ERROR SMSC9218I_FLAG(15)
163#define SMSC9218I_TX_STS_ERROR_LOSS_OF_CARRIER SMSC9218I_FLAG(11)
164#define SMSC9218I_TX_STS_ERROR_NO_CARRIER SMSC9218I_FLAG(10)
165#define SMSC9218I_TX_STS_ERROR_LATE_COLLISION SMSC9218I_FLAG(9)
166#define SMSC9218I_TX_STS_ERROR_EXCESSIVE_COLLISIONS SMSC9218I_FLAG(8)
167#define SMSC9218I_TX_STS_ERROR_EXCESSIVE_DEFERRAL SMSC9218I_FLAG(2)
168#define SMSC9218I_TX_STS_ERROR_DEFERRED SMSC9218I_FLAG(0)
177#define SMSC9218I_TX_A_IOC SMSC9218I_FLAG(31)
178#define SMSC9218I_TX_A_END_ALIGN_4 0
179#define SMSC9218I_TX_A_END_ALIGN_16 SMSC9218I_FLAG(24)
180#define SMSC9218I_TX_A_END_ALIGN_32 SMSC9218I_FLAG(25)
181#define SMSC9218I_TX_A_DOFF(val) SMSC9218I_FIELD_8(val, 16)
182#define SMSC9218I_TX_A_FIRST SMSC9218I_FLAG(13)
183#define SMSC9218I_TX_A_LAST SMSC9218I_FLAG(12)
184#define SMSC9218I_TX_A_FRAGMENT_LENGTH(val) SMSC9218I_FIELD_16(val, 0)
193#define SMSC9218I_TX_B_TAG(val) SMSC9218I_FIELD_16(val, 16)
194#define SMSC9218I_TX_B_GET_TAG(reg) SMSC9218I_GET_FIELD_16(reg, 16)
195#define SMSC9218I_TX_B_DISABLE_CRC SMSC9218I_FLAG(13)
196#define SMSC9218I_TX_B_DISABLE_PAD SMSC9218I_FLAG(12)
197#define SMSC9218I_TX_B_FRAME_LENGTH(val) SMSC9218I_FIELD_16(val, 0)
206#define SMSC9218I_ID_REV_GET_ID(reg) SMSC9218I_GET_FIELD_16(reg, 16)
207#define SMSC9218I_ID_REV_GET_REV(reg) SMSC9218I_GET_FIELD_16(reg, 0)
208#define SMSC9218I_ID_REV_ID_CHIP_118 0x0118U
209#define SMSC9218I_ID_REV_ID_CHIP_218 0x118aU
218#define SMSC9218I_IRQ_CFG_INT_DEAS(val) SMSC9218I_FIELD_8(val, 24)
219#define SMSC9218I_IRQ_CFG_GET_INT_DEAS(reg) SMSC9218I_GET_FIELD_8(reg, 24)
220#define SMSC9218I_IRQ_CFG_INT_DEAS_CLR SMSC9218I_FLAG(14)
221#define SMSC9218I_IRQ_CFG_INT_DEAS_STS SMSC9218I_FLAG(13)
222#define SMSC9218I_IRQ_CFG_IRQ_INT SMSC9218I_FLAG(12)
223#define SMSC9218I_IRQ_CFG_IRQ_EN SMSC9218I_FLAG(8)
224#define SMSC9218I_IRQ_CFG_IRQ_POL SMSC9218I_FLAG(4)
225#define SMSC9218I_IRQ_CFG_IRQ_TYPE SMSC9218I_FLAG(0)
234#define SMSC9218I_INT_SW SMSC9218I_FLAG(31)
235#define SMSC9218I_INT_TXSTOP SMSC9218I_FLAG(25)
236#define SMSC9218I_INT_RXSTOP SMSC9218I_FLAG(24)
237#define SMSC9218I_INT_RXDFH SMSC9218I_FLAG(23)
238#define SMSC9218I_INT_TIOC SMSC9218I_FLAG(21)
239#define SMSC9218I_INT_RXD SMSC9218I_FLAG(20)
240#define SMSC9218I_INT_GPT SMSC9218I_FLAG(19)
241#define SMSC9218I_INT_PHY SMSC9218I_FLAG(18)
242#define SMSC9218I_INT_PME SMSC9218I_FLAG(17)
243#define SMSC9218I_INT_TXSO SMSC9218I_FLAG(16)
244#define SMSC9218I_INT_RWT SMSC9218I_FLAG(15)
245#define SMSC9218I_INT_RXE SMSC9218I_FLAG(14)
246#define SMSC9218I_INT_TXE SMSC9218I_FLAG(13)
247#define SMSC9218I_INT_TDFO SMSC9218I_FLAG(10)
248#define SMSC9218I_INT_TDFA SMSC9218I_FLAG(9)
249#define SMSC9218I_INT_TSFF SMSC9218I_FLAG(8)
250#define SMSC9218I_INT_TSFL SMSC9218I_FLAG(7)
251#define SMSC9218I_INT_RSFF SMSC9218I_FLAG(4)
252#define SMSC9218I_INT_RSFL SMSC9218I_FLAG(3)
253#define SMSC9218I_INT_GPIO2 SMSC9218I_FLAG(2)
254#define SMSC9218I_INT_GPIO1 SMSC9218I_FLAG(1)
255#define SMSC9218I_INT_GPIO0 SMSC9218I_FLAG(0)
264#define SMSC9218I_BYTE_TEST SMSC9218I_SWAP(0x87654321U)
273#define SMSC9218I_FIFO_INT_TDAL(val) SMSC9218I_FIELD_8(val, 24)
274#define SMSC9218I_FIFO_INT_GET_TDAL(reg) SMSC9218I_GET_FIELD_8(reg, 24)
275#define SMSC9218I_FIFO_INT_TSL(val) SMSC9218I_FIELD_8(val, 16)
276#define SMSC9218I_FIFO_INT_GET_TSL(reg) SMSC9218I_GET_FIELD_8(reg, 16)
277#define SMSC9218I_FIFO_INT_RSL(val) SMSC9218I_FIELD_8(val, 0)
278#define SMSC9218I_FIFO_INT_GET_RSL(reg) SMSC9218I_GET_FIELD_8(reg, 0)
287#define SMSC9218I_RX_CFG_END_ALIGN_4 0
288#define SMSC9218I_RX_CFG_END_ALIGN_16 SMSC9218I_FLAG(30)
289#define SMSC9218I_RX_CFG_END_ALIGN_32 SMSC9218I_FLAG(31)
290#define SMSC9218I_RX_CFG_DMA_CNT(val) SMSC9218I_FIELD_8(val, 24)
291#define SMSC9218I_RX_CFG_GET_DMA_CNT(reg) SMSC9218I_GET_FIELD_8(reg, 24)
292#define SMSC9218I_RX_CFG_DUMP SMSC9218I_FLAG(15)
293#define SMSC9218I_RX_CFG_DOFF(val) SMSC9218I_FIELD_8(val, 8)
294#define SMSC9218I_RX_CFG_GET_DOFF(reg) SMSC9218I_GET_FIELD_8(reg, 8)
303#define SMSC9218I_TX_CFG_SDUMP SMSC9218I_FLAG(15)
304#define SMSC9218I_TX_CFG_DDUMP SMSC9218I_FLAG(14)
305#define SMSC9218I_TX_CFG_SAO SMSC9218I_FLAG(2)
306#define SMSC9218I_TX_CFG_ON SMSC9218I_FLAG(1)
307#define SMSC9218I_TX_CFG_STOP SMSC9218I_FLAG(0)
316#define SMSC9218I_HW_CFG_LED_3 SMSC9218I_FLAG(30)
317#define SMSC9218I_HW_CFG_LED_2 SMSC9218I_FLAG(29)
318#define SMSC9218I_HW_CFG_LED_1 SMSC9218I_FLAG(28)
319#define SMSC9218I_HW_CFG_AMDIX SMSC9218I_FLAG(24)
320#define SMSC9218I_HW_CFG_MBO SMSC9218I_FLAG(20)
321#define SMSC9218I_HW_CFG_TX_FIF_SZ(val) SMSC9218I_FIELD_8(val, 16)
322#define SMSC9218I_HW_CFG_GET_TX_FIF_SZ(reg) SMSC9218I_GET_FIELD_8(reg, 16)
323#define SMSC9218I_HW_CFG_BITMD_32 SMSC9218I_FLAG(2)
324#define SMSC9218I_HW_CFG_SRST_TO SMSC9218I_FLAG(1)
325#define SMSC9218I_HW_CFG_SRST SMSC9218I_FLAG(0)
334#define SMSC9218I_RX_DP_CTRL_FFWD SMSC9218I_FLAG(31)
343#define SMSC9218I_RX_FIFO_INF_GET_SUSED(reg) SMSC9218I_GET_FIELD_8(reg, 16)
344#define SMSC9218I_RX_FIFO_INF_GET_DUSED(reg) SMSC9218I_GET_FIELD_16(reg, 0)
353#define SMSC9218I_TX_FIFO_INF_GET_SUSED(reg) SMSC9218I_GET_FIELD_8(reg, 16)
354#define SMSC9218I_TX_FIFO_INF_GET_FREE(reg) SMSC9218I_GET_FIELD_16(reg, 0)
363#define SMSC9218I_PMT_CTRL_PM_MODE_D0 0
364#define SMSC9218I_PMT_CTRL_PM_MODE_D1 SMSC9218I_FLAG(12)
365#define SMSC9218I_PMT_CTRL_PM_MODE_D2 SMSC9218I_FLAG(13)
366#define SMSC9218I_PMT_CTRL_PHY_RST SMSC9218I_FLAG(10)
367#define SMSC9218I_PMT_CTRL_WOL_EN SMSC9218I_FLAG(9)
368#define SMSC9218I_PMT_CTRL_ED_EN SMSC9218I_FLAG(8)
369#define SMSC9218I_PMT_CTRL_PME_TYPE_PUPU SMSC9218I_FLAG(6)
370#define SMSC9218I_PMT_CTRL_WUPS_NO 0
371#define SMSC9218I_PMT_CTRL_WUPS_ENERGY SMSC9218I_FLAG(4)
372#define SMSC9218I_PMT_CTRL_WUPS_MAGIC SMSC9218I_FLAG(5)
373#define SMSC9218I_PMT_CTRL_PME_IND SMSC9218I_FLAG(3)
374#define SMSC9218I_PMT_CTRL_PME_POL SMSC9218I_FLAG(2)
375#define SMSC9218I_PMT_CTRL_PME_EN SMSC9218I_FLAG(1)
376#define SMSC9218I_PMT_CTRL_READY SMSC9218I_FLAG(0)
385#define SMSC9218I_GPIO_CFG_LED3 SMSC9218I_FLAG(30)
386#define SMSC9218I_GPIO_CFG_LED2 SMSC9218I_FLAG(29)
387#define SMSC9218I_GPIO_CFG_LED1 SMSC9218I_FLAG(28)
388#define SMSC9218I_GPIO_CFG_GPIO2_INT_POL SMSC9218I_FLAG(26)
389#define SMSC9218I_GPIO_CFG_GPIO1_INT_POL SMSC9218I_FLAG(25)
390#define SMSC9218I_GPIO_CFG_GPIO0_INT_POL SMSC9218I_FLAG(24)
391#define SMSC9218I_GPIO_CFG_GPIOBUF2 SMSC9218I_FLAG(18)
392#define SMSC9218I_GPIO_CFG_GPIOBUF1 SMSC9218I_FLAG(17)
393#define SMSC9218I_GPIO_CFG_GPIOBUF0 SMSC9218I_FLAG(16)
394#define SMSC9218I_GPIO_CFG_GPIODIR2 SMSC9218I_FLAG(10)
395#define SMSC9218I_GPIO_CFG_GPIODIR1 SMSC9218I_FLAG(9)
396#define SMSC9218I_GPIO_CFG_GPIODIR0 SMSC9218I_FLAG(8)
397#define SMSC9218I_GPIO_CFG_GPO4 SMSC9218I_FLAG(4)
398#define SMSC9218I_GPIO_CFG_GPO3 SMSC9218I_FLAG(3)
399#define SMSC9218I_GPIO_CFG_GPIO0 SMSC9218I_FLAG(0)
400#define SMSC9218I_GPIO_CFG_GPIO2 SMSC9218I_FLAG(2)
401#define SMSC9218I_GPIO_CFG_GPIO1 SMSC9218I_FLAG(1)
410#define SMSC9218I_GPT_CFG_TIMER_EN SMSC9218I_FLAG(29)
411#define SMSC9218I_GPT_CFG_LOAD(val) SMSC9218I_FIELD_16(val, 0)
412#define SMSC9218I_GPT_CFG_GET_LOAD(reg) SMSC9218I_GET_FIELD_16(reg, 0)
421#define SMSC9218I_GPT_CNT_GET_CNT SMSC9218I_GET_FIELD_16(reg, 0)
430#define SMSC9218I_ENDIAN_BIG 0xffffffffU
439#define SMSC9218I_FREE_RUN_GET(reg) SMSC9218I_SWAP(reg)
448#define SMSC9218I_RX_DROP_GET(reg) SMSC9218I_SWAP(reg)
457#define SMSC9218I_E2P_CMD_EPC_BUSY SMSC9218I_FLAG(31)
466#define SMSC9218I_MAC_CSR_CMD_BUSY SMSC9218I_FLAG(31)
467#define SMSC9218I_MAC_CSR_CMD_READ SMSC9218I_FLAG(30)
468#define SMSC9218I_MAC_CSR_CMD_ADDR(val) SMSC9218I_FIELD_8(val, 0)
469#define SMSC9218I_MAC_CSR_CMD_GET_ADDR(reg) SMSC9218I_GET_FIELD_8(reg, 0)
478#define SMSC9218I_MAC_CR 0x00000001U
479#define SMSC9218I_MAC_CR_RXALL 0x80000000U
480#define SMSC9218I_MAC_CR_HBDIS 0x10000000U
481#define SMSC9218I_MAC_CR_RCVOWN 0x00800000U
482#define SMSC9218I_MAC_CR_LOOPBK 0x00200000U
483#define SMSC9218I_MAC_CR_FDPX 0x00100000U
484#define SMSC9218I_MAC_CR_MCPAS 0x00080000U
485#define SMSC9218I_MAC_CR_PRMS 0x00040000U
486#define SMSC9218I_MAC_CR_INVFILT 0x00020000U
487#define SMSC9218I_MAC_CR_PASSBAD 0x00010000U
488#define SMSC9218I_MAC_CR_HFILT 0x00008000U
489#define SMSC9218I_MAC_CR_HPFILT 0x00002000U
490#define SMSC9218I_MAC_CR_LCOLL 0x00001000U
491#define SMSC9218I_MAC_CR_BCAST 0x00000800U
492#define SMSC9218I_MAC_CR_DISRTY 0x00000400U
493#define SMSC9218I_MAC_CR_PADSTR 0x00000100U
494#define SMSC9218I_MAC_CR_BOLMT_MASK 0x000000c0U
495#define SMSC9218I_MAC_CR_BOLMT_10 0x00000000U
496#define SMSC9218I_MAC_CR_BOLMT_8 0x00000040U
497#define SMSC9218I_MAC_CR_BOLMT_4 0x00000080U
498#define SMSC9218I_MAC_CR_BOLMT_1 0x000000c0U
499#define SMSC9218I_MAC_CR_DFCHK 0x00000020U
500#define SMSC9218I_MAC_CR_TXEN 0x00000008U
501#define SMSC9218I_MAC_CR_RXEN 0x00000004U
510#define SMSC9218I_MAC_ADDRH 0x00000002U
511#define SMSC9218I_MAC_ADDRH_MASK 0x0000ffffU
520#define SMSC9218I_MAC_ADDRL 0x00000003U
521#define SMSC9218I_MAC_ADDRL_MASK 0xffffffffU
530#define SMSC9218I_MAC_HASHH 0x00000004U
531#define SMSC9218I_MAC_HASHH_MASK 0xffffffffU
540#define SMSC9218I_MAC_HASHL 0x00000005U
541#define SMSC9218I_MAC_HASHL_MASK 0xffffffffU
550#define SMSC9218I_MAC_MII_ACC 0x00000006U
551#define SMSC9218I_MAC_MII_ACC_PHY_DEFAULT (1U << 11)
552#define SMSC9218I_MAC_MII_ACC_WRITE (1U << 1)
553#define SMSC9218I_MAC_MII_ACC_BUSY (1U << 0)
554#define SMSC9218I_MAC_MII_ACC_ADDR(addr) ((addr) << 6)
563#define SMSC9218I_MAC_MII_DATA 0x00000007U
572#define SMSC9218I_MAC_FLOW 0x00000008U
573#define SMSC9218I_MAC_FLOW_FCPT_MASK 0xffff0000U
574#define SMSC9218I_MAC_FLOW_FCPASS 0x00000004U
575#define SMSC9218I_MAC_FLOW_FCEN 0x00000002U
576#define SMSC9218I_MAC_FLOW_FCBSY 0x00000001U
585#define SMSC9218I_MAC_VLAN1 0x00000009U
594#define SMSC9218I_MAC_VLAN2 0x0000000aU
603#define SMSC9218I_MAC_WUFF 0x0000000bU
612#define SMSC9218I_MAC_WUCSR 0x0000000cU
613#define SMSC9218I_MAC_WUCSR_GUE 0x00000200U
614#define SMSC9218I_MAC_WUCSR_WUFR 0x00000040U
615#define SMSC9218I_MAC_WUCSR_MPR 0x00000020U
616#define SMSC9218I_MAC_WUCSR_WUEN 0x00000004U
617#define SMSC9218I_MAC_WUCSR_MPEN 0x00000002U
626#define SMSC9218I_PHY_ID1_LAN9118 0x7
635#define SMSC9218I_PHY_ID2_LAN9218 0xc0c3
644#define SMSC9218I_PHY_MCSR 0x00000011U
645#define SMSC9218I_PHY_MCSR_EDPWRDOWN 0x00002000U
646#define SMSC9218I_PHY_MCSR_ENERGYON 0x00000002U
655#define SMSC9218I_PHY_SPMODES 0x00000012U
664#define SMSC9218I_PHY_CSIR 0x0000001bU
665#define SMSC9218I_PHY_CSIR_SQEOFF 0x00000800U
666#define SMSC9218I_PHY_CSIR_FEFIEN 0x00000020U
667#define SMSC9218I_PHY_CSIR_XPOL 0x00000010U
676#define SMSC9218I_PHY_ISR 0x0000001dU
677#define SMSC9218I_PHY_ISR_INT7 0x00000080U
678#define SMSC9218I_PHY_ISR_INT6 0x00000040U
679#define SMSC9218I_PHY_ISR_INT5 0x00000020U
680#define SMSC9218I_PHY_ISR_INT4 0x00000010U
681#define SMSC9218I_PHY_ISR_INT3 0x00000008U
682#define SMSC9218I_PHY_ISR_INT2 0x00000004U
683#define SMSC9218I_PHY_ISR_INT1 0x00000002U
692#define SMSC9218I_PHY_IMR 0x0000001eU
693#define SMSC9218I_PHY_IMR_INT7 0x00000080U
694#define SMSC9218I_PHY_IMR_INT6 0x00000040U
695#define SMSC9218I_PHY_IMR_INT5 0x00000020U
696#define SMSC9218I_PHY_IMR_INT4 0x00000010U
697#define SMSC9218I_PHY_IMR_INT3 0x00000008U
698#define SMSC9218I_PHY_IMR_INT2 0x00000004U
699#define SMSC9218I_PHY_IMR_INT1 0x00000002U
708#define SMSC9218I_PHY_PHYSCSR 0x0000001fU
709#define SMSC9218I_PHY_PHYSCSR_ANDONE 0x00001000U
710#define SMSC9218I_PHY_PHYSCSR_4B5B_EN 0x00000040U
711#define SMSC9218I_PHY_PHYSCSR_SPEED_MASK 0x0000001cU
712#define SMSC9218I_PHY_PHYSCSR_SPEED_10HD 0x00000004U
713#define SMSC9218I_PHY_PHYSCSR_SPEED_10FD 0x00000014U
714#define SMSC9218I_PHY_PHYSCSR_SPEED_100HD 0x00000008U
715#define SMSC9218I_PHY_PHYSCSR_SPEED_100FD 0x00000018U
Definition: smsc9218i.h:43