RTEMS 6.1-rc1
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Modules | |
PowerPC Exception Frame | |
Files | |
file | vectors.h |
PowerPC Exceptions API. | |
file | ppc_exc_address.c |
PowerPC Exceptions implementation. | |
file | ppc_exc_categories.c |
PowerPC Exceptions implementation. | |
file | ppc_exc_global_handler.c |
PowerPC Exceptions implementation. | |
file | ppc_exc_initialize.c |
PowerPC Exceptions implementation. | |
file | ppc_exc_print.c |
PowerPC Exceptions implementation. | |
file | ppc_exc_prologue.c |
PowerPC Exceptions implementation. | |
Typedefs | |
typedef void(* | exception_handler_t) (BSP_Exception_frame *) |
Global exception handler type. | |
typedef uint8_t | ppc_exc_categories[LAST_VALID_EXC+1] |
Categorie set type. | |
typedef int(* | ppc_exc_handler_t) (BSP_Exception_frame *f, unsigned vector) |
High-level exception handler type. More... | |
Enumerations | |
enum | ppc_exc_category { PPC_EXC_INVALID = 0 , PPC_EXC_ASYNC = 1 , PPC_EXC_CLASSIC = 2 , PPC_EXC_CLASSIC_ASYNC = PPC_EXC_CLASSIC | PPC_EXC_ASYNC , PPC_EXC_405_CRITICAL = 4 , PPC_EXC_405_CRITICAL_ASYNC = PPC_EXC_405_CRITICAL | PPC_EXC_ASYNC , PPC_EXC_BOOKE_CRITICAL = 6 , PPC_EXC_BOOKE_CRITICAL_ASYNC = PPC_EXC_BOOKE_CRITICAL | PPC_EXC_ASYNC , PPC_EXC_E500_MACHCHK = 8 , PPC_EXC_E500_MACHCHK_ASYNC = PPC_EXC_E500_MACHCHK | PPC_EXC_ASYNC , PPC_EXC_NAKED = 10 } |
Exception categories. More... | |
Functions | |
void | C_exception_handler (BSP_Exception_frame *excPtr) |
Default global exception handler. | |
void | BSP_printStackTrace (const BSP_Exception_frame *excPtr) |
void * | ppc_exc_vector_address (unsigned vector, void *vector_base) |
Returns the entry address of the vector. More... | |
const ppc_exc_categories * | ppc_exc_categories_for_cpu (ppc_cpu_id_t cpu) |
Returns the category set for a CPU of type cpu, or NULL if there is no category set available for this CPU. | |
ppc_exc_category | ppc_exc_category_for_vector (const ppc_exc_categories *categories, unsigned vector) |
Returns the category for the vector vector using the category set categories. | |
rtems_status_code | ppc_exc_make_prologue (unsigned vector, void *vector_base, ppc_exc_category category, uint32_t *prologue, size_t *prologue_size) |
Makes a minimal prologue for the vector vector with the category category. More... | |
void | ppc_exc_initialize_with_vector_base (uintptr_t interrupt_stack_begin, void *vector_base) |
Initializes the exception handling. More... | |
int | ppc_exc_handler_default (BSP_Exception_frame *f, unsigned int vector) |
Default high-level exception handler. More... | |
rtems_status_code | ppc_exc_set_handler (unsigned vector, ppc_exc_handler_t hdl) |
Set high-level exception handler. More... | |
ppc_exc_handler_t | ppc_exc_get_handler (unsigned vector) |
Returns the currently active high-level exception handler. | |
void | ppc_exc_wrapup (BSP_Exception_frame *f) |
int | ppc_exc_alignment_handler (BSP_Exception_frame *frame, unsigned excNum) |
Standard aligment handler. More... | |
Variables | |
uint32_t | ppc_exc_msr_bits |
Bits for MSR update. More... | |
uint32_t | ppc_exc_cache_wb_check |
Cache write back check flag. More... | |
ppc_exc_handler_t | ppc_exc_handler_table [LAST_VALID_EXC+1] |
High-level exception handler table. | |
exception_handler_t | globalExceptHdl |
Global exception handler. | |
uint32_t(* | ppc_exc_get_DAR )(void) |
Function for DAR access. More... | |
typedef int(* ppc_exc_handler_t) (BSP_Exception_frame *f, unsigned vector) |
High-level exception handler type.
0 | The exception was handled and normal execution may resume. |
-1 | Reject the exception resulting in a call of the global exception handler. |
other | Reserved, do not use. |
enum ppc_exc_category |
Exception categories.
Exceptions of different categories use different SRR registers to save the machine state and do different things in the prologue and epilogue.
For now, the CPU descriptions assume this fits into 8 bits.
int ppc_exc_alignment_handler | ( | BSP_Exception_frame * | frame, |
unsigned | excNum | ||
) |
Standard aligment handler.
0 | Performed a dcbz instruction. |
-1 | Otherwise. |
int ppc_exc_handler_default | ( | BSP_Exception_frame * | f, |
unsigned int | vector | ||
) |
Default high-level exception handler.
-1 | Always. |
void ppc_exc_initialize_with_vector_base | ( | uintptr_t | interrupt_stack_begin, |
void * | vector_base | ||
) |
Initializes the exception handling.
rtems_status_code ppc_exc_make_prologue | ( | unsigned | vector, |
void * | vector_base, | ||
ppc_exc_category | category, | ||
uint32_t * | prologue, | ||
size_t * | prologue_size | ||
) |
Makes a minimal prologue for the vector vector with the category category.
The minimal prologue will be copied to prologue. Not more than prologue_size bytes will be copied. Returns the actual minimal prologue size in bytes in prologue_size.
RTEMS_SUCCESSFUL | Minimal prologue successfully made. |
RTEMS_INVALID_ID | Invalid vector number. |
RTEMS_INVALID_NUMBER | Invalid category. |
RTEMS_INVALID_SIZE | Prologue size to small. |
rtems_status_code ppc_exc_set_handler | ( | unsigned | vector, |
ppc_exc_handler_t | hdl | ||
) |
Set high-level exception handler.
Hook C exception handlers.
If a particular slot is NULL then the traditional 'globalExcHdl' is used.
ppc_exc_set_handler() registers a handler (returning 0 on success, -1 if the vector argument is too big).
It is legal to set a NULL handler. This leads to the globalExcHdl being called if an exception for 'vector' occurs.
RTEMS_SUCCESSFUL | Successful operation. |
RTEMS_INVALID_ID | Invalid vector number. |
RTEMS_RESOURCE_IN_USE | Handler table is read-only and handler does not match. |
void * ppc_exc_vector_address | ( | unsigned | vector, |
void * | vector_base | ||
) |
Returns the entry address of the vector.
[in] | vector | The vector number. |
[in] | vector_base | The vector table base address. |
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extern |
Cache write back check flag.
(See README under CAVEATS). During initialization a check is performed to assert that write-back caching is enabled for memory accesses. If a BSP runs entirely without any caching then it should set this variable to zero prior to initializing exceptions in order to skip the test. NOTE: The code does NOT support mapping memory with cache-attributes other than write-back (unless the entire cache is physically disabled)
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extern |
Function for DAR access.
CPU support may store the address of a function here that can be used by the default exception handler to obtain fault-address info which is helpful. Unfortunately, the SPR holding this information is not uniform across PPC families so we need assistance from CPU support
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extern |
Bits for MSR update.
Bits in MSR that are enabled during execution of exception handlers / ISRs (on classic PPC these are DR/IR/RI [default], on bookE-style CPUs they should be set to 0 during initialization)
By default, the setting of these bits that is in effect when exception handling is initialized is used.