PowerPC Utility Module

PowerPC Utility Module. More...

Macros
#define	LINKER_SYMBOL(sym)   extern char sym [];
#define	CPU_Get_timebase_low(_value)    __asm__ volatile( "mfspr %0,268" : "=r" (_value) )
#define	rtems_bsp_delay(_microseconds)
#define	rtems_bsp_delay_in_bus_cycles(_cycles)
#define	PPC_Set_decrementer(_clicks)
#define	PPC_Get_decrementer(_clicks)    __asm__ volatile( "mfdec %0" : "=r" (_clicks) )
#define	PPC_STRINGOF(x)   #x
	Preprocessor magic for stringification of x.
#define	PPC_SPECIAL_PURPOSE_REGISTER(spr, val)
	Returns the value of the Special Purpose Register with number spr. More...
#define	PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val)
	Sets the Special Purpose Register with number spr to the value in val. More...
#define	PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS(spr, bits)
	Sets in the Special Purpose Register with number spr all bits which are set in bits. More...
#define	PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS_MASKED(spr, bits, mask)
	Sets in the Special Purpose Register with number spr all bits which are set in bits. The previous register value will be masked with mask. More...
#define	PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS(spr, bits)
	Clears in the Special Purpose Register with number spr all bits which are set in bits. More...
#define	PPC_THREAD_MGMT_REGISTER(tmr)
	Returns the value of the Thread Management Register with number tmr. More...
#define	PPC_SET_THREAD_MGMT_REGISTER(tmr, val)
	Sets the Thread Management Register with number tmr to the value in val. More...
#define	PPC_DEVICE_CONTROL_REGISTER(dcr)
	Returns the value of the Device Control Register with number dcr. More...
#define	PPC_SET_DEVICE_CONTROL_REGISTER(dcr, val)
	Sets the Device Control Register with number dcr to the value in val. More...
#define	PPC_SET_DEVICE_CONTROL_REGISTER_BITS(dcr, bits)
	Sets in the Device Control Register with number dcr all bits which are set in bits. More...
#define	PPC_SET_DEVICE_CONTROL_REGISTER_BITS_MASKED(dcr, bits, mask)
	Sets in the Device Control Register with number dcr all bits which are set in bits. The previous register value will be masked with mask. More...
#define	PPC_CLEAR_DEVICE_CONTROL_REGISTER_BITS(dcr, bits)
	Clears in the Device Control Register with number dcr all bits which are set in bits. More...
#define	ppc_mtivor(x, vec)

Functions
void	ppc_code_copy (void *dest, const void *src, size_t n)
void	printBAT (int bat, uint32_t upper, uint32_t lower)
void	ShowBATS (void)

Variables
uint32_t	bsp_clicks_per_usec

Detailed Description

PowerPC Utility Module.

Macro Definition Documentation

PPC_CLEAR_DEVICE_CONTROL_REGISTER_BITS

#define PPC_CLEAR_DEVICE_CONTROL_REGISTER_BITS	(		dcr,
			bits
	)

Value:

  do { \
    ISR_Level level; \
    uint32_t val; \
    uint32_t mybits = bits; \
    _ISR_Local_disable(level); \
    val = PPC_DEVICE_CONTROL_REGISTER(dcr); \
    val &= ~mybits; \
    PPC_SET_DEVICE_CONTROL_REGISTER(dcr, val); \
    _ISR_Local_enable(level); \
  } while (0)

Clears in the Device Control Register with number dcr all bits which are set in bits.

Interrupts are disabled throughout this operation.

PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS

#define PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS	(		spr,
			bits
	)

Value:

  do { \
    ISR_Level level; \
    uint32_t val; \
    uint32_t mybits = bits; \
    _ISR_Local_disable(level); \
    PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \
    val &= ~mybits; \
    PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \
    _ISR_Local_enable(level); \
  } while (0)

Clears in the Special Purpose Register with number spr all bits which are set in bits.

Interrupts are disabled throughout this operation.

PPC_DEVICE_CONTROL_REGISTER

#define PPC_DEVICE_CONTROL_REGISTER

(

dcr

)

Value:

  ({ \
    uint32_t val; \
    __asm__ volatile (\
      "mfdcr %0, " PPC_STRINGOF(dcr) \
      : "=r" (val) \
    ); \
    val;\
  } )

Returns the value of the Device Control Register with number dcr.

The PowerPC 4XX family has Device Control Registers.

Note

This macro uses a GNU C extension.

ppc_mtivor

#define ppc_mtivor	(		x,
			vec
	)

Value:

    __asm__ volatile ( \
    ".machine push\n" \
    ".machine e500\n" \
    "mtivor" RTEMS_XSTRING(x) " %0\n" \
    ".machine pop" \
    : \
    : "r" (vec) \
  )

PPC_Set_decrementer

#define PPC_Set_decrementer

(

_clicks

)

Value:

  do { \
    __asm__ volatile( "mtdec %0" : : "r" ((_clicks)) ); \
  } while (0)

PPC_SET_DEVICE_CONTROL_REGISTER

#define PPC_SET_DEVICE_CONTROL_REGISTER	(		dcr,
			val
	)

Value:

  do { \
    __asm__ volatile (\
      "mtdcr " PPC_STRINGOF(dcr) ", %0" \
      : \
      : "r" (val) \
    ); \
  } while (0)

Sets the Device Control Register with number dcr to the value in val.

The PowerPC 4XX family has Device Control Registers.

PPC_SET_DEVICE_CONTROL_REGISTER_BITS

#define PPC_SET_DEVICE_CONTROL_REGISTER_BITS	(		dcr,
			bits
	)

Value:

  do { \
    ISR_Level level; \
    uint32_t val; \
    uint32_t mybits = bits; \
    _ISR_Local_disable(level); \
    val = PPC_DEVICE_CONTROL_REGISTER(dcr); \
    val |= mybits; \
    PPC_SET_DEVICE_CONTROL_REGISTER(dcr, val); \
    _ISR_Local_enable(level); \
  } while (0)

Sets in the Device Control Register with number dcr all bits which are set in bits.

Interrupts are disabled throughout this operation.

PPC_SET_DEVICE_CONTROL_REGISTER_BITS_MASKED

#define PPC_SET_DEVICE_CONTROL_REGISTER_BITS_MASKED	(		dcr,
			bits,
			mask
	)

Value:

  do { \
    ISR_Level level; \
    uint32_t val; \
    uint32_t mybits = bits; \
    uint32_t mymask = mask; \
    _ISR_Local_disable(level); \
    val = PPC_DEVICE_CONTROL_REGISTER(dcr); \
    val &= ~mymask; \
    val |= mybits; \
    PPC_SET_DEVICE_CONTROL_REGISTER(dcr, val); \
    _ISR_Local_enable(level); \
  } while (0)

Sets in the Device Control Register with number dcr all bits which are set in bits. The previous register value will be masked with mask.

Interrupts are disabled throughout this operation.

PPC_SET_SPECIAL_PURPOSE_REGISTER

#define PPC_SET_SPECIAL_PURPOSE_REGISTER	(		spr,
			val
	)

Value:

  do { \
    __asm__ volatile (\
      "mtspr " PPC_STRINGOF(spr) ", %0" \
      : \
      : "r" (val) \
    ); \
  } while (0)

Sets the Special Purpose Register with number spr to the value in val.

PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS

#define PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS	(		spr,
			bits
	)

Value:

  do { \
    ISR_Level level; \
    uint32_t val; \
    uint32_t mybits = bits; \
    _ISR_Local_disable(level); \
    PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \
    val |= mybits; \
    PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \
    _ISR_Local_enable(level); \
  } while (0)

Sets in the Special Purpose Register with number spr all bits which are set in bits.

Interrupts are disabled throughout this operation.

PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS_MASKED

#define PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS_MASKED	(		spr,
			bits,
			mask
	)

Value:

  do { \
    ISR_Level level; \
    uint32_t val; \
    uint32_t mybits = bits; \
    uint32_t mymask = mask; \
    _ISR_Local_disable(level); \
    PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \
    val &= ~mymask; \
    val |= mybits; \
    PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \
    _ISR_Local_enable(level); \
  } while (0)

Sets in the Special Purpose Register with number spr all bits which are set in bits. The previous register value will be masked with mask.

Interrupts are disabled throughout this operation.

PPC_SET_THREAD_MGMT_REGISTER

#define PPC_SET_THREAD_MGMT_REGISTER	(		tmr,
			val
	)

Value:

  do { \
    __asm__ volatile (\
      "mttmr " PPC_STRINGOF(tmr) ", %0" \
      : \
      : "r" (val) \
    ); \
  } while (0)

Sets the Thread Management Register with number tmr to the value in val.

PPC_SPECIAL_PURPOSE_REGISTER

#define PPC_SPECIAL_PURPOSE_REGISTER	(		spr,
			val
	)

Value:

  __asm__ volatile (\
    "mfspr %0, " PPC_STRINGOF(spr) \
    : "=r" (val) \
  )

Returns the value of the Special Purpose Register with number spr.

Note

This macro uses a GNU C extension.

PPC_THREAD_MGMT_REGISTER

#define PPC_THREAD_MGMT_REGISTER

(

tmr

)

Value:

  ({ \
    uint32_t val; \
    __asm__ volatile (\
      "mftmr %0, " PPC_STRINGOF(tmr) \
      : "=r" (val) \
    ); \
    val;\
  } )

Returns the value of the Thread Management Register with number tmr.

Note

This macro uses a GNU C extension.

rtems_bsp_delay

#define rtems_bsp_delay

(

_microseconds

)

Value:

  do { \
    uint32_t   start, ticks, now; \
    CPU_Get_timebase_low( start ) ; \
    ticks = (_microseconds) * bsp_clicks_per_usec; \
    do \
      CPU_Get_timebase_low( now ) ; \
    while (now - start < ticks); \
  } while (0)

rtems_bsp_delay_in_bus_cycles

#define rtems_bsp_delay_in_bus_cycles

(

_cycles

)

Value:

  do { \
    uint32_t   start, now; \
    CPU_Get_timebase_low( start ); \
    do \
      CPU_Get_timebase_low( now ); \
    while (now - start < (_cycles)); \
  } while (0)