RTEMS 6.1-rc1
Macros

Macros

#define RCC_PLL3VCIRANGE_0   RCC_PLLCFGR_PLL3RGE_0
 
#define RCC_PLL3VCIRANGE_1   RCC_PLLCFGR_PLL3RGE_1
 
#define RCC_PLL3VCIRANGE_2   RCC_PLLCFGR_PLL3RGE_2
 
#define RCC_PLL3VCIRANGE_3   RCC_PLLCFGR_PLL3RGE_3
 

Detailed Description

Macro Definition Documentation

◆ RCC_PLL3VCIRANGE_0

#define RCC_PLL3VCIRANGE_0   RCC_PLLCFGR_PLL3RGE_0

Clock range frequency between 1 and 2 MHz

◆ RCC_PLL3VCIRANGE_1

#define RCC_PLL3VCIRANGE_1   RCC_PLLCFGR_PLL3RGE_1

Clock range frequency between 2 and 4 MHz

◆ RCC_PLL3VCIRANGE_2

#define RCC_PLL3VCIRANGE_2   RCC_PLLCFGR_PLL3RGE_2

Clock range frequency between 4 and 8 MHz

◆ RCC_PLL3VCIRANGE_3

#define RCC_PLL3VCIRANGE_3   RCC_PLLCFGR_PLL3RGE_3

Clock range frequency between 8 and 16 MHz