RTEMS 6.1-rc1
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This header file defines the GR740 I/O and PLL configuration register block interface. More...
#include <stdint.h>
Go to the source code of this file.
Data Structures | |
struct | gr740_iopll |
This structure defines the GR740 I/0 and PLL Configuration register block memory map. More... | |
Macros | |
#define | GR740_IOPLL_FTMFUNC_FTMEN_SHIFT 0 |
#define | GR740_IOPLL_FTMFUNC_FTMEN_MASK 0x3fffffU |
#define | GR740_IOPLL_FTMFUNC_FTMEN_GET(_reg) |
#define | GR740_IOPLL_FTMFUNC_FTMEN_SET(_reg, _val) |
#define | GR740_IOPLL_FTMFUNC_FTMEN(_val) |
#define | GR740_IOPLL_ALTFUNC_ALTEN_SHIFT 0 |
#define | GR740_IOPLL_ALTFUNC_ALTEN_MASK 0x3fffffU |
#define | GR740_IOPLL_ALTFUNC_ALTEN_GET(_reg) |
#define | GR740_IOPLL_ALTFUNC_ALTEN_SET(_reg, _val) |
#define | GR740_IOPLL_ALTFUNC_ALTEN(_val) |
#define | GR740_IOPLL_LVDSMCLK_SMEM 0x20000U |
#define | GR740_IOPLL_LVDSMCLK_DMEM 0x10000U |
#define | GR740_IOPLL_LVDSMCLK_SPWOE_SHIFT 0 |
#define | GR740_IOPLL_LVDSMCLK_SPWOE_MASK 0xffU |
#define | GR740_IOPLL_LVDSMCLK_SPWOE_GET(_reg) |
#define | GR740_IOPLL_LVDSMCLK_SPWOE_SET(_reg, _val) |
#define | GR740_IOPLL_LVDSMCLK_SPWOE(_val) |
#define | GR740_IOPLL_PLLNEWCFG_SWTAG_SHIFT 27 |
#define | GR740_IOPLL_PLLNEWCFG_SWTAG_MASK 0x18000000U |
#define | GR740_IOPLL_PLLNEWCFG_SWTAG_GET(_reg) |
#define | GR740_IOPLL_PLLNEWCFG_SWTAG_SET(_reg, _val) |
#define | GR740_IOPLL_PLLNEWCFG_SWTAG(_val) |
#define | GR740_IOPLL_PLLNEWCFG_SPWPLLCFG_SHIFT 18 |
#define | GR740_IOPLL_PLLNEWCFG_SPWPLLCFG_MASK 0x7fc0000U |
#define | GR740_IOPLL_PLLNEWCFG_SPWPLLCFG_GET(_reg) |
#define | GR740_IOPLL_PLLNEWCFG_SPWPLLCFG_SET(_reg, _val) |
#define | GR740_IOPLL_PLLNEWCFG_SPWPLLCFG(_val) |
#define | GR740_IOPLL_PLLNEWCFG_MEMPLLCFG_SHIFT 9 |
#define | GR740_IOPLL_PLLNEWCFG_MEMPLLCFG_MASK 0x3fe00U |
#define | GR740_IOPLL_PLLNEWCFG_MEMPLLCFG_GET(_reg) |
#define | GR740_IOPLL_PLLNEWCFG_MEMPLLCFG_SET(_reg, _val) |
#define | GR740_IOPLL_PLLNEWCFG_MEMPLLCFG(_val) |
#define | GR740_IOPLL_PLLNEWCFG_SYSPLLCFG_SHIFT 0 |
#define | GR740_IOPLL_PLLNEWCFG_SYSPLLCFG_MASK 0x1ffU |
#define | GR740_IOPLL_PLLNEWCFG_SYSPLLCFG_GET(_reg) |
#define | GR740_IOPLL_PLLNEWCFG_SYSPLLCFG_SET(_reg, _val) |
#define | GR740_IOPLL_PLLNEWCFG_SYSPLLCFG(_val) |
#define | GR740_IOPLL_PLLRECFG_RECONF_SHIFT 0 |
#define | GR740_IOPLL_PLLRECFG_RECONF_MASK 0x7U |
#define | GR740_IOPLL_PLLRECFG_RECONF_GET(_reg) |
#define | GR740_IOPLL_PLLRECFG_RECONF_SET(_reg, _val) |
#define | GR740_IOPLL_PLLRECFG_RECONF(_val) |
#define | GR740_IOPLL_PLLCURCFG_SWTAG_SHIFT 27 |
#define | GR740_IOPLL_PLLCURCFG_SWTAG_MASK 0x18000000U |
#define | GR740_IOPLL_PLLCURCFG_SWTAG_GET(_reg) |
#define | GR740_IOPLL_PLLCURCFG_SWTAG_SET(_reg, _val) |
#define | GR740_IOPLL_PLLCURCFG_SWTAG(_val) |
#define | GR740_IOPLL_PLLCURCFG_SPWPLLCFG_SHIFT 18 |
#define | GR740_IOPLL_PLLCURCFG_SPWPLLCFG_MASK 0x7fc0000U |
#define | GR740_IOPLL_PLLCURCFG_SPWPLLCFG_GET(_reg) |
#define | GR740_IOPLL_PLLCURCFG_SPWPLLCFG_SET(_reg, _val) |
#define | GR740_IOPLL_PLLCURCFG_SPWPLLCFG(_val) |
#define | GR740_IOPLL_PLLCURCFG_MEMPLLCFG_SHIFT 9 |
#define | GR740_IOPLL_PLLCURCFG_MEMPLLCFG_MASK 0x3fe00U |
#define | GR740_IOPLL_PLLCURCFG_MEMPLLCFG_GET(_reg) |
#define | GR740_IOPLL_PLLCURCFG_MEMPLLCFG_SET(_reg, _val) |
#define | GR740_IOPLL_PLLCURCFG_MEMPLLCFG(_val) |
#define | GR740_IOPLL_PLLCURCFG_SYSPLLCFG_SHIFT 0 |
#define | GR740_IOPLL_PLLCURCFG_SYSPLLCFG_MASK 0x1ffU |
#define | GR740_IOPLL_PLLCURCFG_SYSPLLCFG_GET(_reg) |
#define | GR740_IOPLL_PLLCURCFG_SYSPLLCFG_SET(_reg, _val) |
#define | GR740_IOPLL_PLLCURCFG_SYSPLLCFG(_val) |
#define | GR740_IOPLL_DRVSTR1_S9_SHIFT 18 |
#define | GR740_IOPLL_DRVSTR1_S9_MASK 0xc0000U |
#define | GR740_IOPLL_DRVSTR1_S9_GET(_reg) |
#define | GR740_IOPLL_DRVSTR1_S9_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR1_S9(_val) |
#define | GR740_IOPLL_DRVSTR1_S8_SHIFT 16 |
#define | GR740_IOPLL_DRVSTR1_S8_MASK 0x30000U |
#define | GR740_IOPLL_DRVSTR1_S8_GET(_reg) |
#define | GR740_IOPLL_DRVSTR1_S8_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR1_S8(_val) |
#define | GR740_IOPLL_DRVSTR1_S7_SHIFT 14 |
#define | GR740_IOPLL_DRVSTR1_S7_MASK 0xc000U |
#define | GR740_IOPLL_DRVSTR1_S7_GET(_reg) |
#define | GR740_IOPLL_DRVSTR1_S7_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR1_S7(_val) |
#define | GR740_IOPLL_DRVSTR1_S6_SHIFT 12 |
#define | GR740_IOPLL_DRVSTR1_S6_MASK 0x3000U |
#define | GR740_IOPLL_DRVSTR1_S6_GET(_reg) |
#define | GR740_IOPLL_DRVSTR1_S6_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR1_S6(_val) |
#define | GR740_IOPLL_DRVSTR1_S5_SHIFT 10 |
#define | GR740_IOPLL_DRVSTR1_S5_MASK 0xc00U |
#define | GR740_IOPLL_DRVSTR1_S5_GET(_reg) |
#define | GR740_IOPLL_DRVSTR1_S5_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR1_S5(_val) |
#define | GR740_IOPLL_DRVSTR1_S4_SHIFT 8 |
#define | GR740_IOPLL_DRVSTR1_S4_MASK 0x300U |
#define | GR740_IOPLL_DRVSTR1_S4_GET(_reg) |
#define | GR740_IOPLL_DRVSTR1_S4_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR1_S4(_val) |
#define | GR740_IOPLL_DRVSTR1_S3_SHIFT 6 |
#define | GR740_IOPLL_DRVSTR1_S3_MASK 0xc0U |
#define | GR740_IOPLL_DRVSTR1_S3_GET(_reg) |
#define | GR740_IOPLL_DRVSTR1_S3_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR1_S3(_val) |
#define | GR740_IOPLL_DRVSTR1_S2_SHIFT 4 |
#define | GR740_IOPLL_DRVSTR1_S2_MASK 0x30U |
#define | GR740_IOPLL_DRVSTR1_S2_GET(_reg) |
#define | GR740_IOPLL_DRVSTR1_S2_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR1_S2(_val) |
#define | GR740_IOPLL_DRVSTR1_S1_SHIFT 2 |
#define | GR740_IOPLL_DRVSTR1_S1_MASK 0xcU |
#define | GR740_IOPLL_DRVSTR1_S1_GET(_reg) |
#define | GR740_IOPLL_DRVSTR1_S1_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR1_S1(_val) |
#define | GR740_IOPLL_DRVSTR1_S0_SHIFT 0 |
#define | GR740_IOPLL_DRVSTR1_S0_MASK 0x3U |
#define | GR740_IOPLL_DRVSTR1_S0_GET(_reg) |
#define | GR740_IOPLL_DRVSTR1_S0_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR1_S0(_val) |
#define | GR740_IOPLL_DRVSTR2_S19_SHIFT 18 |
#define | GR740_IOPLL_DRVSTR2_S19_MASK 0xc0000U |
#define | GR740_IOPLL_DRVSTR2_S19_GET(_reg) |
#define | GR740_IOPLL_DRVSTR2_S19_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR2_S19(_val) |
#define | GR740_IOPLL_DRVSTR2_S18_SHIFT 16 |
#define | GR740_IOPLL_DRVSTR2_S18_MASK 0x30000U |
#define | GR740_IOPLL_DRVSTR2_S18_GET(_reg) |
#define | GR740_IOPLL_DRVSTR2_S18_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR2_S18(_val) |
#define | GR740_IOPLL_DRVSTR2_S17_SHIFT 14 |
#define | GR740_IOPLL_DRVSTR2_S17_MASK 0xc000U |
#define | GR740_IOPLL_DRVSTR2_S17_GET(_reg) |
#define | GR740_IOPLL_DRVSTR2_S17_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR2_S17(_val) |
#define | GR740_IOPLL_DRVSTR2_S16_SHIFT 12 |
#define | GR740_IOPLL_DRVSTR2_S16_MASK 0x3000U |
#define | GR740_IOPLL_DRVSTR2_S16_GET(_reg) |
#define | GR740_IOPLL_DRVSTR2_S16_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR2_S16(_val) |
#define | GR740_IOPLL_DRVSTR2_S15_SHIFT 10 |
#define | GR740_IOPLL_DRVSTR2_S15_MASK 0xc00U |
#define | GR740_IOPLL_DRVSTR2_S15_GET(_reg) |
#define | GR740_IOPLL_DRVSTR2_S15_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR2_S15(_val) |
#define | GR740_IOPLL_DRVSTR2_S14_SHIFT 8 |
#define | GR740_IOPLL_DRVSTR2_S14_MASK 0x300U |
#define | GR740_IOPLL_DRVSTR2_S14_GET(_reg) |
#define | GR740_IOPLL_DRVSTR2_S14_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR2_S14(_val) |
#define | GR740_IOPLL_DRVSTR2_S13_SHIFT 6 |
#define | GR740_IOPLL_DRVSTR2_S13_MASK 0xc0U |
#define | GR740_IOPLL_DRVSTR2_S13_GET(_reg) |
#define | GR740_IOPLL_DRVSTR2_S13_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR2_S13(_val) |
#define | GR740_IOPLL_DRVSTR2_S12_SHIFT 4 |
#define | GR740_IOPLL_DRVSTR2_S12_MASK 0x30U |
#define | GR740_IOPLL_DRVSTR2_S12_GET(_reg) |
#define | GR740_IOPLL_DRVSTR2_S12_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR2_S12(_val) |
#define | GR740_IOPLL_DRVSTR2_S11_SHIFT 2 |
#define | GR740_IOPLL_DRVSTR2_S11_MASK 0xcU |
#define | GR740_IOPLL_DRVSTR2_S11_GET(_reg) |
#define | GR740_IOPLL_DRVSTR2_S11_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR2_S11(_val) |
#define | GR740_IOPLL_DRVSTR2_S10_SHIFT 0 |
#define | GR740_IOPLL_DRVSTR2_S10_MASK 0x3U |
#define | GR740_IOPLL_DRVSTR2_S10_GET(_reg) |
#define | GR740_IOPLL_DRVSTR2_S10_SET(_reg, _val) |
#define | GR740_IOPLL_DRVSTR2_S10(_val) |
#define | GR740_IOPLL_LOCKDOWN_PERMANENT_SHIFT 16 |
#define | GR740_IOPLL_LOCKDOWN_PERMANENT_MASK 0xff0000U |
#define | GR740_IOPLL_LOCKDOWN_PERMANENT_GET(_reg) |
#define | GR740_IOPLL_LOCKDOWN_PERMANENT_SET(_reg, _val) |
#define | GR740_IOPLL_LOCKDOWN_PERMANENT(_val) |
#define | GR740_IOPLL_LOCKDOWN_REVOCABLE_SHIFT 0 |
#define | GR740_IOPLL_LOCKDOWN_REVOCABLE_MASK 0xffU |
#define | GR740_IOPLL_LOCKDOWN_REVOCABLE_GET(_reg) |
#define | GR740_IOPLL_LOCKDOWN_REVOCABLE_SET(_reg, _val) |
#define | GR740_IOPLL_LOCKDOWN_REVOCABLE(_val) |
Typedefs | |
typedef struct gr740_iopll | gr740_iopll |
This structure defines the GR740 I/0 and PLL Configuration register block memory map. | |
This header file defines the GR740 I/O and PLL configuration register block interface.