_clock_sys_pll_config Struct Reference

PLL configuration for System. More...

#include <fsl_clock.h>

Data Fields
uint8_t	loopDivider
uint32_t	numerator
uint32_t	denominator
uint8_t	src
uint16_t	ss_stop
uint8_t	ss_enable
uint16_t	ss_step

Detailed Description

PLL configuration for System.

Field Documentation

denominator

uint32_t _clock_sys_pll_config::denominator

30 bit denominator of fractional loop divider

loopDivider

uint8_t _clock_sys_pll_config::loopDivider

PLL loop divider. Intended to be 1 (528M). 0 - Fout=Fref*20; 1 - Fout=Fref*22

numerator

uint32_t _clock_sys_pll_config::numerator

30 bit numerator of fractional loop divider.

src

uint8_t _clock_sys_pll_config::src

Pll clock source, reference _clock_pll_clk_src

ss_enable

uint8_t _clock_sys_pll_config::ss_enable

Enable spread spectrum modulation

ss_step

uint16_t _clock_sys_pll_config::ss_step

Step value to get frequency change step.

ss_stop

uint16_t _clock_sys_pll_config::ss_stop

Stop value to get frequency change.

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The documentation for this struct was generated from the following file:

• bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers/fsl_clock.h