TcChannel hardware registers. More...

Data Fields
__O uint32_t	TC_CCR
	(TcChannel Offset: 0x0) Channel Control Register
__IO uint32_t	TC_CMR
	(TcChannel Offset: 0x4) Channel Mode Register
__IO uint32_t	TC_SMMR
	(TcChannel Offset: 0x8) Stepper Motor Mode Register
__I uint32_t	TC_RAB
	(TcChannel Offset: 0xC) Register AB
__I uint32_t	TC_CV
	(TcChannel Offset: 0x10) Counter Value
__IO uint32_t	TC_RA
	(TcChannel Offset: 0x14) Register A
__IO uint32_t	TC_RB
	(TcChannel Offset: 0x18) Register B
__IO uint32_t	TC_RC
	(TcChannel Offset: 0x1C) Register C
__I uint32_t	TC_SR
	(TcChannel Offset: 0x20) Status Register
__O uint32_t	TC_IER
	(TcChannel Offset: 0x24) Interrupt Enable Register
__O uint32_t	TC_IDR
	(TcChannel Offset: 0x28) Interrupt Disable Register
__I uint32_t	TC_IMR
	(TcChannel Offset: 0x2C) Interrupt Mask Register
__IO uint32_t	TC_EMR
	(TcChannel Offset: 0x30) Extended Mode Register
__I uint32_t	Reserved1 [3]

Detailed Description

TcChannel hardware registers.

The documentation for this struct was generated from the following files:

Data Fields