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RTEMS 6.3
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Motorola M68K Queued Serial Module. More...
Go to the source code of this file.
Macros | |
| #define | SAM(a, b, c) |
| #define | QSM_CRB 0x7ffc00 |
| #define | QSMCR (volatile unsigned short int * const)(0x00 + QSM_CRB) |
| #define | STOP 0x8000 |
| #define | FRZ 0x6000 |
| #define | SUPV 0x0080 |
| #define | IARB 0x000f |
| #define | QTEST (volatile unsigned short int * const)(0x02 + QSM_CRB) |
| #define | QILR (volatile unsigned char * const)(0x04 + QSM_CRB) |
| #define | ILQSPI 0x38 |
| #define | ILSCI 0x07 |
| #define | QIVR (volatile unsigned char * const)(0x05 + QSM_CRB) |
| #define | INTV 0xff |
| #define | SCCR0 (volatile unsigned short int * const)(0x08 + QSM_CRB) |
| #define | SCBR 0x1fff |
| #define | SCCR1 (volatile unsigned short int * const)(0x0a + QSM_CRB) |
| #define | LOOPS 0x4000 |
| #define | WOMS 0x2000 |
| #define | ILT 0x1000 |
| #define | PT 0x0800 |
| #define | PE 0x0400 |
| #define | M 0x0200 |
| #define | WAKE 0x0100 |
| #define | TIE 0x0080 |
| #define | TCIE 0x0040 |
| #define | RIE 0x0020 |
| #define | ILIE 0x0010 |
| #define | TE 0x0008 |
| #define | RE 0x0004 |
| #define | RWU 0x0002 |
| #define | SBK 0x0001 |
| #define | SCSR (volatile unsigned short int * const)(0x0c + QSM_CRB) |
| #define | TDRE 0x0100 |
| #define | TC 0x0080 |
| #define | RDRF 0x0040 |
| #define | RAF 0x0020 |
| #define | IDLE 0x0010 |
| #define | OR 0x0008 |
| #define | NF 0x0004 |
| #define | FE 0x0002 |
| #define | PF 0x0001 |
| #define | SCDR (volatile unsigned short int * const)(0x0e + QSM_CRB) |
| #define | PORTQS (volatile unsigned char * const)(0x15 + QSM_CRB) |
| #define | PQSPAR (volatile unsigned char * const)(0x16 + QSM_CRB) |
| #define | QSMFun 0x0 |
| #define | QSMDis 0x1 |
| #define | PQSPA0 0 |
| #define | PQSPA1 1 |
| #define | PQSPA2 2 |
| #define | PQSPA3 3 |
| #define | PQSPA4 4 |
| #define | PQSPA5 5 |
| #define | PQSPA6 6 |
| #define | PQSPA7 7 |
| #define | DDRQS (volatile unsigned char * const)(0x17 + QSM_CRB) |
| #define | SPCR0 (volatile unsigned short int * const)(0x18 + QSM_CRB) |
| #define | MSTR 0x8000 |
| #define | WOMQ 0x4000 |
| #define | BITS 0x3c00 |
| #define | CPOL 0x0200 |
| #define | CPHA 0x0100 |
| #define | SPBR 0x00ff |
| #define | SPCR1 (volatile unsigned short int * const)(0x1a + QSM_CRB) |
| #define | SPE 0x8000 |
| #define | DSCKL 0x7f00 |
| #define | DTL 0x00ff |
| #define | SPCR2 (volatile unsigned short int * const)(0x1c + QSM_CRB) |
| #define | SPIFIE 0x8000 |
| #define | WREN 0x4000 |
| #define | WRTO 0x2000 |
| #define | ENDQP 0x0f00 |
| #define | NEWQP 0x000f |
| #define | SPCR3 (volatile unsigned char * const)(0x1e + QSM_CRB) |
| #define | LOOPQ 0x0400 |
| #define | HMIE 0x0200 |
| #define | HALT 0x0100 |
| #define | SPSR (volatile unsigned char * const)(0x1f + QSM_CRB) |
| #define | SPIF 0x0080 |
| #define | MODF 0x0040 |
| #define | HALTA 0x0020 |
| #define | CPTQP x0000f |
| #define | QSPIRR (volatile unsigned char * const)(0x100 + QSM_CRB) |
| #define | QSPITR (volatile unsigned char * const)(0x120 + QSM_CRB) |
| #define | QSPIcR (volatile unsigned char * const)(0x140 + QSM_CRB) |
Motorola M68K Queued Serial Module.
The QSM contains two serial interfaces: (a) the queued serial peripheral interface (QSPI) and the serial communication interface (SCI). The QSPI provides peripheral expansion and/or interprocessor communication through a full-duplex, synchronous, three-wire bus. A self contained RAM queue permits serial data transfers without CPU intervention and automatic continuous sampling. The SCI provides a standard non-return to zero mark/space format with wakeup functions to allow the CPU to run uninterrupted until woken
For more information, refer to Motorola's "Modular Microcontroller Family Queued Serial Module Reference Manual" (Motorola document QSMRM/AD).
| #define SAM | ( | a, | |
| b, | |||
| c ) |