imx-gpio.h

/* SPDX-License-Identifier: BSD-2-Clause */
 
/*
 * Copyright (C) 2020 embedded brains GmbH & Co. KG
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef BSP_IMX_GPIO_H
#define BSP_IMX_GPIO_H
 
#include <rtems.h>
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */

struct imx_gpio;

enum imx_gpio_mode {
  IMX_GPIO_MODE_OUTPUT,
  IMX_GPIO_MODE_INPUT,
  IMX_GPIO_MODE_INTERRUPT_LOW,
  IMX_GPIO_MODE_INTERRUPT_HIGH,
  IMX_GPIO_MODE_INTERRUPT_RISING,
  IMX_GPIO_MODE_INTERRUPT_FALLING,
  IMX_GPIO_MODE_INTERRUPT_ANY_EDGE,
};

struct imx_gpio_pin {
  volatile struct imx_gpio* gpio;
  uint32_t mask;
  unsigned int shift;
  enum imx_gpio_mode mode;
  bool is_active_low;
};

void imx_gpio_init (struct imx_gpio_pin *pin);

rtems_status_code imx_gpio_init_from_fdt_property_pointer(
  struct imx_gpio_pin *pin,
  const uint32_t *prop_pointer,
  enum imx_gpio_mode mode,
  const uint32_t **next_prop_pointer);

rtems_status_code imx_gpio_init_from_fdt_property(
  struct imx_gpio_pin *pin,
  int node_offset,
  const char *property,
  enum imx_gpio_mode mode,
  size_t index);

rtems_vector_number imx_gpio_get_irq_of_node(
  const void *fdt,
  int node,
  size_t index);

struct imx_gpio *imx_gpio_get_by_index(unsigned idx);

struct imx_gpio *imx_gpio_get_by_register(void *regs);

const char *imx_gpio_get_name(struct imx_gpio *imx_gpio);

void imx_gpio_set_output(struct imx_gpio_pin *pin, uint32_t set);

void imx_gpio_toggle_output(struct imx_gpio_pin *pin);

uint32_t imx_gpio_get_input(struct imx_gpio_pin *pin);

void imx_gpio_int_disable(struct imx_gpio_pin *pin);

void imx_gpio_int_enable(struct imx_gpio_pin *pin);

uint32_t imx_gpio_get_isr(struct imx_gpio_pin *pin);

void imx_gpio_clear_isr(struct imx_gpio_pin *pin, uint32_t clr);

static inline uint32_t imx_gpio_get_active_level(struct imx_gpio_pin *pin)
{
  return (pin->is_active_low) ? 0 : 0xFFFFFFFFU;
}

static inline uint32_t imx_gpio_get_inactive_level(struct imx_gpio_pin *pin)
{
  return ~imx_gpio_get_active_level(pin);
}

#define IMX_GPIO1 (imx_gpio_get_by_index(0))
#define IMX_GPIO2 (imx_gpio_get_by_index(1))
#define IMX_GPIO3 (imx_gpio_get_by_index(2))
#define IMX_GPIO4 (imx_gpio_get_by_index(3))
#define IMX_GPIO5 (imx_gpio_get_by_index(4))
#define IMX_GPIO6 (imx_gpio_get_by_index(5))
#define IMX_GPIO7 (imx_gpio_get_by_index(6))
 
#ifdef __cplusplus
}
#endif /* __cplusplus */
 
#endif /* BSP_IMX_GPIO_H */