RTEMS 6.3
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ANADIG_PMU Peripheral Access Layer

Topics

 ANADIG_PMU Register Masks

Data Structures

struct  ANADIG_PMU_Type

Macros

#define ANADIG_PMU_BASE   (0x40C84000u)
#define ANADIG_PMU   ((ANADIG_PMU_Type *)ANADIG_PMU_BASE)
#define ANADIG_PMU_BASE_ADDRS   { ANADIG_PMU_BASE }
#define ANADIG_PMU_BASE_PTRS   { ANADIG_PMU }
#define ANADIG_PMU_BASE   (0x40C84000u)
#define ANADIG_PMU   ((ANADIG_PMU_Type *)ANADIG_PMU_BASE)
#define ANADIG_PMU_BASE_ADDRS   { ANADIG_PMU_BASE }
#define ANADIG_PMU_BASE_PTRS   { ANADIG_PMU }

Detailed Description

Macro Definition Documentation

◆ ANADIG_PMU [1/2]

#define ANADIG_PMU   ((ANADIG_PMU_Type *)ANADIG_PMU_BASE)

Peripheral ANADIG_PMU base pointer

◆ ANADIG_PMU [2/2]

#define ANADIG_PMU   ((ANADIG_PMU_Type *)ANADIG_PMU_BASE)

Peripheral ANADIG_PMU base pointer

◆ ANADIG_PMU_BASE [1/2]

#define ANADIG_PMU_BASE   (0x40C84000u)

Peripheral ANADIG_PMU base address

◆ ANADIG_PMU_BASE [2/2]

#define ANADIG_PMU_BASE   (0x40C84000u)

Peripheral ANADIG_PMU base address

◆ ANADIG_PMU_BASE_ADDRS [1/2]

#define ANADIG_PMU_BASE_ADDRS   { ANADIG_PMU_BASE }

Array initializer of ANADIG_PMU peripheral base addresses

◆ ANADIG_PMU_BASE_ADDRS [2/2]

#define ANADIG_PMU_BASE_ADDRS   { ANADIG_PMU_BASE }

Array initializer of ANADIG_PMU peripheral base addresses

◆ ANADIG_PMU_BASE_PTRS [1/2]

#define ANADIG_PMU_BASE_PTRS   { ANADIG_PMU }

Array initializer of ANADIG_PMU peripheral base pointers

◆ ANADIG_PMU_BASE_PTRS [2/2]

#define ANADIG_PMU_BASE_PTRS   { ANADIG_PMU }

Array initializer of ANADIG_PMU peripheral base pointers