ADC Private Macros

Macros
#define	IS_ADC_CONVERSIONDATAMGT(DATA)
	Verify the ADC data conversion setting.
#define	ADC_GET_RESOLUTION(__HANDLE__)
	Return resolution bits in CFGR register RES[1:0] field.
#define	ADC_CLEAR_ERRORCODE(__HANDLE__)
	Clear ADC error code (set it to no error code "HAL_ADC_ERROR_NONE").
#define	ADC_IS_ENABLE(__HANDLE__)
	Verification of ADC state: enabled or disabled.
#define	ADC_IS_CONVERSION_ONGOING_REGULAR(__HANDLE__)
	Check if conversion is on going on regular group.
#define	ADC_IS_SYNCHRONOUS_CLOCK_MODE(__HANDLE__)
	Check if ADC clock mode is synchronous.
#define	ADC_STATE_CLR_SET   MODIFY_REG
	Simultaneously clear and set specific bits of the handle State.
#define	IS_ADC_RANGE(__RESOLUTION__, __ADC_VALUE__)
	Verify that a given value is aligned with the ADC resolution range.
#define	IS_ADC_REGULAR_NB_CONV(__LENGTH__)
	Verify the length of the scheduled regular conversions group.
#define	IS_ADC_REGULAR_DISCONT_NUMBER(NUMBER)
	Verify the number of scheduled regular conversions in discontinuous mode.
#define	IS_ADC_CLOCKPRESCALER(__ADC_CLOCK__)
	Verify the ADC clock setting.
#define	IS_ADC_RESOLUTION(__RESOLUTION__)
	Verify the ADC resolution setting.
#define	IS_ADC_RESOLUTION_8_BITS(__RESOLUTION__)
	Verify the ADC resolution setting when limited to 8 bits.
#define	IS_ADC_SCAN_MODE(__SCAN_MODE__)
	Verify the ADC scan mode.
#define	IS_ADC_EXTTRIG_EDGE(__EDGE__)
	Verify the ADC edge trigger setting for regular group.
#define	IS_ADC_EXTTRIG(__REGTRIG__)
	Verify the ADC regular conversions external trigger.
#define	IS_ADC_EOC_SELECTION(__EOC_SELECTION__)
	Verify the ADC regular conversions check for converted data availability.
#define	IS_ADC_OVERRUN(__OVR__)
	Verify the ADC regular conversions overrun handling.
#define	IS_ADC_SAMPLE_TIME(__TIME__)
	Verify the ADC conversions sampling time.
#define	IS_ADC_REGULAR_RANK(__CHANNEL__)
	Verify the ADC regular channel setting.

Detailed Description

Macro Definition Documentation

ADC_CLEAR_ERRORCODE

#define ADC_CLEAR_ERRORCODE

(

__HANDLE__

)

Value:

((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)

Clear ADC error code (set it to no error code "HAL_ADC_ERROR_NONE").

Parameters

__HANDLE__

ADC handle

Return values

None

ADC_GET_RESOLUTION

#define ADC_GET_RESOLUTION

(

__HANDLE__

)

Value:

(LL_ADC_GetResolution((__HANDLE__)->Instance))

Return resolution bits in CFGR register RES[1:0] field.

Parameters

__HANDLE__

ADC handle

Return values

Value

of bitfield RES in CFGR register.

ADC_IS_CONVERSION_ONGOING_REGULAR

#define ADC_IS_CONVERSION_ONGOING_REGULAR

(

__HANDLE__

)

Value:

(LL_ADC_REG_IsConversionOngoing((__HANDLE__)->Instance))

Check if conversion is on going on regular group.

Parameters

__HANDLE__

ADC handle

Return values

Value

"0" (no conversion is on going) or value "1" (conversion is on going)

ADC_IS_ENABLE

#define ADC_IS_ENABLE

(

__HANDLE__

)

Value:

(( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \
   ((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY)                  \
 ) ? SET : RESET)

Verification of ADC state: enabled or disabled.

Parameters

__HANDLE__

ADC handle

Return values

SET	(ADC enabled) or RESET (ADC disabled)

ADC_IS_SYNCHRONOUS_CLOCK_MODE

#define ADC_IS_SYNCHRONOUS_CLOCK_MODE

(

__HANDLE__

)

Value:

((ADC12_COMMON->CCR & ADC_CCR_CKMODE) != 0UL)

Check if ADC clock mode is synchronous.

Parameters

__HANDLE__

ADC handle

Return values

SET	(clock mode is synchronous) or RESET (clock mode is asynchronous)

ADC_STATE_CLR_SET

#define ADC_STATE_CLR_SET   MODIFY_REG

Simultaneously clear and set specific bits of the handle State.

Note

ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(), the first parameter is the ADC handle State, the second parameter is the bit field to clear, the third and last parameter is the bit field to set.

Return values

None

IS_ADC_CLOCKPRESCALER

#define IS_ADC_CLOCKPRESCALER

(

__ADC_CLOCK__

)

Value:

(((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV1) || \
((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV2) || \
((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV4) || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV1)     || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV2)     || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV4)     || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV6)     || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV8)     || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV10)    || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV12)    || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV16)    || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV32)    || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV64)    || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV128)   || \
((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV256) )

Verify the ADC clock setting.

Parameters

__ADC_CLOCK__

programmed ADC clock.

Return values

SET	(ADC_CLOCK is a valid value) or RESET (ADC_CLOCK is invalid)

IS_ADC_CONVERSIONDATAMGT

#define IS_ADC_CONVERSIONDATAMGT

(

DATA

)

Value:

((((DATA) == ADC_CONVERSIONDATA_DR))          || \
 (((DATA) == ADC_CONVERSIONDATA_DFSDM))       || \
 (((DATA) == ADC_CONVERSIONDATA_DMA_ONESHOT)) || \
 (((DATA) == ADC_CONVERSIONDATA_DMA_CIRCULAR)))

Verify the ADC data conversion setting.

Parameters

DATA	: programmed DATA conversion mode.

Return values

SET	(DATA is a valid value) or RESET (DATA is invalid)

IS_ADC_EOC_SELECTION

#define IS_ADC_EOC_SELECTION

(

__EOC_SELECTION__

)

Value:

(((__EOC_SELECTION__) == ADC_EOC_SINGLE_CONV)    || \
((__EOC_SELECTION__) == ADC_EOC_SEQ_CONV)  )

Verify the ADC regular conversions check for converted data availability.

Parameters

__EOC_SELECTION__

converted data availability check.

Return values

SET	(EOC_SELECTION is a valid value) or RESET (EOC_SELECTION is invalid)

IS_ADC_EXTTRIG

#define IS_ADC_EXTTRIG

(

__REGTRIG__

)

Value:

 (((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC1)        || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC2)        || \
((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC3)        || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T2_CC2)        || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T3_TRGO)       || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T4_CC4)        || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_EXT_IT11)      || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T8_TRGO)       || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T8_TRGO2)      || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T1_TRGO)       || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T1_TRGO2)      || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T2_TRGO)       || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T4_TRGO)       || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T6_TRGO)       || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T15_TRGO)      || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_T3_CC4)        || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_HR1_ADCTRG1)   || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_HR1_ADCTRG3)   || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_LPTIM1_OUT)    || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_LPTIM2_OUT)    || \
 ((__REGTRIG__) == ADC_EXTERNALTRIG_LPTIM3_OUT)    || \
 ((__REGTRIG__) == ADC_SOFTWARE_START)           )

Verify the ADC regular conversions external trigger.

Parameters

__REGTRIG__

programmed ADC regular conversions external trigger.

Return values

SET	(REGTRIG is a valid value) or RESET (REGTRIG is invalid)

IS_ADC_EXTTRIG_EDGE

#define IS_ADC_EXTTRIG_EDGE

(

__EDGE__

)

Value:

(((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_NONE)         || \
((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_RISING)       || \
((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_FALLING)      || \
((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING)  )

Verify the ADC edge trigger setting for regular group.

Parameters

__EDGE__

programmed ADC edge trigger setting.

Return values

SET	(EDGE is a valid value) or RESET (EDGE is invalid)

IS_ADC_OVERRUN

#define IS_ADC_OVERRUN

(

__OVR__

)

Value:

(((__OVR__) == ADC_OVR_DATA_PRESERVED)  || \
((__OVR__) == ADC_OVR_DATA_OVERWRITTEN)  )

Verify the ADC regular conversions overrun handling.

Parameters

__OVR__

ADC regular conversions overrun handling.

Return values

SET	(OVR is a valid value) or RESET (OVR is invalid)

IS_ADC_RANGE

#define IS_ADC_RANGE	(		__RESOLUTION__,
			__ADC_VALUE__ )

Value:

((__ADC_VALUE__) <= __LL_ADC_DIGITAL_SCALE(__RESOLUTION__))

Verify that a given value is aligned with the ADC resolution range.

Parameters

__RESOLUTION__	ADC resolution (16, 14, 12, 10 or 8 bits).
__ADC_VALUE__	value checked against the resolution.

Return values

SET	(ADC_VALUE in line with RESOLUTION) or RESET (ADC_VALUE not in line with RESOLUTION)

IS_ADC_REGULAR_DISCONT_NUMBER

#define IS_ADC_REGULAR_DISCONT_NUMBER

(

NUMBER

)

Value:

(((NUMBER) >= (1UL)) && ((NUMBER) <= (8UL)))

Verify the number of scheduled regular conversions in discontinuous mode.

Parameters

NUMBER

number of scheduled regular conversions in discontinuous mode.

Return values

SET	(NUMBER is within the maximum number of regular conversions in discontinuous mode) or RESET (NUMBER is null or too large)

IS_ADC_REGULAR_NB_CONV

#define IS_ADC_REGULAR_NB_CONV

(

__LENGTH__

)

Value:

(((__LENGTH__) >= (1UL)) && ((__LENGTH__) <= (16UL)))

Verify the length of the scheduled regular conversions group.

Parameters

__LENGTH__

number of programmed conversions.

Return values

SET	(LENGTH is within the maximum number of possible programmable regular conversions) or RESET (LENGTH is null or too large)

IS_ADC_REGULAR_RANK

#define IS_ADC_REGULAR_RANK

(

__CHANNEL__

)

Value:

(((__CHANNEL__) == ADC_REGULAR_RANK_1 ) || \
((__CHANNEL__) == ADC_REGULAR_RANK_2 ) || \
((__CHANNEL__) == ADC_REGULAR_RANK_3 ) || \
((__CHANNEL__) == ADC_REGULAR_RANK_4 ) || \
((__CHANNEL__) == ADC_REGULAR_RANK_5 ) || \
((__CHANNEL__) == ADC_REGULAR_RANK_6 ) || \
((__CHANNEL__) == ADC_REGULAR_RANK_7 ) || \
((__CHANNEL__) == ADC_REGULAR_RANK_8 ) || \
((__CHANNEL__) == ADC_REGULAR_RANK_9 ) || \
((__CHANNEL__) == ADC_REGULAR_RANK_10) || \
((__CHANNEL__) == ADC_REGULAR_RANK_11) || \
((__CHANNEL__) == ADC_REGULAR_RANK_12) || \
((__CHANNEL__) == ADC_REGULAR_RANK_13) || \
((__CHANNEL__) == ADC_REGULAR_RANK_14) || \
((__CHANNEL__) == ADC_REGULAR_RANK_15) || \
((__CHANNEL__) == ADC_REGULAR_RANK_16)   )

Verify the ADC regular channel setting.

Parameters

__CHANNEL__

programmed ADC regular channel.

Return values

SET	(CHANNEL is valid) or RESET (CHANNEL is invalid)

IS_ADC_RESOLUTION

#define IS_ADC_RESOLUTION

(

__RESOLUTION__

)

Value:

(((__RESOLUTION__) == ADC_RESOLUTION_16B) || \
((__RESOLUTION__) == ADC_RESOLUTION_14B) || \
((__RESOLUTION__) == ADC_RESOLUTION_12B) || \
((__RESOLUTION__) == ADC_RESOLUTION_10B) || \
((__RESOLUTION__) == ADC_RESOLUTION_8B)    )

Verify the ADC resolution setting.

Parameters

__RESOLUTION__

programmed ADC resolution.

Return values

SET	(RESOLUTION is a valid value) or RESET (RESOLUTION is invalid)

IS_ADC_RESOLUTION_8_BITS

#define IS_ADC_RESOLUTION_8_BITS

(

__RESOLUTION__

)

Value:

(((__RESOLUTION__) == ADC_RESOLUTION_8B))

Verify the ADC resolution setting when limited to 8 bits.

Parameters

__RESOLUTION__

programmed ADC resolution when limited to 8 bits.

Return values

SET	(RESOLUTION is a valid value) or RESET (RESOLUTION is invalid)

IS_ADC_SAMPLE_TIME

#define IS_ADC_SAMPLE_TIME

(

__TIME__

)

Value:

(((__TIME__) == ADC_SAMPLETIME_1CYCLE_5)    || \
((__TIME__) == ADC_SAMPLETIME_2CYCLES_5)   || \
((__TIME__) == ADC_SAMPLETIME_8CYCLES_5)   || \
((__TIME__) == ADC_SAMPLETIME_16CYCLES_5)  || \
((__TIME__) == ADC_SAMPLETIME_32CYCLES_5)  || \
((__TIME__) == ADC_SAMPLETIME_64CYCLES_5)  || \
((__TIME__) == ADC_SAMPLETIME_387CYCLES_5) || \
((__TIME__) == ADC_SAMPLETIME_810CYCLES_5)   )

Verify the ADC conversions sampling time.

Parameters

__TIME__

ADC conversions sampling time.

Return values

SET	(TIME is a valid value) or RESET (TIME is invalid)

IS_ADC_SCAN_MODE

#define IS_ADC_SCAN_MODE

(

__SCAN_MODE__

)

Value:

(((__SCAN_MODE__) == ADC_SCAN_DISABLE) || \
((__SCAN_MODE__) == ADC_SCAN_ENABLE)    )

Verify the ADC scan mode.

Parameters

__SCAN_MODE__

programmed ADC scan mode.

Return values

SET	(SCAN_MODE is valid) or RESET (SCAN_MODE is invalid)