RTEMS
5.1
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Acc hardware registers. More...
#include <component_acc.h>
Data Fields | |
__O uint32_t | ACC_CR |
(Acc Offset: 0x00) Control Register | |
__IO uint32_t | ACC_MR |
(Acc Offset: 0x04) Mode Register | |
__I uint32_t | Reserved1 [7] |
__O uint32_t | ACC_IER |
(Acc Offset: 0x24) Interrupt Enable Register | |
__O uint32_t | ACC_IDR |
(Acc Offset: 0x28) Interrupt Disable Register | |
__I uint32_t | ACC_IMR |
(Acc Offset: 0x2C) Interrupt Mask Register | |
__I uint32_t | ACC_ISR |
(Acc Offset: 0x30) Interrupt Status Register | |
__I uint32_t | Reserved2 [24] |
__IO uint32_t | ACC_ACR |
(Acc Offset: 0x94) Analog Control Register | |
__I uint32_t | Reserved3 [19] |
__IO uint32_t | ACC_WPMR |
(Acc Offset: 0xE4) Write Protection Mode Register | |
__I uint32_t | ACC_WPSR |
(Acc Offset: 0xE8) Write Protection Status Register | |
__I uint32_t | Reserved4 [4] |
__I uint32_t | ACC_VER |
(Acc Offset: 0xFC) Version Register | |
Acc hardware registers.