Timer support. More...

Timer Control Register Defines
#define	LPC_TIMER_TCR_EN 0x1U

#define	LPC_TIMER_TCR_RST 0x2U

Match Control Register Defines
#define	LPC_TIMER_MCR_MR0_INTR 0x1U

#define	LPC_TIMER_MCR_MR0_RST 0x2U

#define	LPC_TIMER_MCR_MR0_STOP 0x4U

#define	LPC_TIMER_MCR_MR1_INTR 0x8U

#define	LPC_TIMER_MCR_MR1_RST 0x10U

#define	LPC_TIMER_MCR_MR1_STOP 0x20U

#define	LPC_TIMER_MCR_MR2_INTR 0x40U

#define	LPC_TIMER_MCR_MR2_RST 0x80U

#define	LPC_TIMER_MCR_MR2_STOP 0x100U

#define	LPC_TIMER_MCR_MR3_INTR 0x200U

#define	LPC_TIMER_MCR_MR3_RST 0x400U

#define	LPC_TIMER_MCR_MR3_STOP 0x800U

Capture Control Register Defines
#define	LPC_TIMER_CCR_CAP0_RE 0x1U

#define	LPC_TIMER_CCR_CAP0_FE 0x2U

#define	LPC_TIMER_CCR_CAP0_INTR 0x4U

#define	LPC_TIMER_CCR_CAP1_RE 0x8U

#define	LPC_TIMER_CCR_CAP1_FE 0x10U

#define	LPC_TIMER_CCR_CAP1_INTR 0x20U

#define	LPC_TIMER_CCR_CAP2_RE 0x40U

#define	LPC_TIMER_CCR_CAP2_FE 0x80U

#define	LPC_TIMER_CCR_CAP2_INTR 0x100U

#define	LPC_TIMER_CCR_CAP3_RE 0x200U

#define	LPC_TIMER_CCR_CAP3_FE 0x400U

#define	LPC_TIMER_CCR_CAP3_INTR 0x800U

External Match Register Defines
#define	LPC_TIMER_EMR_EM0_RE 0x1U

#define	LPC_TIMER_EMR_EM1_FE 0x2U

#define	LPC_TIMER_EMR_EM2_INTR 0x4U

#define	LPC_TIMER_EMR_EM3_RE 0x8U

#define	LPC_TIMER_EMR_EMC0_FE 0x10U

#define	LPC_TIMER_EMR_EMC1_INTR 0x20U

#define	LPC_TIMER_EMR_EMC2_RE 0x40U

#define	LPC_TIMER_EMR_EMC3_FE 0x80U

Detailed Description

Timer support.

Files