RTEMS
5.1
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RISC-V Assembler Support. More...
Macros | |
#define | __USER_LABEL_PREFIX__ _ |
#define | __REGISTER_PREFIX__ |
#define | CONCAT1(a, b) CONCAT2(a, b) |
#define | CONCAT2(a, b) a ## b |
#define | SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x) |
#define | REG(x) CONCAT1 (__REGISTER_PREFIX__, x) |
#define | BEGIN_CODE_DCL .text |
#define | END_CODE_DCL |
#define | BEGIN_DATA_DCL .data |
#define | END_DATA_DCL |
#define | BEGIN_CODE .text |
#define | END_CODE |
#define | BEGIN_DATA |
#define | END_DATA |
#define | BEGIN_BSS |
#define | END_BSS |
#define | END |
#define | PUBLIC(sym) .global SYM (sym) |
#define | EXTERN(sym) .extern SYM (sym) |
#define | TYPE_FUNC(sym) .type SYM (sym), %function |
#define | LADDR la |
Variables | |
macro GET_SELF_CPU_CONTROL REG LADDR | REG |
RISC-V Assembler Support.