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#define | EPIPHANY_PER_CORE_REG_CONFIG 0xF0400 |
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#define | EPIPHANY_PER_CORE_REG_STATUS 0xF0404 |
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#define | EPIPHANY_PER_CORE_REG_PC 0xF0408 |
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#define | EPIPHANY_PER_CORE_REG_DEBUGSTATUS 0xF040C |
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#define | EPIPHANY_PER_CORE_REG_LC 0xF0414 |
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#define | EPIPHANY_PER_CORE_REG_LS 0xF0418 |
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#define | EPIPHANY_PER_CORE_REG_LE 0xF041C |
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#define | EPIPHANY_PER_CORE_REG_IRET 0xF0420 |
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#define | EPIPHANY_PER_CORE_REG_IMASK 0xF0424 |
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#define | EPIPHANY_PER_CORE_REG_ILAT 0xF0428 |
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#define | EPIPHANY_PER_CORE_REG_ILATST 0xF042C |
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#define | EPIPHANY_PER_CORE_REG_ILATCL 0xF0430 |
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#define | EPIPHANY_PER_CORE_REG_IPEND 0xF0434 |
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#define | EPIPHANY_PER_CORE_REG_FSTATUS 0xF0440 |
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#define | EPIPHANY_PER_CORE_REG_DEBUGCMD 0xF0448 |
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#define | EPIPHANY_PER_CORE_REG_RESETCORE 0xF070C |
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#define | EPIPHANY_PER_CORE_REG_CTIMER0 0xF0438 |
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#define | EPIPHANY_PER_CORE_REG_CTIMER1 0xF043C |
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#define | EPIPHANY_PER_CORE_REG_MEMSTATUS 0xF0604 |
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#define | EPIPHANY_PER_CORE_REG_MEMPROTECT 0xF0608 |
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#define | EPIPHANY_PER_CORE_REG_DMA0CONFIG 0xF0500 |
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#define | EPIPHANY_PER_CORE_REG_DMA0STRIDE 0xF0504 |
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#define | EPIPHANY_PER_CORE_REG_DMA0COUNT 0xF0508 |
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#define | EPIPHANY_PER_CORE_REG_DMA0SRCADDR 0xF050C |
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#define | EPIPHANY_PER_CORE_REG_DMA0DSTADDR 0xF0510 |
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#define | EPIPHANY_PER_CORE_REG_DMA0AUTO0 0xF0514 |
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#define | EPIPHANY_PER_CORE_REG_DMA0AUTO1 0xF0518 |
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#define | EPIPHANY_PER_CORE_REG_DMA0STATUS 0xF051C |
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#define | EPIPHANY_PER_CORE_REG_DMA1CONFIG 0xF0520 |
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#define | EPIPHANY_PER_CORE_REG_DMA1STRIDE 0xF0524 |
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#define | EPIPHANY_PER_CORE_REG_DMA1COUNT 0xF0528 |
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#define | EPIPHANY_PER_CORE_REG_DMA1SRCADDR 0xF052C |
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#define | EPIPHANY_PER_CORE_REG_DMA1DSTADDR 0xF0530 |
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#define | EPIPHANY_PER_CORE_REG_DMA1AUTO0 0xF0534 |
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#define | EPIPHANY_PER_CORE_REG_DMA1AUTO1 0xF0538 |
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#define | EPIPHANY_PER_CORE_REG_DMA1STATUS 0xF053C |
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#define | EPIPHANY_PER_CORE_REG_MESHCONFIG 0xF0700 |
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#define | EPIPHANY_PER_CORE_REG_COREID 0xF0704 |
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#define | EPIPHANY_PER_CORE_REG_MULTICAST 0xF0708 |
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#define | EPIPHANY_PER_CORE_REG_CMESHROUTE 0xF0710 |
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#define | EPIPHANY_PER_CORE_REG_XMESHROUTE 0xF0714 |
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#define | EPIPHANY_PER_CORE_REG_RMESHROUTE 0xF0718 |
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#define | EPIPHANY_COREID_TO_MSB_ADDR(id) (id) << 20 |
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#define | EPIPHANY_GET_REG_ABSOLUTE_ADDR(coreid, reg) (EPIPHANY_COREID_TO_MSB_ADDR(coreid) | (reg)) |
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#define | EPIPHANY_REG(reg) (uint32_t *) (reg) |
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