RTEMS
grlib_impl.h
1 /*
2  * Copyright (C) 2017 Cobham Gaisler AB
3  *
4  * The license and distribution terms for this file may be
5  * found in the file LICENSE in this distribution or at
6  * http://www.rtems.org/license/LICENSE.
7  */
8 
9 #ifndef GRLIB_IMPL_H
10 #define GRLIB_IMPL_H
11 
12 #include <rtems/score/basedefs.h>
13 #include <rtems/malloc.h>
14 
15 /*
16  * Use interrupt lock primitives compatible with SMP defined in RTEMS 4.11.99
17  * and higher.
18  */
19 #if (((__RTEMS_MAJOR__ << 16) | (__RTEMS_MINOR__ << 8) | __RTEMS_REVISION__) >= 0x040b63)
20 
21 #include <rtems/score/isrlock.h>
22 
23 /* map via rtems_interrupt_lock_* API: */
24 #define SPIN_DECLARE(lock) RTEMS_INTERRUPT_LOCK_MEMBER(lock)
25 #define SPIN_INIT(lock, name) rtems_interrupt_lock_initialize(lock, name)
26 #define SPIN_LOCK(lock, level) rtems_interrupt_lock_acquire_isr(lock, &level)
27 #define SPIN_LOCK_IRQ(lock, level) rtems_interrupt_lock_acquire(lock, &level)
28 #define SPIN_UNLOCK(lock, level) rtems_interrupt_lock_release_isr(lock, &level)
29 #define SPIN_UNLOCK_IRQ(lock, level) rtems_interrupt_lock_release(lock, &level)
30 #define SPIN_IRQFLAGS(k) rtems_interrupt_lock_context k
31 #define SPIN_ISR_IRQFLAGS(k) SPIN_IRQFLAGS(k)
32 #define SPIN_FREE(lock) rtems_interrupt_lock_destroy(lock)
33 
34 /* turn on/off local CPU's interrupt to ensure HW timing - not SMP safe. */
35 #define IRQ_LOCAL_DECLARE(_level) rtems_interrupt_level _level
36 #define IRQ_LOCAL_DISABLE(_level) rtems_interrupt_local_disable(_level)
37 #define IRQ_LOCAL_ENABLE(_level) rtems_interrupt_local_enable(_level)
38 
39 #else
40 
41 #ifdef RTEMS_SMP
42 #error SMP mode not compatible with these interrupt lock primitives
43 #endif
44 
45 /* maintain single-core compatibility with older versions of RTEMS: */
46 #define SPIN_DECLARE(name)
47 #define SPIN_INIT(lock, name)
48 #define SPIN_LOCK(lock, level)
49 #define SPIN_LOCK_IRQ(lock, level) rtems_interrupt_disable(level)
50 #define SPIN_UNLOCK(lock, level)
51 #define SPIN_UNLOCK_IRQ(lock, level) rtems_interrupt_enable(level)
52 #define SPIN_IRQFLAGS(k) rtems_interrupt_level k
53 #define SPIN_ISR_IRQFLAGS(k)
54 #define SPIN_FREE(lock)
55 
56 /* turn on/off local CPU's interrupt to ensure HW timing - not SMP safe. */
57 #define IRQ_LOCAL_DECLARE(_level) rtems_interrupt_level _level
58 #define IRQ_LOCAL_DISABLE(_level) rtems_interrupt_disable(_level)
59 #define IRQ_LOCAL_ENABLE(_level) rtems_interrupt_enable(_level)
60 
61 #endif
62 
63 #ifdef __cplusplus
64 extern "C" {
65 #endif
66 
67 #if (((__RTEMS_MAJOR__ << 16) | (__RTEMS_MINOR__ << 8) | __RTEMS_REVISION__) >= 0x050000)
68 
69 RTEMS_INLINE_ROUTINE void *grlib_malloc(size_t size)
70 {
71  return rtems_malloc(size);
72 }
73 
74 RTEMS_INLINE_ROUTINE void *grlib_calloc(size_t nelem, size_t elsize)
75 {
76  return rtems_calloc(nelem, elsize);
77 }
78 
79 #else
80 
81 RTEMS_INLINE_ROUTINE void *grlib_malloc(size_t size)
82 {
83  return malloc(size);
84 }
85 
86 RTEMS_INLINE_ROUTINE void *grlib_calloc(size_t nelem, size_t elsize)
87 {
88  return calloc(nelem, elsize);
89 }
90 
91 #endif
92 
93 #ifdef __sparc__
94 
95 RTEMS_INLINE_ROUTINE unsigned char grlib_read_uncached8(unsigned int address)
96 {
97  unsigned char tmp;
98  __asm__ (" lduba [%1]1, %0 "
99  : "=r"(tmp)
100  : "r"(address)
101  );
102  return tmp;
103 }
104 
105 RTEMS_INLINE_ROUTINE unsigned short grlib_read_uncached16(unsigned int addr) {
106  unsigned short tmp;
107  __asm__ (" lduha [%1]1, %0 "
108  : "=r"(tmp)
109  : "r"(addr)
110  );
111  return tmp;
112 }
113 
114 
115 RTEMS_INLINE_ROUTINE unsigned int grlib_read_uncached32(unsigned int address)
116 {
117  unsigned int tmp;
118  __asm__ (" lda [%1]1, %0 "
119  : "=r"(tmp)
120  : "r"(address)
121  );
122  return tmp;
123 }
124 
125 #define GRLIB_DMA_IS_CACHE_COHERENT CPU_SPARC_HAS_SNOOPING
126 
127 #else
128 
129 static unsigned char __inline__ grlib_read_uncached8(unsigned int address)
130 {
131  unsigned char tmp = (*(volatile unsigned char *)(address));
132  return tmp;
133 }
134 
135 static __inline__ unsigned short grlib_read_uncached16(unsigned int address) {
136  unsigned short tmp = (*(volatile unsigned short *)(address));
137  return tmp;
138 }
139 
140 RTEMS_INLINE_ROUTINE unsigned int grlib_read_uncached32(unsigned int address)
141 {
142  unsigned int tmp = (*(volatile unsigned int *)(address));
143  return tmp;
144 }
145 
146 #define GRLIB_DMA_IS_CACHE_COHERENT 1
147 
148 #endif
149 
150 extern struct ambapp_bus ambapp_plb;
151 
152 #ifdef __cplusplus
153 }
154 #endif
155 
156 #endif /* GRLIB_IMPL_H */
void * rtems_malloc(size_t size) RTEMS_MALLOCLIKE RTEMS_ALLOC_SIZE(1) RTEMS_WARN_UNUSED_RESULT
Allocates a memory area of the specified size from the heap.
void * rtems_calloc(size_t nelem, size_t elsize) RTEMS_MALLOCLIKE RTEMS_ALLOC_SIZE_2(1
Allocates a memory area for the specified count of elements from the heap.
This header file provides basic definitions used by the API and the implementation.
#define RTEMS_INLINE_ROUTINE
Gives a hint to the compiler in a function declaration to inline this function.
Definition: basedefs.h:683
ISR Locks.