RCC_TypeDef Struct Reference

Reset and Clock Control. More...

#include <stm32u5g9xx.h>

Data Fields
__IO uint32_t	CR
uint32_t	RESERVED0
__IO uint32_t	ICSCR1
__IO uint32_t	ICSCR2
__IO uint32_t	ICSCR3
__IO uint32_t	CRRCR
uint32_t	RESERVED1
__IO uint32_t	CFGR1
__IO uint32_t	CFGR2
__IO uint32_t	CFGR3
__IO uint32_t	PLL1CFGR
__IO uint32_t	PLL2CFGR
__IO uint32_t	PLL3CFGR
__IO uint32_t	PLL1DIVR
__IO uint32_t	PLL1FRACR
__IO uint32_t	PLL2DIVR
__IO uint32_t	PLL2FRACR
__IO uint32_t	PLL3DIVR
__IO uint32_t	PLL3FRACR
uint32_t	RESERVED2
__IO uint32_t	CIER
__IO uint32_t	CIFR
__IO uint32_t	CICR
uint32_t	RESERVED3
__IO uint32_t	AHB1RSTR
__IO uint32_t	AHB2RSTR1
__IO uint32_t	AHB2RSTR2
__IO uint32_t	AHB3RSTR
uint32_t	RESERVED4
__IO uint32_t	APB1RSTR1
__IO uint32_t	APB1RSTR2
__IO uint32_t	APB2RSTR
__IO uint32_t	APB3RSTR
uint32_t	RESERVED5
__IO uint32_t	AHB1ENR
__IO uint32_t	AHB2ENR1
__IO uint32_t	AHB2ENR2
__IO uint32_t	AHB3ENR
uint32_t	RESERVED6
__IO uint32_t	APB1ENR1
__IO uint32_t	APB1ENR2
__IO uint32_t	APB2ENR
__IO uint32_t	APB3ENR
uint32_t	RESERVED7
__IO uint32_t	AHB1SMENR
__IO uint32_t	AHB2SMENR1
__IO uint32_t	AHB2SMENR2
__IO uint32_t	AHB3SMENR
uint32_t	RESERVED8
__IO uint32_t	APB1SMENR1
__IO uint32_t	APB1SMENR2
__IO uint32_t	APB2SMENR
__IO uint32_t	APB3SMENR
uint32_t	RESERVED9
__IO uint32_t	SRDAMR
uint32_t	RESERVED10
__IO uint32_t	CCIPR1
__IO uint32_t	CCIPR2
__IO uint32_t	CCIPR3
uint32_t	RESERVED11
__IO uint32_t	BDCR
__IO uint32_t	CSR
uint32_t	RESERVED [6]
__IO uint32_t	SECCFGR
__IO uint32_t	PRIVCFGR

Detailed Description

Reset and Clock Control.

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The documentation for this struct was generated from the following file:

• bsps/arm/stm32u5/include/stm32u5g9xx.h