RTEMS 7.0-rc1
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tm27.h
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 * @file
5 * @ingroup powerpc_gen5200
6 * @brief Implementations for interrupt mechanisms for Time Test 27
7 */
8
9/*
10 * Copyright (C) 2005 embedded brains GmbH & Co. KG
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#ifndef _RTEMS_TMTEST27
35#error "This is an RTEMS internal file you must not include directly."
36#endif
37
38#ifndef __tm27_h
39#define __tm27_h
40
41#include <bsp/fatal.h>
42#include <bsp/irq.h>
43
44/*
45 * Stuff for Time Test 27
46 */
47
48#define MUST_WAIT_FOR_INTERRUPT 1
49
50static void stub_rtems_irq_enable( const struct __rtems_irq_connect_data__ *i )
51{
52 (void) i;
53}
54
55static void stub_rtems_irq_disable( const struct __rtems_irq_connect_data__ *i )
56{
57 (void) i;
58}
59
60static int stub_rtems_irq_is_enabled(
61 const struct __rtems_irq_connect_data__ *i
62)
63{
64 (void) i;
65 return 0;
66}
67
68static rtems_irq_connect_data clockIrqData = {
69 BSP_DECREMENTER,
70 0,
71 0,
72 stub_rtems_irq_enable,
73 stub_rtems_irq_disable,
74 stub_rtems_irq_is_enabled
75};
76
77static inline void Install_tm27_vector( rtems_interrupt_handler handler )
78{
79 clockIrqData.hdl = handler;
80 if ( !BSP_install_rtems_irq_handler( &clockIrqData ) ) {
81 printk( "Error installing clock interrupt handler!\n" );
82 bsp_fatal( MPC5200_FATAL_TM27_IRQ_INSTALL );
83 }
84}
85
86#define Cause_tm27_intr() \
87 do { \
88 uint32_t _clicks = 8; \
89 __asm__ volatile( "mtdec %0" \
90 : "=r"(( _clicks )) \
91 : "r"(( _clicks )) ); \
92 } while ( 0 )
93
94#define Clear_tm27_intr() \
95 do { \
96 uint32_t _clicks = 0xffffffff; \
97 __asm__ volatile( "mtdec %0" \
98 : "=r"(( _clicks )) \
99 : "r"(( _clicks )) ); \
100 } while ( 0 )
101
102#define Lower_tm27_intr() \
103 do { \
104 uint32_t _msr = 0; \
105 _ISR_Set_level( 0 ); \
106 __asm__ volatile( "mfmsr %0 ;" \
107 : "=r"( _msr ) \
108 : "r"( _msr ) ); \
109 _msr |= 0x8002; \
110 __asm__ volatile( "mtmsr %0 ;" \
111 : "=r"( _msr ) \
112 : "r"( _msr ) ); \
113 } while ( 0 )
114
115#endif
This header file provides fatal codes for RTEMS_FATAL_SOURCE_BSP.
void(* rtems_interrupt_handler)(void *)
Interrupt handler routines shall have this type.
Definition: intr.h:1030
Definition: irq.h:65