RTEMS 7.0-rc1
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Macros
STM32U5xx_Peripheral_Exported_macros
ST » STM32U5G9xx » STM32U5xx_peripherals » STM32U5xx_Peripheral_declaration

Macros

#define IS_ADC_ALL_INSTANCE(INSTANCE)
 
#define IS_ADC_MULTIMODE_MASTER_INSTANCE(INSTANCE)
 
#define IS_ADC_COMMON_INSTANCE(INSTANCE)
 
#define IS_AES_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == AES_NS) || ((INSTANCE) == AES_S))
 
#define IS_PKA_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == PKA_NS) || ((INSTANCE) == PKA_S))
 
#define IS_FDCAN_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == FDCAN1_NS) || ((INSTANCE) == FDCAN1_S))
 
#define IS_COMP_ALL_INSTANCE(INSTANCE)
 
#define IS_COMP_WINDOWMODE_INSTANCE(INSTANCE)
 
#define IS_CORDIC_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == CORDIC_NS) || ((INSTANCE) == CORDIC_S))
 
#define IS_CRC_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == CRC_NS) || ((INSTANCE) == CRC_S))
 
#define IS_DAC_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == DAC1_NS) || ((INSTANCE) == DAC1_S))
 
#define IS_DLYB_ALL_INSTANCE(INSTANCE)
 
#define IS_DMA_ALL_INSTANCE(INSTANCE)
 
#define IS_GPDMA_INSTANCE(INSTANCE)
 
#define IS_LPDMA_INSTANCE(INSTANCE)
 
#define IS_DMA_2D_ADDRESSING_INSTANCE(INSTANCE)
 
#define IS_OTFDEC_ALL_INSTANCE(INSTANCE)
 
#define IS_RAMCFG_ALL_INSTANCE(INSTANCE)
 
#define IS_RAMCFG_ECC_INSTANCE(INSTANCE)
 
#define IS_RAMCFG_IT_INSTANCE(INSTANCE)
 
#define IS_RAMCFG_WP_INSTANCE(INSTANCE)   (((INSTANCE) == RAMCFG_SRAM2_NS) || ((INSTANCE) == RAMCFG_SRAM2_S))
 
#define IS_FMAC_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == FMAC_NS) || ((INSTANCE) == FMAC_S))
 
#define IS_GFXMMU_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == GFXMMU_NS) || ((INSTANCE) == GFXMMU_S))
 
#define IS_GPIO_ALL_INSTANCE(INSTANCE)
 
#define IS_LPGPIO_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == LPGPIO1_NS) || ((INSTANCE) == LPGPIO1_S))
 
#define IS_LTDC_ALL_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == LTDC_NS) || ((__INSTANCE__) == LTDC_S))
 
#define IS_DSI_ALL_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == DSI_NS) || ((__INSTANCE__) == DSI_S))
 
#define IS_DMA2D_ALL_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == DMA2D_NS) || ((__INSTANCE__) == DMA2D_S))
 
#define IS_DCMI_ALL_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == DCMI_NS) || ((__INSTANCE__) == DCMI_S))
 
#define IS_DCACHE_ALL_INSTANCE(INSTANCE)
 
#define IS_PSSI_ALL_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == PSSI_NS) || ((__INSTANCE__) == PSSI_S))
 
#define IS_GPIO_AF_INSTANCE(INSTANCE)   IS_GPIO_ALL_INSTANCE(INSTANCE)
 
#define IS_GPIO_LOCK_INSTANCE(INSTANCE)   IS_GPIO_ALL_INSTANCE(INSTANCE)
 
#define IS_I2C_ALL_INSTANCE(INSTANCE)
 
#define IS_I2C_WAKEUP_FROMSTOP_INSTANCE(INSTANCE)   IS_I2C_ALL_INSTANCE(INSTANCE)
 
#define IS_I2C_GRP1_INSTANCE(INSTANCE)
 
#define IS_I2C_GRP2_INSTANCE(INSTANCE)   (((INSTANCE) == I2C3_NS) || ((INSTANCE) == I2C3_S))
 
#define IS_OPAMP_ALL_INSTANCE(INSTANCE)
 
#define IS_OSPI_ALL_INSTANCE(INSTANCE)
 
#define IS_HSPI_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == HSPI1_NS) || ((INSTANCE) == HSPI1_S))
 
#define IS_RNG_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == RNG_NS) || ((INSTANCE) == RNG_S))
 
#define IS_RTC_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == RTC_NS) || ((INSTANCE) == RTC_S))
 
#define IS_SAI_ALL_INSTANCE(INSTANCE)
 
#define IS_SDMMC_ALL_INSTANCE(INSTANCE)
 
#define IS_SMBUS_ALL_INSTANCE(INSTANCE)
 
#define IS_SMBUS_GRP1_INSTANCE(INSTANCE)
 
#define IS_SMBUS_GRP2_INSTANCE(INSTANCE)   (((INSTANCE) == I2C3_NS) || ((INSTANCE) == I2C3_S))
 
#define IS_SPI_ALL_INSTANCE(INSTANCE)
 
#define IS_SPI_LIMITED_INSTANCE(INSTANCE)   (((INSTANCE) == SPI3_NS) || ((INSTANCE) == SPI3_S))
 
#define IS_SPI_FULL_INSTANCE(INSTANCE)
 
#define IS_SPI_GRP1_INSTANCE(INSTANCE)
 
#define IS_SPI_GRP2_INSTANCE(INSTANCE)   (((INSTANCE) == SPI3_NS) || ((INSTANCE) == SPI3_S))
 
#define IS_LPTIM_INSTANCE(INSTANCE)
 
#define IS_LPTIM_DMA_INSTANCE(INSTANCE)
 
#define IS_LPTIM_CC1_INSTANCE(INSTANCE)
 
#define IS_LPTIM_CC2_INSTANCE(INSTANCE)
 
#define IS_LPTIM_ENCODER_INTERFACE_INSTANCE(INSTANCE)
 
#define IS_LPTIM_INPUT_CAPTURE_INSTANCE(INSTANCE)
 
#define IS_TIM_INSTANCE(INSTANCE)
 
#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE)
 
#define IS_TIM_BREAK_INSTANCE(INSTANCE)
 
#define IS_TIM_BREAKSOURCE_INSTANCE(INSTANCE)
 
#define IS_TIM_BKIN2_INSTANCE(INSTANCE)
 
#define IS_TIM_CC1_INSTANCE(INSTANCE)
 
#define IS_TIM_CC2_INSTANCE(INSTANCE)
 
#define IS_TIM_CC3_INSTANCE(INSTANCE)
 
#define IS_TIM_CC4_INSTANCE(INSTANCE)
 
#define IS_TIM_CC5_INSTANCE(INSTANCE)
 
#define IS_TIM_CC6_INSTANCE(INSTANCE)
 
#define IS_TIM_DMA_INSTANCE(INSTANCE)
 
#define IS_TIM_DMA_CC_INSTANCE(INSTANCE)
 
#define IS_TIM_DMABURST_INSTANCE(INSTANCE)
 
#define IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL)
 
#define IS_TIM_CCXN_INSTANCE(INSTANCE, CHANNEL)
 
#define IS_TIM_CLOCK_DIVISION_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_TIX_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(INSTANCE)
 
#define IS_TIM_COMBINED3PHASEPWM_INSTANCE(INSTANCE)
 
#define IS_TIM_COMMUTATION_EVENT_INSTANCE(INSTANCE)
 
#define IS_TIM_COUNTER_MODE_SELECT_INSTANCE(INSTANCE)
 
#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE)
 
#define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(INSTANCE)
 
#define IS_TIM_ETR_INSTANCE(INSTANCE)
 
#define IS_TIM_MASTER_INSTANCE(INSTANCE)
 
#define IS_TIM_SLAVE_INSTANCE(INSTANCE)
 
#define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE)
 
#define IS_TIM_REMAP_INSTANCE(INSTANCE)
 
#define IS_TIM_REPETITION_COUNTER_INSTANCE(INSTANCE)
 
#define IS_TIM_TRGO2_INSTANCE(INSTANCE)
 
#define IS_TIM_XOR_INSTANCE(INSTANCE)
 
#define IS_TIM_TISEL_INSTANCE(INSTANCE)
 
#define IS_TIM_HSE32_INSTANCE(INSTANCE)
 
#define IS_TIM_ADVANCED_INSTANCE(INSTANCE)
 
#define IS_TIM_SYNCHRO_INSTANCE(__INSTANCE__)
 
#define IS_TSC_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == TSC_NS) || ((INSTANCE) == TSC_S))
 
#define IS_USART_INSTANCE(INSTANCE)
 
#define IS_UART_INSTANCE(INSTANCE)
 
#define IS_UART_FIFO_INSTANCE(INSTANCE)
 
#define IS_UART_SPI_SLAVE_INSTANCE(INSTANCE)
 
#define IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(INSTANCE)
 
#define IS_UART_DRIVER_ENABLE_INSTANCE(INSTANCE)
 
#define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE)
 
#define IS_UART_HWFLOW_INSTANCE(INSTANCE)
 
#define IS_UART_LIN_INSTANCE(INSTANCE)
 
#define IS_UART_WAKEUP_FROMSTOP_INSTANCE(INSTANCE)
 
#define IS_IRDA_INSTANCE(INSTANCE)
 
#define IS_SMARTCARD_INSTANCE(INSTANCE)
 
#define IS_LPUART_INSTANCE(INSTANCE)   (((INSTANCE) == LPUART1_NS) || ((INSTANCE) == LPUART1_S))
 
#define IS_UART_AUTONOMOUS_INSTANCE(INSTANCE)
 
#define IS_IWDG_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == IWDG_NS) || ((INSTANCE) == IWDG_S))
 
#define IS_WWDG_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == WWDG_NS) || ((INSTANCE) == WWDG_S))
 
#define IS_UCPD_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == UCPD1_NS) || ((INSTANCE) == UCPD1_S))
 
#define IS_HCD_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == USB_OTG_HS_NS) || ((INSTANCE) == USB_OTG_HS_S))
 
#define IS_PCD_ALL_INSTANCE(INSTANCE)   (((INSTANCE) == USB_OTG_HS_NS) || ((INSTANCE) == USB_OTG_HS_S))
 
#define IS_MDF_ALL_INSTANCE(INSTANCE)
 
#define IS_GPU2D_ALL_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == GPU2D_BASE_NS) || ((__INSTANCE__) == GPU2D_BASE_S))
 
#define IS_JPEG_ALL_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == JPEG_NS) || ((__INSTANCE__) == JPEG_S))
 
#define IS_GFXTIM_ALL_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == GFXTIM_NS) || ((__INSTANCE__) == GFXTIM_S))
 

Detailed Description

Macro Definition Documentation

◆ IS_ADC_ALL_INSTANCE

#define IS_ADC_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == ADC1_NS) || \
((INSTANCE) == ADC1_S) || \
((INSTANCE) == ADC2_NS) || \
((INSTANCE) == ADC2_S) || \
((INSTANCE) == ADC4_NS) || \
((INSTANCE) == ADC4_S))

◆ IS_ADC_COMMON_INSTANCE

#define IS_ADC_COMMON_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == ADC12_COMMON_NS) || \
((INSTANCE) == ADC12_COMMON_S) || \
((INSTANCE) == ADC4_COMMON_NS) || \
((INSTANCE) == ADC4_COMMON_S))

◆ IS_ADC_MULTIMODE_MASTER_INSTANCE

#define IS_ADC_MULTIMODE_MASTER_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == ADC1_NS) || \
((INSTANCE) == ADC1_S))

◆ IS_COMP_ALL_INSTANCE

#define IS_COMP_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == COMP1_NS) || ((INSTANCE) == COMP1_S) || \
((INSTANCE) == COMP2_NS) || ((INSTANCE) == COMP2_S))

◆ IS_COMP_WINDOWMODE_INSTANCE

#define IS_COMP_WINDOWMODE_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == COMP1_NS) || ((INSTANCE) == COMP1_S) || \
((INSTANCE) == COMP2_NS) || ((INSTANCE) == COMP2_S))

◆ IS_DCACHE_ALL_INSTANCE

#define IS_DCACHE_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == DCACHE1_NS) || ((INSTANCE) == DCACHE1_S) || \
((INSTANCE) == DCACHE2_NS) || ((INSTANCE) == DCACHE2_S))

◆ IS_DLYB_ALL_INSTANCE

#define IS_DLYB_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == DLYB_SDMMC1_NS) || \
((INSTANCE) == DLYB_SDMMC2_NS) || \
((INSTANCE) == DLYB_SDMMC1_S) || \
((INSTANCE) == DLYB_SDMMC2_S) || \
((INSTANCE) == DLYB_OCTOSPI1_NS) || \
((INSTANCE) == DLYB_OCTOSPI2_NS) || \
((INSTANCE) == DLYB_OCTOSPI1_S) || \
((INSTANCE) == DLYB_OCTOSPI2_S ))

◆ IS_DMA_2D_ADDRESSING_INSTANCE

#define IS_DMA_2D_ADDRESSING_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == GPDMA1_Channel12_NS) || ((INSTANCE) == GPDMA1_Channel12_S) || \
((INSTANCE) == GPDMA1_Channel13_NS) || ((INSTANCE) == GPDMA1_Channel13_S) || \
((INSTANCE) == GPDMA1_Channel14_NS) || ((INSTANCE) == GPDMA1_Channel14_S) || \
((INSTANCE) == GPDMA1_Channel15_NS) || ((INSTANCE) == GPDMA1_Channel15_S))

◆ IS_DMA_ALL_INSTANCE

#define IS_DMA_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == GPDMA1_Channel0_NS) || ((INSTANCE) == GPDMA1_Channel0_S) || \
((INSTANCE) == GPDMA1_Channel1_NS) || ((INSTANCE) == GPDMA1_Channel1_S) || \
((INSTANCE) == GPDMA1_Channel2_NS) || ((INSTANCE) == GPDMA1_Channel2_S) || \
((INSTANCE) == GPDMA1_Channel3_NS) || ((INSTANCE) == GPDMA1_Channel3_S) || \
((INSTANCE) == GPDMA1_Channel4_NS) || ((INSTANCE) == GPDMA1_Channel4_S) || \
((INSTANCE) == GPDMA1_Channel5_NS) || ((INSTANCE) == GPDMA1_Channel5_S) || \
((INSTANCE) == GPDMA1_Channel6_NS) || ((INSTANCE) == GPDMA1_Channel6_S) || \
((INSTANCE) == GPDMA1_Channel7_NS) || ((INSTANCE) == GPDMA1_Channel7_S) || \
((INSTANCE) == GPDMA1_Channel8_NS) || ((INSTANCE) == GPDMA1_Channel8_S) || \
((INSTANCE) == GPDMA1_Channel9_NS) || ((INSTANCE) == GPDMA1_Channel9_S) || \
((INSTANCE) == GPDMA1_Channel10_NS) || ((INSTANCE) == GPDMA1_Channel10_S) || \
((INSTANCE) == GPDMA1_Channel11_NS) || ((INSTANCE) == GPDMA1_Channel11_S) || \
((INSTANCE) == GPDMA1_Channel12_NS) || ((INSTANCE) == GPDMA1_Channel12_S) || \
((INSTANCE) == GPDMA1_Channel13_NS) || ((INSTANCE) == GPDMA1_Channel13_S) || \
((INSTANCE) == GPDMA1_Channel14_NS) || ((INSTANCE) == GPDMA1_Channel14_S) || \
((INSTANCE) == GPDMA1_Channel15_NS) || ((INSTANCE) == GPDMA1_Channel15_S) || \
((INSTANCE) == LPDMA1_Channel0_NS) || ((INSTANCE) == LPDMA1_Channel0_S) || \
((INSTANCE) == LPDMA1_Channel1_NS) || ((INSTANCE) == LPDMA1_Channel1_S) || \
((INSTANCE) == LPDMA1_Channel2_NS) || ((INSTANCE) == LPDMA1_Channel2_S) || \
((INSTANCE) == LPDMA1_Channel3_NS) || ((INSTANCE) == LPDMA1_Channel3_S))
LPDMA1_Channel3_S
#define LPDMA1_Channel3_S
Definition: stm32u5g9xx.h:2943
LPDMA1_Channel3_NS
#define LPDMA1_Channel3_NS
Definition: stm32u5g9xx.h:2758

◆ IS_GPDMA_INSTANCE

#define IS_GPDMA_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == GPDMA1_Channel0_NS) || ((INSTANCE) == GPDMA1_Channel0_S) || \
((INSTANCE) == GPDMA1_Channel1_NS) || ((INSTANCE) == GPDMA1_Channel1_S) || \
((INSTANCE) == GPDMA1_Channel2_NS) || ((INSTANCE) == GPDMA1_Channel2_S) || \
((INSTANCE) == GPDMA1_Channel3_NS) || ((INSTANCE) == GPDMA1_Channel3_S) || \
((INSTANCE) == GPDMA1_Channel4_NS) || ((INSTANCE) == GPDMA1_Channel4_S) || \
((INSTANCE) == GPDMA1_Channel5_NS) || ((INSTANCE) == GPDMA1_Channel5_S) || \
((INSTANCE) == GPDMA1_Channel6_NS) || ((INSTANCE) == GPDMA1_Channel6_S) || \
((INSTANCE) == GPDMA1_Channel7_NS) || ((INSTANCE) == GPDMA1_Channel7_S) || \
((INSTANCE) == GPDMA1_Channel8_NS) || ((INSTANCE) == GPDMA1_Channel8_S) || \
((INSTANCE) == GPDMA1_Channel9_NS) || ((INSTANCE) == GPDMA1_Channel9_S) || \
((INSTANCE) == GPDMA1_Channel10_NS) || ((INSTANCE) == GPDMA1_Channel10_S) || \
((INSTANCE) == GPDMA1_Channel11_NS) || ((INSTANCE) == GPDMA1_Channel11_S) || \
((INSTANCE) == GPDMA1_Channel12_NS) || ((INSTANCE) == GPDMA1_Channel12_S) || \
((INSTANCE) == GPDMA1_Channel13_NS) || ((INSTANCE) == GPDMA1_Channel13_S) || \
((INSTANCE) == GPDMA1_Channel14_NS) || ((INSTANCE) == GPDMA1_Channel14_S) || \
((INSTANCE) == GPDMA1_Channel15_NS) || ((INSTANCE) == GPDMA1_Channel15_S))

◆ IS_GPIO_ALL_INSTANCE

#define IS_GPIO_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == GPIOA_NS) || ((INSTANCE) == GPIOA_S) || \
((INSTANCE) == GPIOB_NS) || ((INSTANCE) == GPIOB_S) || \
((INSTANCE) == GPIOC_NS) || ((INSTANCE) == GPIOC_S) || \
((INSTANCE) == GPIOD_NS) || ((INSTANCE) == GPIOD_S) || \
((INSTANCE) == GPIOE_NS) || ((INSTANCE) == GPIOE_S) || \
((INSTANCE) == GPIOF_NS) || ((INSTANCE) == GPIOF_S) || \
((INSTANCE) == GPIOG_NS) || ((INSTANCE) == GPIOG_S) || \
((INSTANCE) == GPIOH_NS) || ((INSTANCE) == GPIOH_S) || \
((INSTANCE) == GPIOI_NS) || ((INSTANCE) == GPIOI_S) || \
((INSTANCE) == GPIOJ_NS) || ((INSTANCE) == GPIOJ_S) || \
((INSTANCE) == LPGPIO1_NS) || ((INSTANCE) == LPGPIO1_S))

◆ IS_I2C_ALL_INSTANCE

#define IS_I2C_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == I2C1_NS) || ((INSTANCE) == I2C1_S) || \
((INSTANCE) == I2C2_NS) || ((INSTANCE) == I2C2_S) || \
((INSTANCE) == I2C3_NS) || ((INSTANCE) == I2C3_S) || \
((INSTANCE) == I2C4_NS) || ((INSTANCE) == I2C4_S) || \
((INSTANCE) == I2C5_NS) || ((INSTANCE) == I2C5_S) || \
((INSTANCE) == I2C6_NS) || ((INSTANCE) == I2C6_S))

◆ IS_I2C_GRP1_INSTANCE

#define IS_I2C_GRP1_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == I2C1_NS) || ((INSTANCE) == I2C1_S) || \
((INSTANCE) == I2C2_NS) || ((INSTANCE) == I2C2_S) || \
((INSTANCE) == I2C4_NS) || ((INSTANCE) == I2C4_S) || \
((INSTANCE) == I2C5_NS) || ((INSTANCE) == I2C5_S) || \
((INSTANCE) == I2C6_NS) || ((INSTANCE) == I2C6_S))

◆ IS_IRDA_INSTANCE

#define IS_IRDA_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S) || \
((INSTANCE) == UART4_NS) || ((INSTANCE) == UART4_S) || \
((INSTANCE) == UART5_NS) || ((INSTANCE) == UART5_S)) || \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S)

◆ IS_LPDMA_INSTANCE

#define IS_LPDMA_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == LPDMA1_Channel0_NS) || ((INSTANCE) == LPDMA1_Channel0_S) || \
((INSTANCE) == LPDMA1_Channel1_NS) || ((INSTANCE) == LPDMA1_Channel1_S) || \
((INSTANCE) == LPDMA1_Channel2_NS) || ((INSTANCE) == LPDMA1_Channel2_S) || \
((INSTANCE) == LPDMA1_Channel3_NS) || ((INSTANCE) == LPDMA1_Channel3_S))

◆ IS_LPTIM_CC1_INSTANCE

#define IS_LPTIM_CC1_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == LPTIM1_NS) || ((INSTANCE) == LPTIM1_S) ||\
((INSTANCE) == LPTIM2_NS) || ((INSTANCE) == LPTIM2_S) ||\
((INSTANCE) == LPTIM3_NS) || ((INSTANCE) == LPTIM3_S) ||\
((INSTANCE) == LPTIM4_NS) || ((INSTANCE) == LPTIM4_S))

◆ IS_LPTIM_CC2_INSTANCE

#define IS_LPTIM_CC2_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == LPTIM1_NS) || ((INSTANCE) == LPTIM1_S) ||\
((INSTANCE) == LPTIM2_NS) || ((INSTANCE) == LPTIM2_S) ||\
((INSTANCE) == LPTIM3_NS) || ((INSTANCE) == LPTIM3_S))

◆ IS_LPTIM_DMA_INSTANCE

#define IS_LPTIM_DMA_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == LPTIM1_NS) || ((INSTANCE) == LPTIM1_S) ||\
((INSTANCE) == LPTIM2_NS) || ((INSTANCE) == LPTIM2_S) ||\
((INSTANCE) == LPTIM3_NS) || ((INSTANCE) == LPTIM3_S))

◆ IS_LPTIM_ENCODER_INTERFACE_INSTANCE

#define IS_LPTIM_ENCODER_INTERFACE_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == LPTIM1_NS) || ((INSTANCE) == LPTIM1_S) ||\
((INSTANCE) == LPTIM2_NS) || ((INSTANCE) == LPTIM2_S))

◆ IS_LPTIM_INPUT_CAPTURE_INSTANCE

#define IS_LPTIM_INPUT_CAPTURE_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == LPTIM1_NS) || ((INSTANCE) == LPTIM1_S) ||\
((INSTANCE) == LPTIM2_NS) || ((INSTANCE) == LPTIM2_S) ||\
((INSTANCE) == LPTIM3_NS) || ((INSTANCE) == LPTIM3_S))

◆ IS_LPTIM_INSTANCE

#define IS_LPTIM_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == LPTIM1_NS) || ((INSTANCE) == LPTIM1_S) ||\
((INSTANCE) == LPTIM2_NS) || ((INSTANCE) == LPTIM2_S) ||\
((INSTANCE) == LPTIM3_NS) || ((INSTANCE) == LPTIM3_S) ||\
((INSTANCE) == LPTIM4_NS) || ((INSTANCE) == LPTIM4_S))

◆ IS_MDF_ALL_INSTANCE

#define IS_MDF_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == MDF1_Filter0_NS) || ((INSTANCE) == MDF1_Filter0_S) || \
((INSTANCE) == MDF1_Filter1_NS) || ((INSTANCE) == MDF1_Filter1_S) || \
((INSTANCE) == MDF1_Filter2_NS) || ((INSTANCE) == MDF1_Filter2_S) || \
((INSTANCE) == MDF1_Filter3_NS) || ((INSTANCE) == MDF1_Filter3_S) || \
((INSTANCE) == MDF1_Filter4_NS) || ((INSTANCE) == MDF1_Filter4_S) || \
((INSTANCE) == MDF1_Filter5_NS) || ((INSTANCE) == MDF1_Filter5_S) || \
((INSTANCE) == ADF1_Filter0_NS) || ((INSTANCE) == ADF1_Filter0_S))

◆ IS_OPAMP_ALL_INSTANCE

#define IS_OPAMP_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == OPAMP1_NS) || ((INSTANCE) == OPAMP1_S) || \
((INSTANCE) == OPAMP2_NS) || ((INSTANCE) == OPAMP2_S))

◆ IS_OSPI_ALL_INSTANCE

#define IS_OSPI_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == OCTOSPI1_NS) || ((INSTANCE) == OCTOSPI1_S) || \
((INSTANCE) == OCTOSPI2_NS) || ((INSTANCE) == OCTOSPI2_S))

◆ IS_OTFDEC_ALL_INSTANCE

#define IS_OTFDEC_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == OTFDEC1_NS) || ((INSTANCE) == OTFDEC1_S) || \
((INSTANCE) == OTFDEC2_NS) || ((INSTANCE) == OTFDEC2_S))

◆ IS_RAMCFG_ALL_INSTANCE

#define IS_RAMCFG_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == RAMCFG_SRAM1_NS) || ((INSTANCE) == RAMCFG_SRAM1_S) || \
((INSTANCE) == RAMCFG_SRAM2_NS) || ((INSTANCE) == RAMCFG_SRAM2_S) || \
((INSTANCE) == RAMCFG_SRAM3_NS) || ((INSTANCE) == RAMCFG_SRAM3_S) || \
((INSTANCE) == RAMCFG_SRAM4_NS) || ((INSTANCE) == RAMCFG_SRAM4_S) || \
((INSTANCE) == RAMCFG_SRAM5_NS) || ((INSTANCE) == RAMCFG_SRAM5_S) || \
((INSTANCE) == RAMCFG_BKPRAM_NS) || ((INSTANCE) == RAMCFG_BKPRAM_S) || \
((INSTANCE) == RAMCFG_SRAM6_NS) || ((INSTANCE) == RAMCFG_SRAM6_S))

◆ IS_RAMCFG_ECC_INSTANCE

#define IS_RAMCFG_ECC_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == RAMCFG_SRAM2_NS) || ((INSTANCE) == RAMCFG_SRAM2_S) || \
((INSTANCE) == RAMCFG_SRAM3_NS) || ((INSTANCE) == RAMCFG_SRAM3_S) || \
((INSTANCE) == RAMCFG_BKPRAM_NS) || ((INSTANCE) == RAMCFG_BKPRAM_S))

◆ IS_RAMCFG_IT_INSTANCE

#define IS_RAMCFG_IT_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == RAMCFG_SRAM2_NS) || ((INSTANCE) == RAMCFG_SRAM2_S) || \
((INSTANCE) == RAMCFG_SRAM3_NS) || ((INSTANCE) == RAMCFG_SRAM3_S) || \
((INSTANCE) == RAMCFG_BKPRAM_NS) || ((INSTANCE) == RAMCFG_BKPRAM_S))

◆ IS_SAI_ALL_INSTANCE

#define IS_SAI_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == SAI1_Block_A_NS) || ((INSTANCE) == SAI1_Block_A_S) || \
((INSTANCE) == SAI1_Block_B_NS) || ((INSTANCE) == SAI1_Block_B_S) || \
((INSTANCE) == SAI2_Block_A_NS) || ((INSTANCE) == SAI2_Block_A_S) || \
((INSTANCE) == SAI2_Block_B_NS) || ((INSTANCE) == SAI2_Block_B_S))

◆ IS_SDMMC_ALL_INSTANCE

#define IS_SDMMC_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == SDMMC1_NS) || ((INSTANCE) == SDMMC1_S) || \
((INSTANCE) == SDMMC2_NS) || ((INSTANCE) == SDMMC2_S))

◆ IS_SMARTCARD_INSTANCE

#define IS_SMARTCARD_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S))|| \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S)

◆ IS_SMBUS_ALL_INSTANCE

#define IS_SMBUS_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == I2C1_NS) || ((INSTANCE) == I2C1_S) || \
((INSTANCE) == I2C2_NS) || ((INSTANCE) == I2C2_S) || \
((INSTANCE) == I2C3_NS) || ((INSTANCE) == I2C3_S) || \
((INSTANCE) == I2C4_NS) || ((INSTANCE) == I2C4_S) || \
((INSTANCE) == I2C5_NS) || ((INSTANCE) == I2C5_S) || \
((INSTANCE) == I2C6_NS) || ((INSTANCE) == I2C6_S))

◆ IS_SMBUS_GRP1_INSTANCE

#define IS_SMBUS_GRP1_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == I2C1_NS) || ((INSTANCE) == I2C1_S) || \
((INSTANCE) == I2C2_NS) || ((INSTANCE) == I2C2_S) || \
((INSTANCE) == I2C4_NS) || ((INSTANCE) == I2C4_S) || \
((INSTANCE) == I2C5_NS) || ((INSTANCE) == I2C5_S) || \
((INSTANCE) == I2C6_NS) || ((INSTANCE) == I2C6_S))

◆ IS_SPI_ALL_INSTANCE

#define IS_SPI_ALL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == SPI1_NS) || ((INSTANCE) == SPI1_S) || \
((INSTANCE) == SPI2_NS) || ((INSTANCE) == SPI2_S) || \
((INSTANCE) == SPI3_NS) || ((INSTANCE) == SPI3_S))

◆ IS_SPI_FULL_INSTANCE

#define IS_SPI_FULL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == SPI1_NS) || ((INSTANCE) == SPI1_S) || \
((INSTANCE) == SPI2_NS) || ((INSTANCE) == SPI2_S))

◆ IS_SPI_GRP1_INSTANCE

#define IS_SPI_GRP1_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == SPI1_NS) || ((INSTANCE) == SPI1_S) || \
((INSTANCE) == SPI2_NS) || ((INSTANCE) == SPI2_S))

◆ IS_TIM_32B_COUNTER_INSTANCE

#define IS_TIM_32B_COUNTER_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S))
TIM2_NS
#define TIM2_NS
Definition: stm32u5g9xx.h:2576

◆ IS_TIM_ADVANCED_INSTANCE

#define IS_TIM_ADVANCED_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_BKIN2_INSTANCE

#define IS_TIM_BKIN2_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_BREAK_INSTANCE

#define IS_TIM_BREAK_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S) || \
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) || \
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_BREAKSOURCE_INSTANCE

#define IS_TIM_BREAKSOURCE_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S) || \
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) || \
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_CC1_INSTANCE

#define IS_TIM_CC1_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S) || \
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) || \
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_CC2_INSTANCE

#define IS_TIM_CC2_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S))

◆ IS_TIM_CC3_INSTANCE

#define IS_TIM_CC3_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_CC4_INSTANCE

#define IS_TIM_CC4_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_CC5_INSTANCE

#define IS_TIM_CC5_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_CC6_INSTANCE

#define IS_TIM_CC6_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_CCXN_INSTANCE

#define IS_TIM_CCXN_INSTANCE (   INSTANCE,
  CHANNEL 
)
Value:
(((((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S)) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \
((CHANNEL) == TIM_CHANNEL_4))) \
|| \
((((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S)) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \
((CHANNEL) == TIM_CHANNEL_4))) \
|| \
((((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S)) && \
((CHANNEL) == TIM_CHANNEL_1)) \
|| \
((((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S)) && \
((CHANNEL) == TIM_CHANNEL_1)) \
|| \
((((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S)) && \
((CHANNEL) == TIM_CHANNEL_1)))

◆ IS_TIM_CLOCK_DIVISION_INSTANCE

#define IS_TIM_CLOCK_DIVISION_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S) || \
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) || \
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE

#define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE

#define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_CLOCKSOURCE_ITRX_INSTANCE

#define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S))

◆ IS_TIM_CLOCKSOURCE_TIX_INSTANCE

#define IS_TIM_CLOCKSOURCE_TIX_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S))

◆ IS_TIM_COMBINED3PHASEPWM_INSTANCE

#define IS_TIM_COMBINED3PHASEPWM_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_COMMUTATION_EVENT_INSTANCE

#define IS_TIM_COMMUTATION_EVENT_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S) || \
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) || \
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_COUNTER_MODE_SELECT_INSTANCE

#define IS_TIM_COUNTER_MODE_SELECT_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_DMA_CC_INSTANCE

#define IS_TIM_DMA_CC_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S) || \
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) || \
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_DMA_INSTANCE

#define IS_TIM_DMA_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM6_NS) || ((INSTANCE) == TIM6_S) || \
((INSTANCE) == TIM7_NS) || ((INSTANCE) == TIM7_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S) || \
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) || \
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_DMABURST_INSTANCE

#define IS_TIM_DMABURST_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S) || \
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) || \
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_ENCODER_INTERFACE_INSTANCE

#define IS_TIM_ENCODER_INTERFACE_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_ETR_INSTANCE

#define IS_TIM_ETR_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE

#define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_HSE32_INSTANCE

#define IS_TIM_HSE32_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) ||\
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_INSTANCE

#define IS_TIM_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM6_NS) || ((INSTANCE) == TIM6_S) || \
((INSTANCE) == TIM7_NS) || ((INSTANCE) == TIM7_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S) || \
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) || \
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_MASTER_INSTANCE

#define IS_TIM_MASTER_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM6_NS) || ((INSTANCE) == TIM6_S) || \
((INSTANCE) == TIM7_NS) || ((INSTANCE) == TIM7_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S))

◆ IS_TIM_OCXREF_CLEAR_INSTANCE

#define IS_TIM_OCXREF_CLEAR_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S) || \
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) || \
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_REMAP_INSTANCE

#define IS_TIM_REMAP_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_REPETITION_COUNTER_INSTANCE

#define IS_TIM_REPETITION_COUNTER_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S) || \
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S) || \
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_SLAVE_INSTANCE

#define IS_TIM_SLAVE_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S))

◆ IS_TIM_SYNCHRO_INSTANCE

#define IS_TIM_SYNCHRO_INSTANCE (   __INSTANCE__)
Value:
(((__INSTANCE__) == TIM1_NS) || ((__INSTANCE__) == TIM1_S) || \
((__INSTANCE__) == TIM2_NS) || ((__INSTANCE__) == TIM2_S) || \
((__INSTANCE__) == TIM3_NS) || ((__INSTANCE__) == TIM3_S) || \
((__INSTANCE__) == TIM4_NS) || ((__INSTANCE__) == TIM4_S) || \
((__INSTANCE__) == TIM5_NS) || ((__INSTANCE__) == TIM5_S) || \
((__INSTANCE__) == TIM6_NS) || ((__INSTANCE__) == TIM6_S) || \
((__INSTANCE__) == TIM7_NS) || ((__INSTANCE__) == TIM7_S) || \
((__INSTANCE__) == TIM8_NS) || ((__INSTANCE__) == TIM8_S) || \
((__INSTANCE__) == TIM15_NS) || ((__INSTANCE__) == TIM15_S))

◆ IS_TIM_TISEL_INSTANCE

#define IS_TIM_TISEL_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) ||\
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) ||\
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) ||\
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) ||\
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) ||\
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) ||\
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S)||\
((INSTANCE) == TIM16_NS) || ((INSTANCE) == TIM16_S)||\
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))

◆ IS_TIM_TRGO2_INSTANCE

#define IS_TIM_TRGO2_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S))

◆ IS_TIM_XOR_INSTANCE

#define IS_TIM_XOR_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S) || \
((INSTANCE) == TIM4_NS) || ((INSTANCE) == TIM4_S) || \
((INSTANCE) == TIM5_NS) || ((INSTANCE) == TIM5_S) || \
((INSTANCE) == TIM8_NS) || ((INSTANCE) == TIM8_S) || \
((INSTANCE) == TIM15_NS) || ((INSTANCE) == TIM15_S))

◆ IS_UART_AUTONOMOUS_INSTANCE

#define IS_UART_AUTONOMOUS_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S) || \
((INSTANCE) == UART4_NS) || ((INSTANCE) == UART4_S) || \
((INSTANCE) == UART5_NS) || ((INSTANCE) == UART5_S) || \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S) || \
((INSTANCE) == LPUART1_NS) || ((INSTANCE) == LPUART1_S))

◆ IS_UART_DRIVER_ENABLE_INSTANCE

#define IS_UART_DRIVER_ENABLE_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S) || \
((INSTANCE) == UART4_NS) || ((INSTANCE) == UART4_S) || \
((INSTANCE) == UART5_NS) || ((INSTANCE) == UART5_S) || \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S) || \
((INSTANCE) == LPUART1_NS) || ((INSTANCE) == LPUART1_S))

◆ IS_UART_FIFO_INSTANCE

#define IS_UART_FIFO_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S) || \
((INSTANCE) == UART4_NS) || ((INSTANCE) == UART4_S) || \
((INSTANCE) == UART5_NS) || ((INSTANCE) == UART5_S) || \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S) || \
((INSTANCE) == LPUART1_NS) || ((INSTANCE) == LPUART1_S))

◆ IS_UART_HALFDUPLEX_INSTANCE

#define IS_UART_HALFDUPLEX_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S) || \
((INSTANCE) == UART4_NS) || ((INSTANCE) == UART4_S) || \
((INSTANCE) == UART5_NS) || ((INSTANCE) == UART5_S) || \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S) || \
((INSTANCE) == LPUART1_NS) || ((INSTANCE) == LPUART1_S))

◆ IS_UART_HWFLOW_INSTANCE

#define IS_UART_HWFLOW_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S) || \
((INSTANCE) == UART4_NS) || ((INSTANCE) == UART4_S) || \
((INSTANCE) == UART5_NS) || ((INSTANCE) == UART5_S) || \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S) || \
((INSTANCE) == LPUART1_NS) || ((INSTANCE) == LPUART1_S))

◆ IS_UART_INSTANCE

#define IS_UART_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S) || \
((INSTANCE) == UART4_NS) || ((INSTANCE) == UART4_S) || \
((INSTANCE) == UART5_NS) || ((INSTANCE) == UART5_S) || \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S))

◆ IS_UART_LIN_INSTANCE

#define IS_UART_LIN_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S) || \
((INSTANCE) == UART4_NS) || ((INSTANCE) == UART4_S) || \
((INSTANCE) == UART5_NS) || ((INSTANCE) == UART5_S)) || \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S)

◆ IS_UART_SPI_SLAVE_INSTANCE

#define IS_UART_SPI_SLAVE_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S))|| \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S)

◆ IS_UART_WAKEUP_FROMSTOP_INSTANCE

#define IS_UART_WAKEUP_FROMSTOP_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S) || \
((INSTANCE) == UART4_NS) || ((INSTANCE) == UART4_S) || \
((INSTANCE) == UART5_NS) || ((INSTANCE) == UART5_S) || \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S) || \
((INSTANCE) == LPUART1_NS) || ((INSTANCE) == LPUART1_S))

◆ IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE

#define IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S) || \
((INSTANCE) == UART4_NS) || ((INSTANCE) == UART4_S) || \
((INSTANCE) == UART5_NS) || ((INSTANCE) == UART5_S)) || \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S)

◆ IS_USART_INSTANCE

#define IS_USART_INSTANCE (   INSTANCE)
Value:
(((INSTANCE) == USART1_NS) || ((INSTANCE) == USART1_S) || \
((INSTANCE) == USART2_NS) || ((INSTANCE) == USART2_S) || \
((INSTANCE) == USART3_NS) || ((INSTANCE) == USART3_S) || \
((INSTANCE) == USART6_NS) || ((INSTANCE) == USART6_S))
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