34#ifndef VIRTEX5_IRQ_IRQ_H
35#define VIRTEX5_IRQ_IRQ_H
53#define BSP_PROCESSOR_IRQ_NUMBER 3
54#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET 0
55#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\
56 +BSP_PROCESSOR_IRQ_NUMBER-1)
63#define BSP_IS_PROCESSOR_IRQ(irqnum) \
64 ((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET)
69#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1)
70#define BSP_LOWEST_OFFSET BSP_PROCESSOR_IRQ_LOWEST_OFFSET
71#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET
73#define BSP_IS_VALID_IRQ(irqnum) (BSP_IS_PROCESSOR_IRQ(irqnum))
84 BSP_EXT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 0,
85 BSP_PIT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 1,
86 BSP_CRIT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 2
87 } rtems_irq_symbolic_name;
92 void BSP_rtems_irq_mngt_init(
unsigned cpuId);
94#define BSP_DEC BSP_PIT
95#define BSP_DECREMENTER BSP_PIT
Interrupt Handler Support.