RTEMS 7.0-rc1
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irq.h
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 * RTEMS TQM8xx BSP
5 *
6 * This file contains the console driver.
7 *
8 * Derived from: generic MPC83xx BSP
9 */
10
11/*
12 * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH & Co. KG
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#ifndef TQM8xx_IRQ_IRQ_H
38#define TQM8xx_IRQ_IRQ_H
39
40#include <stdbool.h>
41
42#include <rtems.h>
43#include <rtems/irq.h>
44#include <rtems/irq-extension.h>
45
46/*
47 * the following definitions specify the indices used
48 * to interface the interrupt handler API
49 */
50
51/*
52 * Peripheral IRQ handlers related definitions
53 */
54#define BSP_SIU_PER_IRQ_NUMBER 16U
55#define BSP_SIU_IRQ_LOWEST_OFFSET 0U
56#define BSP_SIU_IRQ_MAX_OFFSET (BSP_SIU_IRQ_LOWEST_OFFSET\
57 +BSP_SIU_PER_IRQ_NUMBER-1U)
58
59#define BSP_IS_SIU_IRQ(irqnum) \
60 (((unsigned)(irqnum) - BSP_SIU_IRQ_LOWEST_OFFSET) < BSP_SIU_PER_IRQ_NUMBER)
61
62#define BSP_CPM_PER_IRQ_NUMBER 32U
63#define BSP_CPM_IRQ_LOWEST_OFFSET (BSP_SIU_IRQ_MAX_OFFSET+1U)
64#define BSP_CPM_IRQ_MAX_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET\
65 +BSP_CPM_PER_IRQ_NUMBER-1U)
66
67#define BSP_IS_CPM_IRQ(irqnum) \
68 (((unsigned)(irqnum) - BSP_CPM_IRQ_LOWEST_OFFSET) < BSP_CPM_PER_IRQ_NUMBER)
69
70/*
71 * Processor IRQ handlers related definitions
72 */
73#define BSP_PROCESSOR_IRQ_NUMBER 1U
74#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET+1U)
75#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\
76 +BSP_PROCESSOR_IRQ_NUMBER-1U)
77
78#define BSP_IS_PROCESSOR_IRQ(irqnum) \
79 (((irqnum) >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET) && \
80 ((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET))
81/*
82 * Summary
83 */
84#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1U)
85#define BSP_LOWEST_OFFSET BSP_SIU_IRQ_LOWEST_OFFSET
86#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET
87
88#define BSP_IS_VALID_IRQ(irqnum) \
89 (BSP_IS_PROCESSOR_IRQ(irqnum) \
90 || BSP_IS_SIU_IRQ(irqnum) \
91 || BSP_IS_CPM_IRQ(irqnum))
92
93#ifndef ASM
94#ifdef __cplusplus
95extern "C" {
96#endif
97
98/*
99 * index table for the module specific handlers, a few entries are only placeholders
100 */
101 typedef enum {
102 BSP_SIU_EXT_IRQ_0 = BSP_SIU_IRQ_LOWEST_OFFSET + 0,
103 BSP_SIU_INT_IRQ_0 = BSP_SIU_IRQ_LOWEST_OFFSET + 1,
104 BSP_SIU_EXT_IRQ_1 = BSP_SIU_IRQ_LOWEST_OFFSET + 2,
105 BSP_SIU_INT_IRQ_1 = BSP_SIU_IRQ_LOWEST_OFFSET + 3,
106 BSP_SIU_EXT_IRQ_2 = BSP_SIU_IRQ_LOWEST_OFFSET + 4,
107 BSP_SIU_INT_IRQ_2 = BSP_SIU_IRQ_LOWEST_OFFSET + 5,
108 BSP_SIU_EXT_IRQ_3 = BSP_SIU_IRQ_LOWEST_OFFSET + 6,
109 BSP_SIU_INT_IRQ_3 = BSP_SIU_IRQ_LOWEST_OFFSET + 7,
110 BSP_SIU_EXT_IRQ_4 = BSP_SIU_IRQ_LOWEST_OFFSET + 8,
111 BSP_SIU_INT_IRQ_4 = BSP_SIU_IRQ_LOWEST_OFFSET + 9,
112 BSP_SIU_EXT_IRQ_5 = BSP_SIU_IRQ_LOWEST_OFFSET + 10,
113 BSP_SIU_INT_IRQ_5 = BSP_SIU_IRQ_LOWEST_OFFSET + 11,
114 BSP_SIU_EXT_IRQ_6 = BSP_SIU_IRQ_LOWEST_OFFSET + 12,
115 BSP_SIU_INT_IRQ_6 = BSP_SIU_IRQ_LOWEST_OFFSET + 13,
116 BSP_SIU_EXT_IRQ_7 = BSP_SIU_IRQ_LOWEST_OFFSET + 14,
117 BSP_SIU_INT_IRQ_7 = BSP_SIU_IRQ_LOWEST_OFFSET + 15,
118 BSP_SIU_IRQ_LAST = BSP_SIU_IRQ_MAX_OFFSET,
119 /*
120 * Some CPM IRQ symbolic name definition
121 */
122 BSP_CPM_IRQ_ERROR = (BSP_CPM_IRQ_LOWEST_OFFSET),
123 BSP_CPM_IRQ_PARALLEL_IO_PC4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 1),
124 BSP_CPM_IRQ_PARALLEL_IO_PC5 = (BSP_CPM_IRQ_LOWEST_OFFSET + 2),
125 BSP_CPM_IRQ_SMC2_OR_PIP = (BSP_CPM_IRQ_LOWEST_OFFSET + 3),
126 BSP_CPM_IRQ_SMC1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 4),
127 BSP_CPM_IRQ_SPI = (BSP_CPM_IRQ_LOWEST_OFFSET + 5),
128 BSP_CPM_IRQ_PARALLEL_IO_PC6 = (BSP_CPM_IRQ_LOWEST_OFFSET + 6),
129 BSP_CPM_IRQ_TIMER_4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 7),
130 BSP_CPM_IRQ_PARALLEL_IO_PC7 = (BSP_CPM_IRQ_LOWEST_OFFSET + 9),
131 BSP_CPM_IRQ_PARALLEL_IO_PC8 = (BSP_CPM_IRQ_LOWEST_OFFSET + 10),
132 BSP_CPM_IRQ_PARALLEL_IO_PC9 = (BSP_CPM_IRQ_LOWEST_OFFSET + 11),
133 BSP_CPM_IRQ_TIMER_3 = (BSP_CPM_IRQ_LOWEST_OFFSET + 12),
134 BSP_CPM_IRQ_PARALLEL_IO_PC10= (BSP_CPM_IRQ_LOWEST_OFFSET + 14),
135 BSP_CPM_IRQ_PARALLEL_IO_PC11= (BSP_CPM_IRQ_LOWEST_OFFSET + 15),
136 BSP_CPM_I2C = (BSP_CPM_IRQ_LOWEST_OFFSET + 16),
137 BSP_CPM_RISC_TIMER_TABLE = (BSP_CPM_IRQ_LOWEST_OFFSET + 17),
138 BSP_CPM_IRQ_TIMER_2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 18),
139 BSP_CPM_IDMA2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 20),
140 BSP_CPM_IDMA1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 21),
141 BSP_CPM_SDMA_CHANNEL_BUS_ERR= (BSP_CPM_IRQ_LOWEST_OFFSET + 22),
142 BSP_CPM_IRQ_PARALLEL_IO_PC12= (BSP_CPM_IRQ_LOWEST_OFFSET + 23),
143 BSP_CPM_IRQ_PARALLEL_IO_PC13= (BSP_CPM_IRQ_LOWEST_OFFSET + 24),
144 BSP_CPM_IRQ_TIMER_1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 25),
145 BSP_CPM_IRQ_PARALLEL_IO_PC14= (BSP_CPM_IRQ_LOWEST_OFFSET + 26),
146 BSP_CPM_IRQ_SCC4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 27),
147 BSP_CPM_IRQ_SCC3 = (BSP_CPM_IRQ_LOWEST_OFFSET + 28),
148 BSP_CPM_IRQ_SCC2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 29),
149 BSP_CPM_IRQ_SCC1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 30),
150 BSP_CPM_IRQ_PARALLEL_IO_PC15= (BSP_CPM_IRQ_LOWEST_OFFSET + 31),
151 BSP_CPM_IRQ_LAST = BSP_CPM_IRQ_MAX_OFFSET,
152 } rtems_irq_symbolic_name;
153
154 /*
155 * Symbolic name for CPM interrupt on SIU Internal level 2
156 */
157#define BSP_CPM_INTERRUPT BSP_SIU_INT_IRQ_2
158#define BSP_PERIODIC_TIMER BSP_SIU_INT_IRQ_6
159#define BSP_FAST_ETHERNET_CTRL BSP_SIU_INT_IRQ_3
160
161#define BSP_INTERRUPT_VECTOR_COUNT (BSP_MAX_OFFSET + 1U)
162
163extern int BSP_irq_enabled_at_cpm(const rtems_irq_number irqLine);
164
165#ifdef __cplusplus
166}
167#endif
168#endif /* ASM */
169
170#endif /* TQM8XX_IRQ_IRQ_H */
irq.h
Interrupt Handler Support.
irq-extension.h
This header file is provided for backward compatiblility.
rtems.h
This header file defines the RTEMS Classic API.
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