RTEMS 7.0-rc1
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irq.h
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/* irq.h
4 *
5 * This include file describe the data structure and the functions implemented
6 * by rtems to write interrupt handlers.
7 */
8
9/*
10 * Copyright (C) 2001 Andy Dachs <a.dachs@sstl.co.uk>
11 * Copyright (C) 1999 Eric Valette <eric.valette@free.fr>
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/*
36 * This code is heavily inspired by the public specification of STREAM V2
37 * that can be found at:
38 *
39 * <http://www.chorus.com/Documentation/index.html> by following
40 * the STREAM API Specification Document link.
41 *
42 * Modified for mpc8260 by Andy Dachs <a.dachs@sstl.co.uk>
43 * Surrey Satellite Technology Limited
44 * The interrupt handling on the mpc8260 seems quite different from
45 * the 860 (I don't know the 860 well). Although some interrupts
46 * are routed via the CPM irq and some are direct to the SIU they all
47 * appear logically the same. Therefore I removed the distinction
48 * between SIU and CPM interrupts.
49 */
50
51#ifndef LIBBSP_POWERPC_IRQ_H
52#define LIBBSP_POWERPC_IRQ_H
53#include <rtems/irq.h>
54
55#ifndef ASM
56
57#ifdef __cplusplus
58extern "C" {
59#endif
60
61/*
62extern volatile unsigned int ppc_cached_irq_mask;
63*/
64
65/*
66 * Symblolic IRQ names and related definitions.
67 */
68
69 /*
70 * CPM IRQ handlers related definitions
71 * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
72 */
73#define BSP_CPM_IRQ_NUMBER (64)
74#define BSP_CPM_IRQ_LOWEST_OFFSET (0)
75#define BSP_CPM_IRQ_MAX_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1)
76 /*
77 * PowerPc exceptions handled as interrupt where a rtems managed interrupt
78 * handler might be connected
79 */
80#define BSP_PROCESSOR_IRQ_NUMBER (1)
81#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET + 1)
82#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
83 /*
84 * Summary
85 */
86#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
87#define BSP_LOWEST_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET)
88#define BSP_MAX_OFFSET (BSP_PROCESSOR_IRQ_MAX_OFFSET)
89
90 /*
91 * Some SIU IRQ symbolic name definition. Please note that
92 * INT IRQ are defined but a single one will be used to
93 * redirect all CPM interrupt.
94 *
95 * On the mpc8260 all this seems to be transparent. Although the
96 * CPM, PIT and TMCNT interrupt may well be the only interrupts routed
97 * to the SIU at the hardware level all of them appear as CPM interupts
98 * to software apart from the registers for setting priority.
99 *
100 * The MPC8260 User Manual seems shot through with inconsistencies
101 * about this whole area.
102 */
103
104 /*
105 * Some CPM IRQ symbolic name definition
106 */
107#define BSP_CPM_IRQ_ERROR (BSP_CPM_IRQ_LOWEST_OFFSET + 0)
108#define BSP_CPM_IRQ_I2C (BSP_CPM_IRQ_LOWEST_OFFSET + 1)
109#define BSP_CPM_IRQ_SPI (BSP_CPM_IRQ_LOWEST_OFFSET + 2)
110#define BSP_CPM_IRQ_RISC_TIMERS (BSP_CPM_IRQ_LOWEST_OFFSET + 3)
111#define BSP_CPM_IRQ_SMC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 4)
112#define BSP_CPM_IRQ_SMC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 5)
113#define BSP_CPM_IRQ_IDMA1 (BSP_CPM_IRQ_LOWEST_OFFSET + 6)
114#define BSP_CPM_IRQ_IDMA2 (BSP_CPM_IRQ_LOWEST_OFFSET + 7)
115#define BSP_CPM_IRQ_IDMA3 (BSP_CPM_IRQ_LOWEST_OFFSET + 8)
116#define BSP_CPM_IRQ_IDMA4 (BSP_CPM_IRQ_LOWEST_OFFSET + 9)
117#define BSP_CPM_IRQ_SDMA (BSP_CPM_IRQ_LOWEST_OFFSET + 10)
118
119#define BSP_CPM_IRQ_TIMER_1 (BSP_CPM_IRQ_LOWEST_OFFSET + 12)
120#define BSP_CPM_IRQ_TIMER_2 (BSP_CPM_IRQ_LOWEST_OFFSET + 13)
121#define BSP_CPM_IRQ_TIMER_3 (BSP_CPM_IRQ_LOWEST_OFFSET + 14)
122#define BSP_CPM_IRQ_TIMER_4 (BSP_CPM_IRQ_LOWEST_OFFSET + 15)
123#define BSP_CPM_IRQ_TMCNT (BSP_CPM_IRQ_LOWEST_OFFSET + 16)
124#define BSP_CPM_IRQ_PIT (BSP_CPM_IRQ_LOWEST_OFFSET + 17)
125
126#define BSP_CPM_IRQ_IRQ1 (BSP_CPM_IRQ_LOWEST_OFFSET + 19)
127#define BSP_CPM_IRQ_IRQ2 (BSP_CPM_IRQ_LOWEST_OFFSET + 20)
128#define BSP_CPM_IRQ_IRQ3 (BSP_CPM_IRQ_LOWEST_OFFSET + 21)
129#define BSP_CPM_IRQ_IRQ4 (BSP_CPM_IRQ_LOWEST_OFFSET + 22)
130#define BSP_CPM_IRQ_IRQ5 (BSP_CPM_IRQ_LOWEST_OFFSET + 23)
131#define BSP_CPM_IRQ_IRQ6 (BSP_CPM_IRQ_LOWEST_OFFSET + 24)
132#define BSP_CPM_IRQ_IRQ7 (BSP_CPM_IRQ_LOWEST_OFFSET + 25)
133
134#define BSP_CPM_IRQ_FCC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 32)
135#define BSP_CPM_IRQ_FCC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 33)
136#define BSP_CPM_IRQ_FCC3 (BSP_CPM_IRQ_LOWEST_OFFSET + 34)
137#define BSP_CPM_IRQ_MCC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 36)
138#define BSP_CPM_IRQ_MCC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 37)
139
140#define BSP_CPM_IRQ_SCC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 40)
141#define BSP_CPM_IRQ_SCC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 41)
142#define BSP_CPM_IRQ_SCC3 (BSP_CPM_IRQ_LOWEST_OFFSET + 42)
143#define BSP_CPM_IRQ_SCC4 (BSP_CPM_IRQ_LOWEST_OFFSET + 43)
144
145#define BSP_CPM_IRQ_PC15 (BSP_CPM_IRQ_LOWEST_OFFSET + 48)
146#define BSP_CPM_IRQ_PC14 (BSP_CPM_IRQ_LOWEST_OFFSET + 49)
147#define BSP_CPM_IRQ_PC13 (BSP_CPM_IRQ_LOWEST_OFFSET + 50)
148#define BSP_CPM_IRQ_PC12 (BSP_CPM_IRQ_LOWEST_OFFSET + 51)
149#define BSP_CPM_IRQ_PC11 (BSP_CPM_IRQ_LOWEST_OFFSET + 52)
150#define BSP_CPM_IRQ_PC10 (BSP_CPM_IRQ_LOWEST_OFFSET + 53)
151#define BSP_CPM_IRQ_PC9 (BSP_CPM_IRQ_LOWEST_OFFSET + 54)
152#define BSP_CPM_IRQ_PC8 (BSP_CPM_IRQ_LOWEST_OFFSET + 55)
153#define BSP_CPM_IRQ_PC7 (BSP_CPM_IRQ_LOWEST_OFFSET + 56)
154#define BSP_CPM_IRQ_PC6 (BSP_CPM_IRQ_LOWEST_OFFSET + 57)
155#define BSP_CPM_IRQ_PC5 (BSP_CPM_IRQ_LOWEST_OFFSET + 58)
156#define BSP_CPM_IRQ_PC4 (BSP_CPM_IRQ_LOWEST_OFFSET + 59)
157#define BSP_CPM_IRQ_PC3 (BSP_CPM_IRQ_LOWEST_OFFSET + 60)
158#define BSP_CPM_IRQ_PC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 61)
159#define BSP_CPM_IRQ_PC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 62)
160#define BSP_CPM_IRQ_PC0 (BSP_CPM_IRQ_LOWEST_OFFSET + 63)
161
162 /*
163 * Some Processor exception handled as rtems IRQ symbolic name definition
164 */
165#define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
166#define BSP_PERIODIC_TIMER (BSP_DECREMENTER)
167
168#define BSP_INTERRUPT_VECTOR_COUNT (BSP_MAX_OFFSET + 1)
169
170#define CPM_INTERRUPT
171
172/*-------------------------------------------------------------------------+
173| Function Prototypes.
174+--------------------------------------------------------------------------*/
175/*
176 * ------------------------ PPC CPM Mngt Routines -------
177 */
178
179/*
180 * function to disable a particular irq. After calling
181 * this function, even if the device asserts the interrupt line it will
182 * not be propagated further to the processor
183 */
184int BSP_irq_disable_at_cpm (const rtems_irq_number irqLine);
185/*
186 * function to enable a particular irq. After calling
187 * this function, if the device asserts the interrupt line it will
188 * be propagated further to the processor
189 */
190int BSP_irq_enable_at_cpm (const rtems_irq_number irqLine);
191/*
192 * function to acknoledge a particular irq. After calling
193 * this function, if a device asserts an enabled interrupt line it will
194 * be propagated further to the processor. Mainly usefull for people
195 * writting raw handlers as this is automagically done for rtems managed
196 * handlers.
197 */
198int BSP_irq_ack_at_cpm (const rtems_irq_number irqLine);
199/*
200 * function to check if a particular irq is enabled. After calling
201 */
202int BSP_irq_enabled_at_cpm (const rtems_irq_number irqLine);
203
204extern void BSP_rtems_irq_mng_init(unsigned cpuId);
205
206#ifdef __cplusplus
207}
208#endif
209
210/* Now that we have defined some basics, include the generic support */
211#include <bsp/irq-generic.h>
212
213#endif
214
215#endif
irq.h
Interrupt Handler Support.
irq-generic.h
This header file provides interfaces of the Interrupt Manager implementation.
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