RTEMS 7.0-rc1
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bsp.h
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1/* SPDX-License-Identifier: GPL-2.0+-with-RTEMS-exception */
2
11/*
12 *
13 * The license and distribution terms for this file may be
14 * found in the file LICENSE in this distribution or at
15 * http://www.rtems.org/license/LICENSE.
16 */
17#ifndef LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H
18#define LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H
19
30#include <bspopts.h>
31#include <bsp/default-initial-extension.h>
32
33#include <rtems.h>
34#include <libcpu/io.h>
35#include <bsp/vectors.h>
36
37#ifdef qemu
38#include <rtems/bspcmdline.h>
39#endif
40
41#ifdef __cplusplus
42extern "C" {
43#endif
44
45/*
46 * diagram illustrating the role of the configuration
47 * constants
48 * PCI_MEM_WIN0: CPU starting addr where PCI memory space is visible
49 * PCI_MEM_BASE: CPU address of PCI mem addr. zero. (regardless of this
50 * address being 'visible' or not!).
51 * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME
52 * _VME_A32_WIN0_ON_VME: VME address of that same window
53 *
54 * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
55 * CPU and PCI addresses). The mvme2307/mvme2700 'ppcbug' firmware configures the
56 * PCI bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
57 * the base address read from PCI config.space in order to translate that
58 * into a CPU address.
59 *
60 * NOTE: VME addresses should NEVER be translated using these constants!
61 * they are strictly for BSP internal use. Drivers etc. should use
62 * the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs).
63 *
64 * CPU ADDR PCI_ADDR VME ADDR
65 *
66 * 00000000 XXXXXXXX XXXXXXXX
67 * ^ ^ ........
68 * | |
69 * | | e.g., RAM XXXXXXXX
70 * | | 00000000
71 * | | ......... ^
72 * | | (possible offset |
73 * | | between pci and XXXXXXXX | ......
74 * | | cpu addresses) |
75 * | v |
76 * | PCI_MEM_BASE -------------> 00000000 --------------- |
77 * | ........ ........ ^ |
78 * | invisible | |
79 * | ........ from CPU | |
80 * v | |
81 * PCI_MEM_WIN0 ============= first visible PCI addr | |
82 * | |
83 * pci devices pci window | |
84 * visible here v v
85 * mapped by ========== _VME_A32_WIN0_ON_PCI ======= _VME_A32_WIN0_ON_VME
86 * vme window
87 * VME devices hostbridge mapped by
88 * visible here universe
89 * =====================================================
90 *
91 */
92
93/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
94#if defined(mot_ppc_mvme2100)
95#define _IO_BASE CHRP_ISA_IO_BASE
96#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE
97/* address of our ram on the PCI bus */
98#define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET
99/* offset of pci memory as seen from the CPU */
100#define PCI_MEM_BASE 0
101/* where (in CPU addr. space) does the PCI window start */
102#define PCI_MEM_WIN0 0x80000000
103
104#else
105#define _IO_BASE PREP_ISA_IO_BASE
106#define _ISA_MEM_BASE PREP_ISA_MEM_BASE
107#ifndef qemu
108/* address of our ram on the PCI bus */
109#define PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET
110/* offset of pci memory as seen from the CPU */
111#define PCI_MEM_BASE PREP_ISA_MEM_BASE
112#define PCI_MEM_WIN0 0
113#else
114#define PCI_DRAM_OFFSET 0
115#define PCI_MEM_BASE 0
116#define PCI_MEM_WIN0 PREP_ISA_MEM_BASE
117#endif
118#endif
119
120/*
121 * The BSP has PCI devices. Enable support in LibBSD.
122 */
123#define BSP_HAS_PC_PCI
124
125/*
126 * Remap the PCI address space for LibBSD
127 */
128#define RTEMS_BSP_PCI_IO_REGION_BASE 0
129#define RTEMS_BSP_PCI_MEM_REGION_BASE PCI_DRAM_OFFSET
130
131/*
132 * Remap the PCI address space for LibBSD
133 */
134#define RTEMS_BSP_ADDR_PTR(_type) uint ## _type ## _t __volatile*
135#define RTEMS_BSP_ADDR_CPTR(_type) const RTEMS_BSP_ADDR_PTR(_type)
136#define RTEMS_BSP_ADDRESS_READ(_addr, _type) \
137 *((RTEMS_BSP_ADDR_CPTR(_type)) (((RTEMS_BSP_ADDR_CPTR(8)) _addr) + PCI_DRAM_OFFSET))
138#define RTEMS_BSP_ADDRESS_WRITE(_addr, _val, _type) \
139 *((RTEMS_BSP_ADDR_PTR(_type)) (((RTEMS_BSP_ADDR_PTR(8)) _addr) + PCI_DRAM_OFFSET)) = (_val)
140
141#define RTEMS_BSP_READ_1(_addr) RTEMS_BSP_ADDRESS_READ(_addr, 8)
142#define RTEMS_BSP_READ_2(_addr) RTEMS_BSP_ADDRESS_READ(_addr, 16)
143#define RTEMS_BSP_READ_4(_addr) RTEMS_BSP_ADDRESS_READ(_addr, 32)
144#define RTEMS_BSP_READ_8(_addr) RTEMS_BSP_ADDRESS_READ(_addr, 64)
145
146#define RTEMS_BSP_WRITE_1(_addr, _val) RTEMS_BSP_ADDRESS_WRITE(_addr, _val, 8)
147#define RTEMS_BSP_WRITE_2(_addr, _val) RTEMS_BSP_ADDRESS_WRITE(_addr, _val, 16)
148#define RTEMS_BSP_WRITE_4(_addr, _val) RTEMS_BSP_ADDRESS_WRITE(_addr, _val, 32)
149#define RTEMS_BSP_WRITE_8(_addr, _val) RTEMS_BSP_ADDRESS_WRITE(_addr, _val, 64)
150
151/*
152 * Base address definitions for several devices
153 *
154 * MVME2100 is very similar but has fewer devices and uses on-CPU EPIC
155 * implementation of OpenPIC controller. It also cannot be probed to
156 * find out what it is which is VERY different from other Motorola boards.
157 */
158
159#if defined(mot_ppc_mvme2100)
160#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000)
161/* #define BSP_UART_IOBASE_COM1 (0xffe10000) */
162#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
163
164#define MVME_HAS_DEC21140
165#else
166#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x3f8)
167#define BSP_UART_IOBASE_COM2 ((_IO_BASE)+0x2f8)
168
169#if ! defined(qemu)
170#define BSP_KBD_IOBASE ((_IO_BASE)+0x60)
171#define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0)
172#endif
173
174#if defined(mvme2300) || defined(mot_ppc_mvme2307) || defined(mot_ppc_mvme2700)
175#define MVME_HAS_DEC21140
176#endif
177#endif
178
179#define BSP_CONSOLE_PORT BSP_UART_COM1
180#define BSP_UART_BAUD_BASE 115200
181
182struct rtems_bsdnet_ifconfig;
183
184#if defined(MVME_HAS_DEC21140)
185#define RTEMS_BSP_NETWORK_DRIVER_NAME "dc1"
186#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_dec21140_driver_attach
187extern int rtems_dec21140_driver_attach(struct rtems_bsdnet_ifconfig *, int);
188#endif
189
190#ifdef qemu
191#define RTEMS_BSP_NETWORK_DRIVER_NAME "ne1"
192#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach
193extern int rtems_ne_driver_attach(struct rtems_bsdnet_ifconfig *, int);
194
195static inline const char* bsp_cmdline_arg(const char* arg)
196{
197 return rtems_bsp_cmdline_get_param_raw(arg);
198}
199#endif
200
201#ifdef qemu
202#define BSP_IDLE_TASK_BODY bsp_ppc_idle_task_body
203extern void *bsp_ppc_idle_task_body(uintptr_t arg);
204#endif
205
206#include <bsp/openpic.h>
207/* BSP_PIC_DO_EOI is optionally used by the 'vmeUniverse' driver
208 * to implement VME IRQ priorities in software.
209 * Note that this requires support by the interrupt controller
210 * driver (cf. bsps/powerpc/shared/irq/openpic_i8259_irq.c)
211 * and the BSP-specific universe initialization/configuration
212 * (cf. bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h bsps/powerpc/shared/vme/vme_universe.c)
213 *
214 * ********* IMPORTANT NOTE ********
215 * When deriving from this file (new BSPs)
216 * DO NOT define "BSP_PIC_DO_EOI" if you don't know what
217 * you are doing i.e., w/o implementing the required pieces
218 * mentioned above.
219 * ********* IMPORTANT NOTE ********
220 */
221#define BSP_PIC_DO_EOI openpic_eoi(0)
222
223#ifndef ASM
224#define outport_byte(port,value) outb(value,port)
225#define outport_word(port,value) outw(value,port)
226#define outport_long(port,value) outl(value,port)
227
228#define inport_byte(port,value) (value = inb(port))
229#define inport_word(port,value) (value = inw(port))
230#define inport_long(port,value) (value = inl(port))
231
232/*
233 * Vital Board data Start using DATA RESIDUAL
234 */
235
236/*
237 * Total memory using RESIDUAL DATA
238 */
239extern unsigned int BSP_mem_size;
240/*
241 * Start of the heap
242 */
243extern unsigned int BSP_heap_start;
244/*
245 * PCI Bus Frequency
246 */
247extern unsigned int BSP_bus_frequency;
248/*
249 * processor clock frequency
250 */
251extern unsigned int BSP_processor_frequency;
252/*
253 * Time base divisior (how many tick for 1 second).
254 */
255extern unsigned int BSP_time_base_divisor;
256
257/*
258 * String passed by the bootloader.
259 */
260extern char *BSP_commandline_string;
261
262#define BSP_Convert_decrementer( _value ) \
263 ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
264
265/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
266extern int BSP_disconnect_clock_handler (void);
267extern int BSP_connect_clock_handler (void);
268
269/* clear hostbridge errors
270 *
271 * NOTE: The routine returns always (-1) if 'enableMCP==1'
272 * [semantics needed by libbspExt] if the MCP input is not wired.
273 * It returns and clears the error bits of the PCI status register.
274 * MCP support is disabled because:
275 * a) the 2100 has no raven chip
276 * b) the raven (2300, 2307, 2700) would raise machine check interrupts
277 * on PCI config space access to empty slots.
278 */
279extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
280
281/*
282 * Prototypes for methods called only from .S for dependency tracking
283 */
284char *save_boot_params(
285 void *r3,
286 void *r4,
287 void *r5,
288 char *cmdline_start,
289 char *cmdline_end
290);
291void zero_bss(void);
292
293/*
294 * Prototypes for BSP methods which cross file boundaries
295 */
296void VIA_isa_bridge_interrupts_setup(void);
297
298#endif
299
300#ifdef __cplusplus
301};
302#endif
303
306#endif
bspcmdline.h
BSP Command Line Handler.
vectors.h
PowerPC Exceptions API.
default-initial-extension.h
This header file provides the default definition of BSP_INITIAL_EXTENSION.
rtems_bsp_cmdline_get_param_raw
const char * rtems_bsp_cmdline_get_param_raw(const char *name)
Obtain Pointer to the Entire Matching Argument.
Definition: bspcmdline_getparamraw.c:47
rtems.h
This header file defines the RTEMS Classic API.
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