37#ifndef LIBBSP_NIOS2_NIOS2_ISS_BSP_H
38#define LIBBSP_NIOS2_NIOS2_ISS_BSP_H
64#define SYSTEM_BUS_WIDTH 32
66#define JTAG_UART_BASE 0x08000000
67#define JTAG_UART_IRQ 2
69#define CLOCK_BASE 0x08001000
70#define CLOCK_FREQ 50000000
73#define TIMER_BASE 0x08002000
74#define TIMER_FREQ 50000000
79#define NIOS2_BYPASS_CACHE ((uint32_t)0x80000000ul)
80#define NIOS2_IO_BASE(x) ( (void*) ((uint32_t)x | NIOS2_BYPASS_CACHE ) )
81#define NIOS2_IENABLE(x) do{ __builtin_wrctl(3,__builtin_rdctl(3)|x);}while(0)
82#define NIOS2_IRQ_ENABLE(x) do {__builtin_wrctl(3,__builtin_rdctl(3)|x);} while(0)
87#ifndef SYSTEM_BUS_WIDTH
88#error SYSTEM_BUS_WIDTH is undefined
91#if SYSTEM_BUS_WIDTH != 32
92#error Only SYSTEM_BUS_WIDTH 32 is supported
97 volatile uint32_t status;
99 volatile uint32_t period_lo;
100 volatile uint32_t period_hi;
101 volatile uint32_t snap_lo;
102 volatile uint32_t snap_hi;
106#define ALTERA_AVALON_TIMER_STATUS_TO_MSK (0x1)
107#define ALTERA_AVALON_TIMER_STATUS_TO_OFST (0)
108#define ALTERA_AVALON_TIMER_STATUS_RUN_MSK (0x2)
109#define ALTERA_AVALON_TIMER_STATUS_RUN_OFST (1)
111#define ALTERA_AVALON_TIMER_CONTROL_ITO_MSK (0x1)
112#define ALTERA_AVALON_TIMER_CONTROL_ITO_OFST (0)
113#define ALTERA_AVALON_TIMER_CONTROL_CONT_MSK (0x2)
114#define ALTERA_AVALON_TIMER_CONTROL_CONT_OFST (1)
115#define ALTERA_AVALON_TIMER_CONTROL_START_MSK (0x4)
116#define ALTERA_AVALON_TIMER_CONTROL_START_OFST (2)
117#define ALTERA_AVALON_TIMER_CONTROL_STOP_MSK (0x8)
118#define ALTERA_AVALON_TIMER_CONTROL_STOP_OFST (3)
122 volatile uint32_t data;
127#define ALTERA_AVALON_JTAG_UART_DATA_DATA_MSK (0x000000FFu)
128#define ALTERA_AVALON_JTAG_UART_DATA_DATA_OFST (0)
129#define ALTERA_AVALON_JTAG_UART_DATA_RVALID_MSK (0x00008000u)
130#define ALTERA_AVALON_JTAG_UART_DATA_RVALID_OFST (15)
131#define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_MSK (0xFFFF0000u)
132#define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_OFST (16)
134#define ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK (0x00000001u)
135#define ALTERA_AVALON_JTAG_UART_CONTROL_RE_OFST (0)
136#define ALTERA_AVALON_JTAG_UART_CONTROL_WE_MSK (0x00000002u)
137#define ALTERA_AVALON_JTAG_UART_CONTROL_WE_OFST (1)
138#define ALTERA_AVALON_JTAG_UART_CONTROL_RI_MSK (0x00000100u)
139#define ALTERA_AVALON_JTAG_UART_CONTROL_RI_OFST (8)
140#define ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK (0x00000200u)
141#define ALTERA_AVALON_JTAG_UART_CONTROL_WI_OFST (9)
142#define ALTERA_AVALON_JTAG_UART_CONTROL_AC_MSK (0x00000400u)
143#define ALTERA_AVALON_JTAG_UART_CONTROL_AC_OFST (10)
144#define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK (0xFFFF0000u)
145#define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_OFST (16)
This header file provides the default definition of BSP_INITIAL_EXTENSION.
This header file defines the RTEMS Classic API.
Definition: intercom.c:87