RTEMS 7.0-rc1
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vc_defines.h
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1/* SPDX-License-Identifier: GPL-2.0+-with-RTEMS-exception */
2
12/*
13 * Copyright (c) 2015 Yang Qiao
14 *
15 * The license and distribution terms for this file may be
16 * found in the file LICENSE in this distribution or at
17 *
18 * http://www.rtems.org/license/LICENSE
19 *
20 */
21
22#ifndef LIBBSP_ARM_RASPBERRYPI_VC_DEFINES_H
23#define LIBBSP_ARM_RASPBERRYPI_VC_DEFINES_H
24
25#include <string.h>
26
43#define BCM2835_MBOX_BUF_CODE_PROCESS_REQUEST 0x00000000
44#define BCM2835_MBOX_BUF_CODE_REQUEST_SUCCEED 0x80000000
45#define BCM2835_MBOX_BUF_CODE_REQUEST_PARSING_ERROR 0x80000001
46#define BCM2835_MBOX_TAG_VAL_LEN_REQUEST 0x00000000
47#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000
48
57typedef struct {
64 uint32_t buf_size;
65
73 uint32_t buf_code;
75
84typedef struct {
88 uint32_t tag;
92 uint32_t val_buf_size;
98 uint32_t val_len;
100
101#define BCM2835_MBOX_TAG_REPLY_IS_SET( _t_ ) \
102 ( ( _t_ )->tag_hdr.val_len & 0x80000000 )
103
104#define BCM2835_MBOX_INIT_BUF( _m_ ) { \
105 memset( ( _m_ ), 0, sizeof( *( _m_ ) ) ); \
106 ( _m_ )->hdr.buf_size = (void *)&(( _m_ )->end_tag) + 4 - (void *)( _m_ ); \
107 ( _m_ )->hdr.buf_code = BCM2835_MBOX_BUF_CODE_PROCESS_REQUEST; \
108 ( _m_ )->end_tag = 0; \
109}
110
111#define BCM2835_MBOX_INIT_TAG( _t_, _id_ ) { \
112 ( _t_ )->tag_hdr.tag = _id_; \
113 ( _t_ )->tag_hdr.val_buf_size = sizeof( ( _t_ )->body ); \
114 ( _t_ )->tag_hdr.val_len = sizeof( ( _t_ )->body.req ); \
115}
116
117#define BCM2835_MBOX_INIT_TAG_NO_REQ( _t_, _id_ ) { \
118 ( _t_ )->tag_hdr.tag = _id_; \
119 ( _t_ )->tag_hdr.val_buf_size = sizeof( ( _t_ )->body ); \
120 ( _t_ )->tag_hdr.val_len = 0; \
121}
122
123/*
124 * Mailbox buffers has to be aligned to 16 bytes because
125 * 4 LSB bits of the BCM2835_MBOX_WRITE and BCM2835_MBOX_READ
126 * registers are used to pass channel number.
127 *
128 * But there is another requirement for buffer allocation
129 * as well when interface is called after cache is enabled.
130 * The buffer should not share cache line with another variable
131 * which can be updated during data exchange with VideoCore.
132 * If cache is filled to satisfy another variable update
133 * during VideoCore output is stored into main memory then
134 * part of received data can be lost.
135 *
136 * Cache line length is 64 bytes for RPi2 Cortex-A7 data cache
137 * so align buffers to this value.
138 */
139#define BCM2835_MBOX_BUF_ALIGN_ATTRIBUTE __attribute__( ( aligned( 64 ) ) )
140
141/* Video Core */
142#define BCM2835_MAILBOX_TAG_FIRMWARE_REVISION 0x00000001
143typedef struct {
144 bcm2835_mbox_tag_hdr tag_hdr;
145 union {
146 struct {
147 } req;
148 struct {
149 uint32_t rev;
150 } resp;
151 } body;
153
154/* Hardware */
155#define BCM2835_MAILBOX_TAG_GET_BOARD_MODEL 0x00010001
156#define BCM2835_MAILBOX_TAG_GET_BOARD_VERSION 0x00010002
157typedef struct {
158 bcm2835_mbox_tag_hdr tag_hdr;
159 union {
160 struct {
161 } req;
162 struct {
163 uint32_t spec;
164 } resp;
165 } body;
167
168#if (BSP_IS_RPI2 == 1)
169#define BCM2836_MAILBOX_BOARD_V_2_B 0x4
170#else
171#define BCM2835_MAILBOX_BOARD_V_B_I2C0_2 0x2
172#define BCM2835_MAILBOX_BOARD_V_B_I2C0_3 0x3
173#define BCM2835_MAILBOX_BOARD_V_B_I2C1_4 0x4
174#define BCM2835_MAILBOX_BOARD_V_B_I2C1_5 0x5
175#define BCM2835_MAILBOX_BOARD_V_B_I2C1_6 0x6
176#define BCM2835_MAILBOX_BOARD_V_A_7 0x7
177#define BCM2835_MAILBOX_BOARD_V_A_8 0x8
178#define BCM2835_MAILBOX_BOARD_V_A_9 0x9
179#define BCM2835_MAILBOX_BOARD_V_B_REV2_d 0xd
180#define BCM2835_MAILBOX_BOARD_V_B_REV2_e 0xe
181#define BCM2835_MAILBOX_BOARD_V_B_REV2_f 0xf
182#define BCM2835_MAILBOX_BOARD_V_B_PLUS 0x10
183#define BCM2835_MAILBOX_BOARD_V_CM 0x11
184#define BCM2835_MAILBOX_BOARD_V_A_PLUS 0x12
185#endif
186
187#define BCM2835_MAILBOX_TAG_GET_BOARD_MAC 0x00010003
188#define BCM2835_MAILBOX_TAG_GET_BOARD_SERIAL 0x00010004
189typedef struct {
190 bcm2835_mbox_tag_hdr tag_hdr;
191 union {
192 struct {
193 } req;
194 struct {
195 uint64_t board_serial;
196 } resp;
197 } body;
199
200#define BCM2835_MAILBOX_TAG_GET_ARM_MEMORY 0x00010005
201typedef struct {
202 bcm2835_mbox_tag_hdr tag_hdr;
203 union {
204 struct {
205 } req;
206 struct {
207 uint32_t base;
208 uint32_t size;
209 } resp;
210 } body;
212
213#define BCM2835_MAILBOX_TAG_GET_VC_MEMORY 0x00010006
214typedef struct {
215 bcm2835_mbox_tag_hdr tag_hdr;
216 union {
217 struct {
218 } req;
219 struct {
220 uint32_t base;
221 uint32_t size;
222 } resp;
223 } body;
225
226#define BCM2835_MAILBOX_TAG_GET_CLOCKS 0x00010007
227typedef struct {
228 bcm2835_mbox_tag_hdr tag_hdr;
229 union {
230 struct {
231 uint32_t clock_id;
232 } req;
233 struct {
234 uint32_t clock_id;
235 uint32_t clock_rate;
236 } resp;
237 } body;
239
240/* Config */
241#define BCM2835_MAILBOX_TAG_GET_CMD_LINE 0x00050001
242typedef struct {
243 bcm2835_mbox_tag_hdr tag_hdr;
244 union {
245 struct {
246 } req;
247 struct {
248 uint8_t cmdline[ 1024 ];
249 } resp;
250 } body;
252
253/* Shared resource management */
254#define BCM2835_MAILBOX_TAG_GET_DMA_CHANNELS 0x00060001
255
256/* Power */
257#define BCM2835_MAILBOX_POWER_UDID_SD_Card 0x00000000
258#define BCM2835_MAILBOX_POWER_UDID_UART0 0x00000001
259#define BCM2835_MAILBOX_POWER_UDID_UART1 0x00000002
260#define BCM2835_MAILBOX_POWER_UDID_USB_HCD 0x00000003
261#define BCM2835_MAILBOX_POWER_UDID_I2C0 0x00000004
262#define BCM2835_MAILBOX_POWER_UDID_I2C1 0x00000005
263#define BCM2835_MAILBOX_POWER_UDID_I2C2 0x00000006
264#define BCM2835_MAILBOX_POWER_UDID_SPI 0x00000007
265#define BCM2835_MAILBOX_POWER_UDID_CCP2TX 0x00000008
266
267#define BCM2835_MAILBOX_TAG_GET_POWER_STATE 0x00020001
268typedef struct {
269 bcm2835_mbox_tag_hdr tag_hdr;
270 union {
271 struct {
272 uint32_t dev_id;
273 } req;
274 struct {
275 uint32_t dev_id;
276 uint32_t state;
277 } resp;
278 } body;
280
281#define BCM2835_MAILBOX_POWER_STATE_RESP_ON (1 << 0)
282#define BCM2835_MAILBOX_POWER_STATE_RESP_NODEV (1 << 1)
283
284#define BCM2835_MAILBOX_TAG_GET_TIMING 0x00020002
285#define BCM2835_MAILBOX_TAG_SET_POWER_STATE 0x00028001
286typedef struct {
287 bcm2835_mbox_tag_hdr tag_hdr;
288 union {
289 struct {
290 uint32_t dev_id;
291 uint32_t state;
292 } req;
293 struct {
294 uint32_t dev_id;
295 uint32_t state;
296 } resp;
297 } body;
299
300#ifndef BCM2835_MAILBOX_SET_POWER_STATE_REQ_ON
301/* Value is defined as a part of public VideoCore API */
302#define BCM2835_MAILBOX_SET_POWER_STATE_REQ_ON (1 << 0)
303#define BCM2835_MAILBOX_SET_POWER_STATE_REQ_WAIT (1 << 1)
304#endif
305
306/* Clocks */
307#define BCM2835_MAILBOX_UCID_CLOCK_RESERVED 0x000000000
308#define BCM2835_MAILBOX_UCID_CLOCK_EMMC 0x000000001
309#define BCM2835_MAILBOX_UCID_CLOCK_UART 0x000000002
310#define BCM2835_MAILBOX_UCID_CLOCK_ARM 0x000000003
311#define BCM2835_MAILBOX_UCID_CLOCK_CORE 0x000000004
312#define BCM2835_MAILBOX_UCID_CLOCK_V3D 0x000000005
313#define BCM2835_MAILBOX_UCID_CLOCK_H264 0x000000006
314#define BCM2835_MAILBOX_UCID_CLOCK_ISP 0x000000007
315#define BCM2835_MAILBOX_UCID_CLOCK_SDRAM 0x000000008
316#define BCM2835_MAILBOX_UCID_CLOCK_PIXEL 0x000000009
317#define BCM2835_MAILBOX_UCID_CLOCK_PWM 0x00000000a
318
319#define BCM2835_MAILBOX_TAG_GET_CLOCK_STATE 0x00030001
320#define BCM2835_MAILBOX_TAG_SET_CLOCK_STATE 0x00038001
321#define BCM2835_MAILBOX_TAG_GET_CLOCK_RATE 0x00030002
322#define BCM2835_MAILBOX_TAG_SET_CLOCK_RATE 0x00038002
323#define BCM2835_MAILBOX_TAG_GET_MAX_CLOCK_RATE 0x00030004
324#define BCM2835_MAILBOX_TAG_GET_MIN_CLOCK_RATE 0x00030007
325#define BCM2835_MAILBOX_TAG_GET_TRUBO 0x00030009
326#define BCM2835_MAILBOX_TAG_SET_TURBO 0x00038009
327
328#define BCM2835_MAILBOX_TAG_GET_DOMAIN_STATE 0x00030030
329#define BCM2835_MAILBOX_TAG_SET_DOMAIN_STATE 0x00038030
330
331/* Voltage */
332#define BCM2835_MAILBOX_VOLTAGE_RESERVED_UVID 0x000000000
333#define BCM2835_MAILBOX_VOLTAGE_CORE_UVID 0x000000001
334#define BCM2835_MAILBOX_VOLTAGE_SDRAM_C_UVID 0x000000002
335#define BCM2835_MAILBOX_VOLTAGE_SDRAM_P_UVID 0x000000003
336#define BCM2835_MAILBOX_VOLTAGE_SDRAM_I_UVID 0x000000004
337
338#define BCM2835_MAILBOX_TAG_GET_VOLTAGE 0x00030003
339#define BCM2835_MAILBOX_TAG_SET_VOLTAGE 0x00038003
340#define BCM2835_MAILBOX_TAG_GET_MAX_VOLTAGE 0x00030005
341#define BCM2835_MAILBOX_TAG_GET_MIN_VOLTAGE 0x00030008
342#define BCM2835_MAILBOX_TAG_GET_TEMPERATURE 0x00030006
343#define BCM2835_MAILBOX_TAG_GET_MAX_TEMPERATURE 0x0003000a
344
345/* Memory */
346#define BCM2835_MAILBOX_TAG_ALLOCATE_MEMORY 0x0003000c
347#define BCM2835_MAILBOX_TAG_LOCK_MEMORY 0x0003000d
348#define BCM2835_MAILBOX_TAG_UNLOCK_MEMORY 0x0003000e
349#define BCM2835_MAILBOX_TAG_RELEASE_MEMORY 0x0003000f
350#define BCM2835_MAILBOX_TAG_EXECUTE_CODE 0x00030010
351#define BCM2835_MAILBOX_TAG_GET_DISPMANX_RESOURCE_MEM_HANDLE 0x00030014
352
353#define BCM2835_MAILBOX_TAG_GET_EDID_BLOCK 0x00030020
354
355/* Framebuffer */
356#define BCM2835_MAILBOX_TAG_ALLOCATE_BUFFER 0x00040001
357typedef struct {
358 bcm2835_mbox_tag_hdr tag_hdr;
359 union {
360 struct {
361 uint32_t align;
362 } req;
363 struct {
364 uint32_t base;
365 uint32_t size;
366 } resp;
367 } body;
369
370#define BCM2835_MAILBOX_TAG_RELEASE_BUFFER 0x00048001
371
372#define BCM2835_MAILBOX_TAG_BLANK_SCREEN 0x00040002
373
374#define BCM2835_MAILBOX_TAG_GET_DISPLAY_SIZE 0x00040003
375#define BCM2835_MAILBOX_TAG_TEST_DISPLAY_SIZE 0x00044003
376#define BCM2835_MAILBOX_TAG_SET_DISPLAY_SIZE 0x00048003
377typedef struct {
378 bcm2835_mbox_tag_hdr tag_hdr;
379 union {
380 struct {
381 uint32_t width;
382 uint32_t height;
383 } req;
384 struct {
385 uint32_t width;
386 uint32_t height;
387 } resp;
388 } body;
390
391#define BCM2835_MAILBOX_TAG_GET_VIRTUAL_SIZE 0x00040004
392#define BCM2835_MAILBOX_TAG_TEST_VIRTUAL_SIZE 0x00044004
393#define BCM2835_MAILBOX_TAG_SET_VIRTUAL_SIZE 0x00048004
394typedef struct {
395 bcm2835_mbox_tag_hdr tag_hdr;
396 union {
397 struct {
398 uint32_t vwidth;
399 uint32_t vheight;
400 } req;
401 struct {
402 uint32_t vwidth;
403 uint32_t vheight;
404 } resp;
405 } body;
407
408#define BCM2835_MAILBOX_TAG_GET_DEPTH 0x00040005
409#define BCM2835_MAILBOX_TAG_TEST_DEPTH 0x00044005
410#define BCM2835_MAILBOX_TAG_SET_DEPTH 0x00048005
411typedef struct {
412 bcm2835_mbox_tag_hdr tag_hdr;
413 union {
414 struct {
415 uint32_t depth;
416 } req;
417 struct {
418 uint32_t depth;
419 } resp;
420 } body;
422
423#define BCM2835_MAILBOX_TAG_GET_PIXEL_ORDER 0x00040006
424#define BCM2835_MAILBOX_TAG_TEST_PIXEL_ORDER 0x00044006
425#define BCM2835_MAILBOX_TAG_SET_PIXEL_ORDER 0x00048006
426
427#define BCM2835_MAILBOX_PIXEL_ORDER_BGR 0
428#define BCM2835_MAILBOX_PIXEL_ORDER_RGB 1
429typedef struct {
430 bcm2835_mbox_tag_hdr tag_hdr;
431 union {
432 struct {
433 uint32_t pixel_order;
434 } req;
435 struct {
436 uint32_t pixel_order;
437 } resp;
438 } body;
440
441#define BCM2835_MAILBOX_TAG_GET_ALPHA_MODE 0x00040007
442#define BCM2835_MAILBOX_TAG_TEST_ALPHA_MODE 0x00044007
443#define BCM2835_MAILBOX_TAG_SET_ALPHA_MODE 0x00048007
444typedef struct {
445 bcm2835_mbox_tag_hdr tag_hdr;
446 union {
447 struct {
448 uint32_t alpha_mode;
449 } req;
450 struct {
451 uint32_t alpha_mode;
452 } resp;
453 } body;
455
456#define BCM2835_MAILBOX_ALPHA_MODE_0_OPAQUE 0
457#define BCM2835_MAILBOX_ALPHA_MODE_0_TRANSPARENT 1
458#define BCM2835_MAILBOX_ALPHA_MODE_IGNORED 2
459
460#define BCM2835_MAILBOX_TAG_GET_PITCH 0x00040008
461typedef struct {
462 bcm2835_mbox_tag_hdr tag_hdr;
463 union {
464 struct {
465 } req;
466 struct {
467 uint32_t pitch;
468 } resp;
469 } body;
471
472#define BCM2835_MAILBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009
473#define BCM2835_MAILBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009
474#define BCM2835_MAILBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009
475typedef struct {
476 bcm2835_mbox_tag_hdr tag_hdr;
477 union {
478 struct {
479 uint32_t voffset_x;
480 uint32_t voffset_y;
481 } req;
482 struct {
483 uint32_t voffset_x;
484 uint32_t voffset_y;
485 } resp;
486 } body;
488
489#define BCM2835_MAILBOX_TAG_GET_OVERSCAN 0x0004000a
490#define BCM2835_MAILBOX_TAG_TEST_OVERSCAN 0x0004400a
491#define BCM2835_MAILBOX_TAG_SET_OVERSCAN 0x0004800a
492typedef struct {
493 bcm2835_mbox_tag_hdr tag_hdr;
494 union {
495 struct {
496 uint32_t overscan_top;
497 uint32_t overscan_bottom;
498 uint32_t overscan_left;
499 uint32_t overscan_right;
500 } req;
501 struct {
502 uint32_t overscan_top;
503 uint32_t overscan_bottom;
504 uint32_t overscan_left;
505 uint32_t overscan_right;
506 } resp;
507 } body;
509
510#define BCM2835_MAILBOX_TAG_GET_PALETTE 0x0004000b
511#define BCM2835_MAILBOX_TAG_TEST_PALETTE 0x0004400b
512#define BCM2835_MAILBOX_TAG_SET_PALETTE 0x0004800b
513#define BCM2835_MAILBOX_TAG_SET_CURSOR_INFO 0x00008011
514#define BCM2835_MAILBOX_TAG_SET_CURSOR_STATE 0x00008010
515
520#endif /* LIBBSP_ARM_RASPBERRYPI_VC_DEFINES_H */
Buffer Header.
Definition: vc_defines.h:57
uint32_t buf_code
Buffer Code.
Definition: vc_defines.h:73
uint32_t buf_size
Buffer Size.
Definition: vc_defines.h:64
Definition: vc_defines.h:357
Definition: vc_defines.h:444
Definition: vc_defines.h:411
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Definition: vc_defines.h:461
Definition: vc_defines.h:268
Definition: vc_defines.h:214
Tag Header.
Definition: vc_defines.h:84
uint32_t tag
Property Tag ID.
Definition: vc_defines.h:88
uint32_t val_buf_size
The size of request qnd responce buffer.
Definition: vc_defines.h:92
uint32_t val_len
The size of response buffer set by videocore.
Definition: vc_defines.h:98
Definition: vc_defines.h:492
Definition: vc_defines.h:429
Definition: vc_defines.h:286
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Definition: vc_defines.h:394