RTEMS 7.0-rc1
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smp-imps.h
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1/* SPDX-License-Identifier: GPL-2.0+-with-RTEMS-exception */
2
10/*
11 * Author: Erich Boleyn <erich@uruk.org>
12 * http://www.uruk.org/~erich/
13 *
14 * Copyright (c) 1997-2011 Erich Boleyn. All rights reserved.
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
19 * 1. Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution.
24 * 3. The name of the author may not be used to endorse or promote products
25 * derived from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
28 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
29 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
31 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
32 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
36 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 */
38
39/*
40 * Header file implementing Intel MultiProcessor Specification (MPS)
41 * version 1.1 and 1.4 SMP hardware control for Intel Architecture CPUs,
42 * with hooks for running correctly on a standard PC without the hardware.
43 *
44 * This file was created from information in the Intel MPS version 1.4
45 * document, order number 242016-004, which can be ordered from the
46 * Intel literature center.
47 */
48
49/*
50 * This file is based upon code by Eric Boleyn as documented above.
51 * RTEMS support was added and minimal other changes were made.
52 * This should make it easier to compare this file with the original
53 * version.
54 *
55 * COPYRIGHT (c) 2011.
56 * On-Line Applications Research Corporation (OAR).
57 *
58 * The license and distribution terms for this file may be
59 * found in the file LICENSE in this distribution or at
60 * http://www.rtems.org/license/LICENSE.
61 */
62
72#ifndef _SMP_IMPS_H
73#define _SMP_IMPS_H
74
75/* make sure "apic.h" is included */
76#ifndef _APIC_H
77#error Must include "apic.h" before "smp-imps.h"
78#endif /* !_APIC_H */
79
80/*
81 * Defines used.
82 */
83
84#define IMPS_READ(x) (*((volatile unsigned *) (x)))
85#define IMPS_WRITE(x,y) (*((volatile unsigned *) (x)) = (y))
86
87#ifdef IMPS_DEBUG
88#define IMPS_DEBUG_PRINT(x) KERNEL_PRINT(x)
89#else /* !IMPS_DEBUG */
90#define IMPS_DEBUG_PRINT(x)
91#endif /* !IMPS_DEBUG */
92
93#define IMPS_MAX_CPUS APIC_BCAST_ID
94
99#define IMPS_FPS_SIGNATURE ('_' | ('M'<<8) | ('P'<<16) | ('_'<<24))
100#define IMPS_FPS_IMCRP_BIT 0x80
101#define IMPS_FPS_DEFAULT_MAX 7
102
107#define IMPS_CTH_SIGNATURE ('P' | ('C'<<8) | ('M'<<16) | ('P'<<24))
108
112#define IMPS_FLAG_ENABLED 1
113#define IMPS_BCT_PROCESSOR 0
114#define IMPS_CPUFLAG_BOOT 2
115#define IMPS_BCT_BUS 1
116#define IMPS_BCT_IOAPIC 2
117#define IMPS_BCT_IO_INTERRUPT 3
118#define IMPS_BCT_LOCAL_INTERRUPT 4
119#define IMPS_INT_INT 0
120#define IMPS_INT_NMI 1
121#define IMPS_INT_SMI 2
122#define IMPS_INT_EXTINT 3
123
124
125/*
126 * Typedefs and data item definitions done here.
127 */
128
129typedef struct imps_fps imps_fps;
130typedef struct imps_cth imps_cth;
131typedef struct imps_processor imps_processor;
132typedef struct imps_bus imps_bus;
133typedef struct imps_ioapic imps_ioapic;
134typedef struct imps_interrupt imps_interrupt;
135
136
137/*
138 * Data structures defined here
139 */
140
148{
149 unsigned sig;
150 imps_cth *cth_ptr;
151 unsigned char length;
152 unsigned char spec_rev;
153 unsigned char checksum;
154 unsigned char feature_info[5];
155};
156
164{
165 unsigned sig;
166 unsigned short base_length;
167 unsigned char spec_rev;
168 unsigned char checksum;
169 char oem_id[8];
170 char prod_id[12];
171 unsigned oem_table_ptr;
172 unsigned short oem_table_size;
173 unsigned short entry_count;
174 unsigned lapic_addr;
175 unsigned short extended_length;
176 unsigned char extended_checksum;
177 char reserved[1];
178};
179
187{
188 unsigned char type;
189 unsigned char apic_id;
190 unsigned char apic_ver;
191 unsigned char flags;
192 unsigned signature;
193 unsigned features;
194 char reserved[8];
195};
196
198{
199 unsigned char type;
200 unsigned char id;
201 char bus_type[6];
202};
203
205{
206 unsigned char type;
207 unsigned char id;
208 unsigned char ver;
209 unsigned char flags;
210 unsigned addr;
211};
212
214{
215 unsigned char type;
216 unsigned char int_type;
217 unsigned short flags;
218 unsigned char source_bus_id;
219 unsigned char source_bus_irq;
220 unsigned char dest_apic_id;
221 unsigned char dest_apic_intin;
222};
223
224/*
225 * Exported globals here.
226 */
227
231extern unsigned char imps_cpu_apic_map[IMPS_MAX_CPUS];
232extern unsigned char imps_apic_cpu_map[IMPS_MAX_CPUS];
233
235extern char _binary_appstart_bin_start[];
236extern char _binary_appstart_bin_size[];
237
239extern unsigned imps_lapic_addr;
240
241/*
242 * Defines that use variables
243 */
244#define IMPS_LAPIC_READ(x) (*((volatile unsigned *) (imps_lapic_addr+(x))))
245#define IMPS_LAPIC_WRITE(x, y) \
246 (*((volatile unsigned *) (imps_lapic_addr+(x))) = (y))
247
248#endif /* !_SMP_IMPS_H */
249
unsigned char imps_cpu_apic_map[IMPS_MAX_CPUS]
These map from virtual cpu numbers to APIC id's and back.
Definition: smp-imps.c:198
char _binary_appstart_bin_start[]
base address of application processor reset code at 0x70000
unsigned imps_lapic_addr
base address of the local apic. Usually 0xFEE00000
Definition: smp-imps.c:202
Definition: smp-imps.h:198
unsigned char type
must be 1
Definition: smp-imps.h:199
MP Configuration Table Header (cth)
Definition: smp-imps.h:164
MP Floating Pointer Structure (fps)
Definition: smp-imps.h:148
Definition: smp-imps.h:214
unsigned char type
must be 3 or 4
Definition: smp-imps.h:215
Definition: smp-imps.h:205
unsigned char type
must be 2
Definition: smp-imps.h:206
Base MP Configuration Table Types. They are sorted according to type (i.e. all of type 0 come first,...
Definition: smp-imps.h:187
unsigned char type
must be 0
Definition: smp-imps.h:188