RTEMS 7.0-rc1
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ns16550_p.h
Go to the documentation of this file.
1/* SPDX-License-Identifier: GPL-2.0+-with-RTEMS-exception */
2
8/*
9 * COPYRIGHT (c) 1998 by Radstone Technology
10 *
11 *
12 * THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
13 * KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
14 * IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
15 * AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
16 *
17 * You are hereby granted permission to use, copy, modify, and distribute
18 * this file, provided that this notice, plus the above copyright notice
19 * and disclaimer, appears in all copies. Radstone Technology will provide
20 * no support for this code.
21 *
22 * COPYRIGHT (c) 1989-2012.
23 * On-Line Applications Research Corporation (OAR).
24 *
25 * The license and distribution terms for this file may be
26 * found in the file LICENSE in this distribution or at
27 * http://www.rtems.org/license/LICENSE.
28 */
29
30#ifndef _NS16550_P_H_
31#define _NS16550_P_H_
32
33#ifndef ASM
34#include <libchip/serial.h>
35#endif
36
37#ifdef __cplusplus
38extern "C" {
39#endif
40
41/*
42 * Define NS16550_STATIC to nothing while debugging so the entry points
43 * will show up in the symbol table.
44 */
45
46#define NS16550_STATIC static
47
48#define NS16550_RECEIVE_BUFFER 0
49#define NS16550_TRANSMIT_BUFFER 0
50#define NS16550_DIVISOR_LATCH_L 0
51#define NS16550_INTERRUPT_ENABLE 1
52#define NS16550_DIVISOR_LATCH_M 1
53#define NS16550_INTERRUPT_ID 2
54#define NS16550_FIFO_CONTROL 2
55#define NS16550_LINE_CONTROL 3
56#define NS16550_MODEM_CONTROL 4
57#define NS16550_LINE_STATUS 5
58#define NS16550_MODEM_STATUS 6
59#define NS16550_SCRATCH_PAD 7
60#define NS16550_FRACTIONAL_DIVIDER 10
61
62/*
63 * Define serial port interrupt enable register structure.
64 */
65
66#define SP_INT_RX_ENABLE 0x01
67#define SP_INT_TX_ENABLE 0x02
68#define SP_INT_LS_ENABLE 0x04
69#define SP_INT_MS_ENABLE 0x08
70
71#define NS16550_ENABLE_ALL_INTR (SP_INT_RX_ENABLE | SP_INT_TX_ENABLE)
72#define NS16550_DISABLE_ALL_INTR 0x00
73#define NS16550_ENABLE_ALL_INTR_EXCEPT_TX (SP_INT_RX_ENABLE)
74
75/*
76 * Define serial port interrupt ID register structure.
77 */
78
79#define SP_IID_0 0x01
80#define SP_IID_1 0x02
81#define SP_IID_2 0x04
82#define SP_IID_3 0x08
83
84/*
85 * Define serial port fifo control register structure.
86 */
87
88#define SP_FIFO_ENABLE 0x01
89#define SP_FIFO_RXRST 0x02
90#define SP_FIFO_TXRST 0x04
91#define SP_FIFO_DMA 0x08
92#define SP_FIFO_RXLEVEL 0xc0
93
94#define SP_FIFO_SIZE 16
95
96/*
97 * Define serial port line control register structure.
98 */
99
100#define SP_LINE_SIZE 0x03
101#define SP_LINE_STOP 0x04
102#define SP_LINE_PAR 0x08
103#define SP_LINE_ODD 0x10
104#define SP_LINE_STICK 0x20
105#define SP_LINE_BREAK 0x40
106#define SP_LINE_DLAB 0x80
107
108/*
109 * Line status register character size definitions.
110 */
111
112#define FIVE_BITS 0x0 /* five bits per character */
113#define SIX_BITS 0x1 /* six bits per character */
114#define SEVEN_BITS 0x2 /* seven bits per character */
115#define EIGHT_BITS 0x3 /* eight bits per character */
116
117/*
118 * Define serial port modem control register structure.
119 */
120
121#define SP_MODEM_DTR 0x01
122#define SP_MODEM_RTS 0x02
123#define SP_MODEM_IRQ 0x08
124#define SP_MODEM_LOOP 0x10
125#define SP_MODEM_DIV4 0x80
126
127/*
128 * Define serial port line status register structure.
129 */
130
131#define SP_LSR_RDY 0x01
132#define SP_LSR_EOVRUN 0x02
133#define SP_LSR_EPAR 0x04
134#define SP_LSR_EFRAME 0x08
135#define SP_LSR_BREAK 0x10
136#define SP_LSR_THOLD 0x20
137#define SP_LSR_TX 0x40
138#define SP_LSR_EFIFO 0x80
139
140#ifdef __cplusplus
141}
142#endif
143
144#endif /* _NS16550_P_H_ */
The generic libchip serial driver interface.