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RTEMS 7.0-rc1
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36#ifndef LIBBSP_GENERIC_OR1K_H
37#define LIBBSP_GENERIC_OR1K_H
57 #define OR1K_REG(x) (*((volatile unsigned char *) (x)))
58 #define OR1K_BIT(n) (1 << (n))
67#define OR1K_BSP_CLOCK_FREQ 50000000UL
68#define OR1K_BSP_UART_BASE 0x90000000
70#define OR1K_BSP_UART_REG_TX (OR1K_BSP_UART_BASE+0)
71#define OR1K_BSP_UART_REG_RX (OR1K_BSP_UART_BASE+0)
72#define OR1K_BSP_UART_REG_DEV_LATCH_LOW (OR1K_BSP_UART_BASE+0)
73#define OR1K_BSP_UART_REG_DEV_LATCH_HIGH (OR1K_BSP_UART_BASE+1)
74#define OR1K_BSP_UART_REG_INT_ENABLE (OR1K_BSP_UART_BASE+1)
75#define OR1K_BSP_UART_REG_INT_ID (OR1K_BSP_UART_BASE+2)
76#define OR1K_BSP_UART_REG_FIFO_CTRL (OR1K_BSP_UART_BASE+2)
77#define OR1K_BSP_UART_REG_LINE_CTRL (OR1K_BSP_UART_BASE+3)
78#define OR1K_BSP_UART_REG_MODEM_CTRL (OR1K_BSP_UART_BASE+4)
79#define OR1K_BSP_UART_REG_LINE_STATUS (OR1K_BSP_UART_BASE+5)
80#define OR1K_BSP_UART_REG_MODEM_STATUS (OR1K_BSP_UART_BASE+6)
81#define OR1K_BSP_UART_REG_SCRATCH (OR1K_BSP_UART_BASE+7)
84#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_1 (0x00)
85#define OR1K_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO (0x01)
86#define OR1K_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR (0x02)
87#define OR1K_BSP_UART_REG_FIFO_CTRL_CLEAR_XMIT (0x03)
88#define OR1K_BSP_UART_REG_FIFO_CTRL_DMA_SELECT (0x08)
89#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_4 (0x40)
90#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_8 (0x80)
91#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_14 (0xC0)
92#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_MASK (0xC0)
95#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN5 (0x00)
96#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN6 (0x01)
97#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN7 (0x02)
98#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN8 (0x03)
99#define OR1K_BSP_UART_REG_LINE_CTRL_STOP (0x04)
100#define OR1K_BSP_UART_REG_LINE_CTRL_PARITY (0x08)
101#define OR1K_BSP_UART_REG_LINE_CTRL_EPAR (0x10)
102#define OR1K_BSP_UART_REG_LINE_CTRL_SPAR (0x20)
103#define OR1K_BSP_UART_REG_LINE_CTRL_SBC (0x40)
104#define OR1K_BSP_UART_REG_LINE_CTRL_DLAB (0x80)
107#define OR1K_BSP_UART_REG_LINE_STATUS_DR (0x01)
108#define OR1K_BSP_UART_REG_LINE_STATUS_OE (0x02)
109#define OR1K_BSP_UART_REG_LINE_STATUS_PE (0x04)
110#define OR1K_BSP_UART_REG_LINE_STATUS_FE (0x08)
111#define OR1K_BSP_UART_REG_LINE_STATUS_BI (0x10)
112#define OR1K_BSP_UART_REG_LINE_STATUS_THRE (0x20)
113#define OR1K_BSP_UART_REG_LINE_STATUS_TEMT (0x40)
116#define OR1K_BSP_UART_REG_MODEM_CTRL_DTR (0x01)
117#define OR1K_BSP_UART_REG_MODEM_CTRL_RTS (0x02)
118#define OR1K_BSP_UART_REG_MODEM_CTRL_OUT1 (0x04)
119#define OR1K_BSP_UART_REG_MODEM_CTRL_OUT2 (0x08)
120#define OR1K_BSP_UART_REG_MODEM_CTRL_LOOP (0x10)
123#define OR1K_BSP_UART_REG_MODEM_STATUS_DCTS (0x01)
124#define OR1K_BSP_UART_REG_MODEM_STATUS_DDSR (0x02)
125#define OR1K_BSP_UART_REG_MODEM_STATUS_TERI (0x04)
126#define OR1K_BSP_UART_REG_MODEM_STATUS_DDCD (0x08)
127#define OR1K_BSP_UART_REG_MODEM_STATUS_CTS (0x10)
128#define OR1K_BSP_UART_REG_MODEM_STATUS_DSR (0x20)
129#define OR1K_BSP_UART_REG_MODEM_STATUS_RI (0x40)
130#define OR1K_BSP_UART_REG_MODEM_STATUS_DCD (0x80)
131#define OR1K_BSP_UART_REG_MODEM_STATUS_ANY_DELTA (0x0F)