RTEMS 7.0-rc1
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bat.h
1/* SPDX-License-Identifier: GPL-2.0+-with-RTEMS-exception */
2
3/*
4 * bat.h
5 *
6 * This file contains declaration of C function to
7 * Instantiate 60x/7xx ppc Block Address Translation (BAT) registers.
8 * More detailed information can be found on motorola
9 * site and more precisely in the following book :
10 *
11 * MPC750
12 * Risc Microporcessor User's Manual
13 * Motorola REF : MPC750UM/AD 8/97
14 *
15 * Copyright (C) 1999 Eric Valette (eric.valette@free.fr)
16 * Canon Centre Recherche France.
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef _LIBCPU_BAT_H
24#define _LIBCPU_BAT_H
25
26#include <libcpu/mmu.h>
27#include <libcpu/pgtable.h>
28
29#define IO_PAGE (_PAGE_NO_CACHE | _PAGE_GUARDED | _PAGE_RW)
30
31#ifndef ASM
32/* Take no risks -- the essential parts of this routine run with
33 * interrupts disabled!
34 *
35 * The routine does basic parameter checks:
36 * - Index must be 0..3 (0..7 on 7455, 7457).
37 * If an index > 3 is requested the 745x is
38 * programmed to enable the higher BATs.
39 * - Size must be a power of two and <= 1<<28
40 * (<=1<<31 on 7455, 7457. Also, on these processors
41 * the special value 0xffffffff is allowed which stands
42 * for 1<<32).
43 * If a size > 1<<28 is requested, the 745x is
44 * programmed to enable the larger block sizes.
45 * - Bat ranges must not overlap.
46 * - Physical & virtual addresses must be aligned
47 * to the size.
48 *
49 * RETURNS: zero on success, nonzero on failure.
50 */
51extern int setdbat(int bat_index, unsigned long virt, unsigned long phys,
52 unsigned int size, int flags);
53
54/* Same as setdbat but sets IBAT */
55extern int setibat(int bat_index, unsigned long virt, unsigned long phys,
56 unsigned int size, int flags);
57
58/* read DBAT # 'idx' into *pu / *pl. NULL pointers may be passed.
59 * If pu and pl are NULL, the bat contents are dumped to the console (printk).
60 *
61 * RETURNS: upper BAT contents or (-1) if index is invalid
62 */
63extern int getdbat(int bat_index, unsigned long *pu, unsigned long *pl);
64
65/* Same as getdbat but reads IBAT */
66extern int getibat(int bat_index, unsigned long *pu, unsigned long *pl);
67
68/* Do not use the asm-routines; they are obsolete; use setdbat() instead */
69extern void asm_setdbat0(unsigned int uperPart, unsigned int lowerPart);
70extern void asm_setdbat1(unsigned int uperPart, unsigned int lowerPart);
71extern void asm_setdbat2(unsigned int uperPart, unsigned int lowerPart);
72extern void asm_setdbat3(unsigned int uperPart, unsigned int lowerPart);
73#else
74
75/* Initialize all bats (upper and lower) to zero. This routine should *only*
76 * be called during early BSP initialization when no C-ABI is available
77 * yet.
78 * This routine clobbers r3 and r4.
79 * NOTE: on 7450 CPUs all 8 dbat/ibat units are cleared. On 601 CPUs only
80 * 4 ibats.
81 */
82 .globl CPU_clear_bats_early
83 .type CPU_clear_bats_early,@function
84
85#endif
86
87#endif /* _LIBCPU_BAT_H */
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