RTEMS 6.1-rc7
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vectors.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
13 * Written by Kinsey Moore <kinsey.moore@oarcorp.com>
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#ifndef LIBCPU_AARCH64_VECTORS_H
38#define LIBCPU_AARCH64_VECTORS_H
39
40#ifndef ASM
41
42#ifdef __cplusplus
43extern "C" {
44#endif /* __cplusplus */
45
46/* VBAR, Vector Base Address Register, Security Extensions */
47
48static inline void
49*AArch64_get_vector_base_address(void)
50{
51 void *base;
52
53 __asm__ volatile (
54 "mrs %[base], VBAR_EL1\n"
55 : [base] "=&r" (base)
56 );
57
58 return base;
59}
60
61static inline void
62AArch64_set_vector_base_address(void *base)
63{
64 __asm__ volatile (
65 "msr VBAR_EL1, %[base]\n"
66 : : [base] "r" (base)
67 );
68}
69
70static inline void
71*AArch64_get_hyp_vector_base_address(void)
72{
73 void *base;
74
75 __asm__ volatile (
76 "mrs %[base], VBAR_EL2\n"
77 : [base] "=&r" (base)
78 );
79
80 return base;
81}
82
83static inline void
84AArch64_set_hyp_vector_base_address(void *base)
85{
86 __asm__ volatile (
87 "msr VBAR_EL2, %[base]\n"
88 : : [base] "r" (base)
89 );
90}
91
94#ifdef __cplusplus
95}
96#endif /* __cplusplus */
97
98#endif /* ASM */
99
100#endif /* LIBCPU_AARCH64_VECTORS_H */