RTEMS 6.1-rc7
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cpu_asm.h
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 * Copyright (c) 2018 Amaan Cheval <amaan.cheval@gmail.com>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#ifndef _RTEMS_SCORE_CPU_ASM_H
29#define _RTEMS_SCORE_CPU_ASM_H
30
31#if !ASM
32
34
35static inline uint8_t inport_byte(uint16_t port)
36{
37 uint8_t ret;
38 __asm__ volatile ( "inb %1, %0"
39 : "=a" (ret)
40 : "Nd" (port) );
41 return ret;
42}
43
44static inline uint16_t inport_word(uint16_t port)
45{
46 uint16_t ret;
47 __asm__ volatile ( "inw %1, %0"
48 : "=a" (ret)
49 : "Nd" (port) );
50 return ret;
51}
52
53static inline uint32_t inport_long(uint16_t port)
54{
55 uint32_t ret;
56 __asm__ volatile ( "inl %1, %0"
57 : "=a" (ret)
58 : "Nd" (port) );
59 return ret;
60}
61
62static inline void outport_byte(uint16_t port, uint8_t val)
63{
64 __asm__ volatile ( "outb %0, %1" : : "a" (val), "Nd" (port) );
65}
66
67static inline void outport_word(uint16_t port, uint16_t val)
68{
69 __asm__ volatile ( "outw %0, %1" : : "a" (val), "Nd" (port) );
70}
71
72static inline void outport_long(uint16_t port, uint32_t val)
73{
74 __asm__ volatile ( "outl %0, %1" : : "a" (val), "Nd" (port) );
75}
76
77static inline uint16_t amd64_get_cs(void)
78{
79 uint16_t segment = 0;
80
81 __asm__ volatile ( "movw %%cs, %0" : "=r" (segment) : "0" (segment) );
82
83 return segment;
84}
85
86static inline void amd64_set_cr3(uint64_t segment)
87{
88 __asm__ volatile ( "movq %0, %%cr3" : "=r" (segment) : "0" (segment) );
89}
90
91static inline void cpuid(
92 uint32_t code, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx
93) {
94 __asm__ volatile ( "cpuid"
95 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
96 : "a" (code) );
97}
98
99static inline uint64_t rdmsr(uint32_t msr)
100{
101 uint32_t low, high;
102 __asm__ volatile ( "rdmsr" :
103 "=a" (low), "=d" (high) :
104 "c" (msr) );
105 return low | (uint64_t) high << 32;
106}
107
108static inline void wrmsr(uint32_t msr, uint32_t low, uint32_t high)
109{
110 __asm__ volatile ( "wrmsr" : :
111 "a" (low), "d" (high), "c" (msr) );
112}
113
114static inline void amd64_enable_interrupts(void)
115{
116 __asm__ volatile ( "sti" );
117}
118
119static inline void amd64_disable_interrupts(void)
120{
121 __asm__ volatile ( "cli" );
122}
123
124static inline void stub_io_wait(void)
125{
126 /* XXX: This likely won't be required on any modern boards, but this function
127 * exists so it's easier to find all the places it may be used.
128 */
129}
130
131static inline void amd64_spinwait(void)
132{
133 __asm__ volatile("pause" : : : "memory");
134}
135
136#endif /* !ASM */
137
138#endif
This header file provides basic definitions used by the API and the implementation.
Definition: inftrees.h:24