This header file defines implementation interfaces pertaining to the port of the executive to the ARM architecture.
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#define | CPU_SIMPLE_VECTORED_INTERRUPTS FALSE |
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#define | CPU_ISR_PASSES_FRAME_POINTER FALSE |
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#define | CPU_HARDWARE_FP FALSE |
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#define | CPU_SOFTWARE_FP FALSE |
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#define | CPU_ALL_TASKS_ARE_FP FALSE |
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#define | CPU_IDLE_TASK_IS_FP FALSE |
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#define | CPU_USE_DEFERRED_FP_SWITCH FALSE |
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#define | CPU_ENABLE_ROBUST_THREAD_DISPATCH TRUE |
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#define | CPU_STACK_GROWS_UP FALSE |
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#define | CPU_CACHE_LINE_BYTES 32 |
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#define | CPU_STRUCTURE_ALIGNMENT RTEMS_ALIGNED( CPU_CACHE_LINE_BYTES ) |
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#define | CPU_MODES_INTERRUPT_MASK 0x1 |
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#define | CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 |
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#define | CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE |
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#define | CPU_STACK_MINIMUM_SIZE (1024 * 4) |
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#define | CPU_SIZEOF_POINTER 4 |
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#define | CPU_ALIGNMENT 8 |
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#define | CPU_HEAP_ALIGNMENT CPU_ALIGNMENT |
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#define | CPU_STACK_ALIGNMENT 8 |
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#define | CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES |
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#define | CPU_USE_GENERIC_BITFIELD_CODE TRUE |
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#define | CPU_USE_LIBC_INIT_FINI_ARRAY TRUE |
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#define | CPU_MAXIMUM_PROCESSORS 32 |
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#define | ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET 44 |
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#define | ARM_EXCEPTION_FRAME_SIZE 80 |
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#define | ARM_EXCEPTION_FRAME_REGISTER_R8_OFFSET 32 |
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#define | ARM_EXCEPTION_FRAME_REGISTER_SP_OFFSET 52 |
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#define | ARM_EXCEPTION_FRAME_REGISTER_PC_OFFSET 60 |
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#define | ARM_EXCEPTION_FRAME_VFP_CONTEXT_OFFSET 72 |
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#define | ARM_VFP_CONTEXT_SIZE 264 |
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#define | _CPU_ISR_Disable(_isr_cookie) |
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#define | _CPU_ISR_Enable(_isr_cookie) arm_interrupt_enable( _isr_cookie ) |
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#define | _CPU_ISR_Flash(_isr_cookie) arm_interrupt_flash( _isr_cookie ) |
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#define | _CPU_Context_Get_SP(_context) (_context)->register_sp |
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#define | _CPU_Context_Restart_self(_the_context) _CPU_Context_restore( (_the_context) ); |
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#define | _CPU_Context_Initialize_fp(_destination) |
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void | _CPU_ISR_Set_level (uint32_t level) |
| Sets the hardware interrupt level by the level value.
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uint32_t | _CPU_ISR_Get_level (void) |
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void | _CPU_Context_Initialize (Context_Control *the_context, void *stack_area_begin, size_t stack_area_size, uint32_t new_level, void(*entry_point)(void), bool is_fp, void *tls_area) |
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void | _CPU_Initialize (void) |
| CPU initialization.
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void | _CPU_ISR_install_vector (uint32_t vector, CPU_ISR_handler new_handler, CPU_ISR_handler *old_handler) |
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void | _CPU_Context_switch (Context_Control *run, Context_Control *heir) |
| CPU switch context.
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RTEMS_NO_RETURN void | _CPU_Context_switch_no_return (Context_Control *executing, Context_Control *heir) |
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RTEMS_NO_RETURN void | _CPU_Context_restore (Context_Control *new_context) |
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uint32_t | _CPU_Counter_frequency (void) |
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CPU_Counter_ticks | _CPU_Counter_read (void) |
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RTEMS_NO_RETURN void * | _CPU_Thread_Idle_body (uintptr_t ignored) |
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void | _CPU_Exception_frame_print (const CPU_Exception_frame *frame) |
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RTEMS_NO_RETURN void | _ARM_Exception_default (CPU_Exception_frame *frame) |
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This header file defines implementation interfaces pertaining to the port of the executive to the ARM architecture.