RTEMS 6.1-rc7
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fsl_device_registers.h
1/*
2 * Copyright 2014-2016 Freescale Semiconductor, Inc.
3 * Copyright 2016-2021 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 *
8 */
9
10#ifndef __FSL_DEVICE_REGISTERS_H__
11#define __FSL_DEVICE_REGISTERS_H__
12
13#ifdef __rtems__
14#include <bspopts.h>
15#endif /* __rtems__ */
16/*
17 * Include the cpu specific register header files.
18 *
19 * The CPU macro should be declared in the project or makefile.
20 */
21#if (defined(CPU_MIMXRT1166CVM5A_cm7) || defined(CPU_MIMXRT1166DVM6A_cm7) || defined(CPU_MIMXRT1166XVM5A_cm7))
22
23#define MIMXRT1166_cm7_SERIES
24
25/* CMSIS-style register definitions */
26#include "MIMXRT1166_cm7.h"
27/* CPU specific feature definitions */
28#include "MIMXRT1166_cm7_features.h"
29
30#elif (defined(CPU_MIMXRT1166CVM5A_cm4) || defined(CPU_MIMXRT1166DVM6A_cm4) || defined(CPU_MIMXRT1166XVM5A_cm4))
31
32#define MIMXRT1166_cm4_SERIES
33
34/* CMSIS-style register definitions */
35#include "MIMXRT1166_cm4.h"
36/* CPU specific feature definitions */
37#include "MIMXRT1166_cm4_features.h"
38
39#else
40 #error "No valid CPU defined!"
41#endif
42
43#endif /* __FSL_DEVICE_REGISTERS_H__ */
44
45/*******************************************************************************
46 * EOF
47 ******************************************************************************/
CMSIS Peripheral Access Layer for MIMXRT1166_cm4.
CMSIS Peripheral Access Layer for MIMXRT1166_cm7.