42#ifndef LIBBSP_ARM_TMS570_IRQ_H
43#define LIBBSP_ARM_TMS570_IRQ_H
51#define TMS570_IRQ_ESM_HIGH 0
52#define TMS570_IRQ_RESERVED_0 1
53#define TMS570_IRQ_TIMER_0 2
54#define TMS570_IRQ_TIMER_1 3
55#define TMS570_IRQ_TIMER_2 4
56#define TMS570_IRQ_TIMER_3 5
57#define TMS570_IRQ_RTI_OVERFLOW_0 6
58#define TMS570_IRQ_RTI_OVERFLOW_1 7
59#define TMS570_IRQ_RTI_TIMEBASE 8
60#define TMS570_IRQ_GIO_HIGH 9
61#define TMS570_IRQ_HET_HIGH 10
62#define TMS570_IRQ_HET_TU_HIGH 11
63#define TMS570_IRQ_MIBSPI1_HIGH 12
64#define TMS570_IRQ_SCI_LEVEL_0 13
65#define TMS570_IRQ_ADC1_EVENT 14
66#define TMS570_IRQ_ADC1_GROUP_1 15
67#define TMS570_IRQ_CAN1_HIGH 16
68#define TMS570_IRQ_RESERVED_1 17
69#define TMS570_IRQ_FLEXRAY_HIGH 18
70#define TMS570_IRQ_CRC_1 19
71#define TMS570_IRQ_ESM_LOW 20
72#define TMS570_IRQ_SSI 21
73#define TMS570_IRQ_PMU 22
74#define TMS570_IRQ_GIO_LOW 23
75#define TMS570_IRQ_HET_LOW 24
76#define TMS570_IRQ_HET_TU_LOW 25
77#define TMS570_IRQ_MIBSPI1_LOW 26
78#define TMS570_IRQ_SCI_LEVEL_1 27
79#define TMS570_IRQ_ADC1_GROUP_2 28
80#define TMS570_IRQ_CAN1_LOW 29
81#define TMS570_IRQ_RESERVED_2 30
82#define TMS570_IRQ_ADC1_MAG 31
83#define TMS570_IRQ_FLEXRAY_LOW 32
84#define TMS570_IRQ_DMA_FTCA 33
85#define TMS570_IRQ_DMA_LFSA 34
86#define TMS570_IRQ_CAN2_HIGH 35
87#define TMS570_IRQ_DMM_HIGH 36
88#define TMS570_IRQ_MIBSPI3_HIGH 37
89#define TMS570_IRQ_MIBSPI3_LOW 38
90#define TMS570_IRQ_DMA_HBCA 39
91#define TMS570_IRQ_DMA_BTCA 40
92#define TMS570_IRQ_DMA_BERA 41
93#define TMS570_IRQ_CAN2_LOW 42
94#define TMS570_IRQ_DMM_LOW 43
95#define TMS570_IRQ_CAN1_IF3 44
96#define TMS570_IRQ_CAN3_HIGH 45
97#define TMS570_IRQ_CAN2_IF3 46
98#define TMS570_IRQ_FPU 47
99#define TMS570_IRQ_FLEXRAY_TU 48
100#define TMS570_IRQ_SPI4_HIGH 49
101#define TMS570_IRQ_ADC2_EVENT 50
102#define TMS570_IRQ_ADC2_GROUP_1 51
103#define TMS570_IRQ_FLEXRAY_T0C 52
104#define TMS570_IRQ_MIBSPIP5_HIGH 53
105#define TMS570_IRQ_SPI4_LOW 54
106#define TMS570_IRQ_CAN3_LOW 55
107#define TMS570_IRQ_MIBSPIP5_LOW 56
108#define TMS570_IRQ_ADC2_GROUP_2 57
109#define TMS570_IRQ_FLEXRAY_TU_ERROR 58
110#define TMS570_IRQ_ADC2_MAG 59
111#define TMS570_IRQ_CAN3_IF3 60
112#define TMS570_IRQ_FSM_DONE 61
113#define TMS570_IRQ_FLEXRAY_T1C 62
114#define TMS570_IRQ_HET2_LEVEL_0 63
115#define TMS570_IRQ_SCI2_LEVEL_0 64
116#define TMS570_IRQ_HET_TU2_LEVEL_0 65
117#define TMS570_IRQ_IC2_INTERRUPT 66
118#define TMS570_IRQ_HET2_LEVEL_1 73
119#define TMS570_IRQ_SCI2_LEVEL_1 74
120#define TMS570_IRQ_HET_TU2_LEVEL_1 75
121#define TMS570_IRQ_EMAC_MISC 76
122#define TMS570_IRQ_EMAC_TX 77
123#define TMS570_IRQ_EMAC_THRESH 78
124#define TMS570_IRQ_EMAC_RX 79
125#define TMS570_IRQ_HWAG1_INT_REQ_H 80
126#define TMS570_IRQ_HWAG2_INT_REQ_H 81
127#define TMS570_IRQ_DCC_DONE_INTERRUPT 82
128#define TMS570_IRQ_DCC2_DONE_INTERRUPT 83
129#define TMS570_IRQ_HWAG1_INT_REQ_L 88
130#define TMS570_IRQ_HWAG2_INT_REQ_L 89
131#define BSP_INTERRUPT_VECTOR_COUNT 95
133#define TMS570_IRQ_PRIORITY_VALUE_MIN 0U
134#define TMS570_IRQ_PRIORITY_VALUE_MAX 0U
136#define TMS570_IRQ_PRIORITY_COUNT ( TMS570_IRQ_PRIORITY_VALUE_MAX + 1U )
137#define TMS570_IRQ_PRIORITY_HIGHEST TMS570_IRQ_PRIORITY_VALUE_MIN
138#define TMS570_IRQ_PRIORITY_LOWEST TMS570_IRQ_PRIORITY_VALUE_MAX
rtems_status_code tms570_irq_get_priority(rtems_vector_number vector, uint32_t *priority)
Gets the priority of the interrupt vector.
rtems_status_code tms570_irq_set_priority(rtems_vector_number vector, uint32_t priority)
Sets the priority of the interrupt vector.
Definition: irq.c:67
ISR_Vector_number rtems_vector_number
This integer type represents interrupt vector numbers.
Definition: intr.h:102
rtems_status_code
This enumeration provides status codes for directives of the Classic API.
Definition: status.h:85
This header file is provided for backward compatiblility.
This header file defines the RTEMS Classic API.