RTEMS 6.1-rc7
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Data Fields

Serial Peripheral Interface. More...

#include <stm32h723xx.h>

Data Fields

__IO uint32_t CR1
 
__IO uint32_t CR2
 
__IO uint32_t CFG1
 
__IO uint32_t CFG2
 
__IO uint32_t IER
 
__IO uint32_t SR
 
__IO uint32_t IFCR
 
uint32_t RESERVED0
 
__IO uint32_t TXDR
 
uint32_t RESERVED1 [3]
 
__IO uint32_t RXDR
 
uint32_t RESERVED2 [3]
 
__IO uint32_t CRCPOLY
 
__IO uint32_t TXCRC
 
__IO uint32_t RXCRC
 
__IO uint32_t UDRDR
 
__IO uint32_t I2SCFGR
 

Detailed Description

Serial Peripheral Interface.

Field Documentation

◆ CFG1

__IO uint32_t SPI_TypeDef::CFG1

SPI Configuration register 1, Address offset: 0x08

◆ CFG2

__IO uint32_t SPI_TypeDef::CFG2

SPI Configuration register 2, Address offset: 0x0C

◆ CR1

__IO uint32_t SPI_TypeDef::CR1

SPI/I2S Control register 1, Address offset: 0x00

◆ CR2

__IO uint32_t SPI_TypeDef::CR2

SPI Control register 2, Address offset: 0x04

◆ CRCPOLY

__IO uint32_t SPI_TypeDef::CRCPOLY

SPI CRC Polynomial register, Address offset: 0x40

◆ I2SCFGR

__IO uint32_t SPI_TypeDef::I2SCFGR

I2S Configuration register, Address offset: 0x50

◆ IER

__IO uint32_t SPI_TypeDef::IER

SPI/I2S Interrupt Enable register, Address offset: 0x10

◆ IFCR

__IO uint32_t SPI_TypeDef::IFCR

SPI/I2S Interrupt/Status flags clear register, Address offset: 0x18

◆ RESERVED0

uint32_t SPI_TypeDef::RESERVED0

Reserved, 0x1C

◆ RESERVED1

uint32_t SPI_TypeDef::RESERVED1

Reserved, 0x24-0x2C

◆ RESERVED2

uint32_t SPI_TypeDef::RESERVED2

Reserved, 0x34-0x3C

◆ RXCRC

__IO uint32_t SPI_TypeDef::RXCRC

SPI Receiver CRC register, Address offset: 0x48

◆ RXDR

__IO uint32_t SPI_TypeDef::RXDR

SPI/I2S Receive data register, Address offset: 0x30

◆ SR

__IO uint32_t SPI_TypeDef::SR

SPI/I2S Status register, Address offset: 0x14

◆ TXCRC

__IO uint32_t SPI_TypeDef::TXCRC

SPI Transmitter CRC register, Address offset: 0x44

◆ TXDR

__IO uint32_t SPI_TypeDef::TXDR

SPI/I2S Transmit data register, Address offset: 0x20

◆ UDRDR

__IO uint32_t SPI_TypeDef::UDRDR

SPI Underrun data register, Address offset: 0x4C


The documentation for this struct was generated from the following files: