RTEMS 6.1-rc7
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Modules | Data Structures | Macros
ANADIG_PLL Peripheral Access Layer

Modules

 ANADIG_PLL Register Masks
 

Data Structures

struct  ANADIG_PLL_Type
 

Macros

#define ANADIG_PLL_BASE   (0x40C84000u)
 
#define ANADIG_PLL   ((ANADIG_PLL_Type *)ANADIG_PLL_BASE)
 
#define ANADIG_PLL_BASE_ADDRS   { ANADIG_PLL_BASE }
 
#define ANADIG_PLL_BASE_PTRS   { ANADIG_PLL }
 
#define ANADIG_PLL_BASE   (0x40C84000u)
 
#define ANADIG_PLL   ((ANADIG_PLL_Type *)ANADIG_PLL_BASE)
 
#define ANADIG_PLL_BASE_ADDRS   { ANADIG_PLL_BASE }
 
#define ANADIG_PLL_BASE_PTRS   { ANADIG_PLL }
 

Detailed Description

Macro Definition Documentation

◆ ANADIG_PLL [1/2]

#define ANADIG_PLL   ((ANADIG_PLL_Type *)ANADIG_PLL_BASE)

Peripheral ANADIG_PLL base pointer

◆ ANADIG_PLL [2/2]

#define ANADIG_PLL   ((ANADIG_PLL_Type *)ANADIG_PLL_BASE)

Peripheral ANADIG_PLL base pointer

◆ ANADIG_PLL_BASE [1/2]

#define ANADIG_PLL_BASE   (0x40C84000u)

Peripheral ANADIG_PLL base address

◆ ANADIG_PLL_BASE [2/2]

#define ANADIG_PLL_BASE   (0x40C84000u)

Peripheral ANADIG_PLL base address

◆ ANADIG_PLL_BASE_ADDRS [1/2]

#define ANADIG_PLL_BASE_ADDRS   { ANADIG_PLL_BASE }

Array initializer of ANADIG_PLL peripheral base addresses

◆ ANADIG_PLL_BASE_ADDRS [2/2]

#define ANADIG_PLL_BASE_ADDRS   { ANADIG_PLL_BASE }

Array initializer of ANADIG_PLL peripheral base addresses

◆ ANADIG_PLL_BASE_PTRS [1/2]

#define ANADIG_PLL_BASE_PTRS   { ANADIG_PLL }

Array initializer of ANADIG_PLL peripheral base pointers

◆ ANADIG_PLL_BASE_PTRS [2/2]

#define ANADIG_PLL_BASE_PTRS   { ANADIG_PLL }

Array initializer of ANADIG_PLL peripheral base pointers