◆ CLRFR
__IO uint32_t SAI_Block_TypeDef::CLRFR |
SAI block x clear flag register, Address offset: 0x1C
◆ CR1
__IO uint32_t SAI_Block_TypeDef::CR1 |
SAI block x configuration register 1, Address offset: 0x04
◆ CR2
__IO uint32_t SAI_Block_TypeDef::CR2 |
SAI block x configuration register 2, Address offset: 0x08
◆ DR
__IO uint32_t SAI_Block_TypeDef::DR |
SAI block x data register, Address offset: 0x20
◆ FRCR
__IO uint32_t SAI_Block_TypeDef::FRCR |
SAI block x frame configuration register, Address offset: 0x0C
◆ IMR
__IO uint32_t SAI_Block_TypeDef::IMR |
SAI block x interrupt mask register, Address offset: 0x14
◆ SLOTR
__IO uint32_t SAI_Block_TypeDef::SLOTR |
SAI block x slot register, Address offset: 0x10
◆ SR
__IO uint32_t SAI_Block_TypeDef::SR |
SAI block x status register, Address offset: 0x18
The documentation for this struct was generated from the following files: