27#ifndef LIBBSP_ARM_BEAGLE_BSP_H
28#define LIBBSP_ARM_BEAGLE_BSP_H
49#include <libcpu/omap3.h>
50#include <libcpu/am335x.h>
54#define BSP_FEATURE_IRQ_EXTENSION
57#define UART_CLOCK 48000000
60#define mmio_read(a) (*(volatile uint32_t *)(a))
61#define mmio_write(a,v) (*(volatile uint32_t *)(a) = (v))
62#define mmio_set(a,v) mmio_write((a), mmio_read((a)) | (v))
63#define mmio_clear(a,v) mmio_write((a), mmio_read((a)) & ~(v))
65#define REG16(x)(*((volatile uint16_t *)(x)))
66#define REG(x)(*((volatile uint32_t *)(x)))
67#define BIT(x)(0x1 << (x))
69#define BITS(Start, End) (((1 << (End+1)) - 1) & ~((1 << (Start)) - 1))
71#define udelay(u) rtems_task_wake_after(1 + ((u)/rtems_configuration_get_microseconds_per_tick()))
77write32(uint32_t address, uint32_t value)
84read32(uint32_t address)
91set32(uint32_t address, uint32_t mask, uint32_t value)
94 val = read32(address);
98 val |= (value & mask);
99 write32(address, val);
104write16(uint32_t address, uint16_t value)
106 REG16(address) = value;
110static inline uint16_t
111read16(uint32_t address)
113 return REG16(address);
117static inline void dsb(
void)
119 __asm__
volatile(
"dsb" : : :
"memory");
123static inline void isb(
void)
125 __asm__
volatile(
"isb" : : :
"memory");
129static inline void flush_data_cache(
void)
133 "mcr p15, #0, r0, c7, c10, #4\n"
140#define __arch_getb(a) (*(volatile unsigned char *)(a))
141#define __arch_getw(a) (*(volatile unsigned short *)(a))
142#define __arch_getl(a) (*(volatile unsigned int *)(a))
144#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
145#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
146#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
148#define writeb(v,c) ({ unsigned char __v = v; __arch_putb(__v,c); __v; })
149#define writew(v,c) ({ unsigned short __v = v; __arch_putw(__v,c); __v; })
150#define writel(v,c) ({ unsigned int __v = v; __arch_putl(__v,c); __v; })
152#define readb(c) ({ unsigned char __v = __arch_getb(c); __v; })
153#define readw(c) ({ unsigned short __v = __arch_getw(c); __v; })
154#define readl(c) ({ unsigned int __v = __arch_getl(c); __v; })
156#define SYSTEM_CLOCK_12 12000000
157#define SYSTEM_CLOCK_13 13000000
158#define SYSTEM_CLOCK_192 19200000
159#define SYSTEM_CLOCK_96 96000000
161#if !defined(IS_DM3730) && !defined(IS_AM335X)
162#error Unrecognized BSP configured.
166#define BSP_DEVICEMEM_START 0x48000000
167#define BSP_DEVICEMEM_END 0x5F000000
171#define BSP_DEVICEMEM_START 0x44000000
172#define BSP_DEVICEMEM_END 0x57000000
177#define BSP_CONSOLE_UART 1
178#define BSP_CONSOLE_UART_BASE BEAGLE_BASE_UART_1
179#define BSP_CONSOLE_UART_IRQ OMAP3_UART1_IRQ
180#define BEAGLE_BASE_UART_1 0x44E09000
181#define BEAGLE_BASE_UART_2 0x48022000
182#define BEAGLE_BASE_UART_3 0x48024000
187#define BSP_CONSOLE_UART 3
188#define BSP_CONSOLE_UART_BASE BEAGLE_BASE_UART_3
189#define BSP_CONSOLE_UART_IRQ OMAP3_UART3_IRQ
190#define BEAGLE_BASE_UART_1 0x4806A000
191#define BEAGLE_BASE_UART_2 0x4806C000
192#define BEAGLE_BASE_UART_3 0x49020000
197#define BSP_GPIO_PIN_COUNT 128
198#define BSP_GPIO_PINS_PER_BANK 32
202#define BSP_GPIO_PIN_COUNT 192
203#define BSP_GPIO_PINS_PER_BANK 32
206#if BSP_START_COPY_FDT_FROM_U_BOOT
207#define BSP_FDT_IS_SUPPORTED
228static inline uint32_t read_sctlr(
void)
232 __asm__
volatile(
"mrc p15, 0, %[ctl], c1, c0, 0 @ Read SCTLR\n\t"
238static inline void write_sctlr(uint32_t ctl)
240 __asm__
volatile(
"mcr p15, 0, %[ctl], c1, c0, 0 @ Write SCTLR\n\t"
241 : : [ctl]
"r" (ctl));
246static inline uint32_t read_actlr(
void)
250 __asm__
volatile(
"mrc p15, 0, %[ctl], c1, c0, 1 @ Read ACTLR\n\t"
256static inline void write_actlr(uint32_t ctl)
258 __asm__
volatile(
"mcr p15, 0, %[ctl], c1, c0, 1 @ Write ACTLR\n\t"
259 : : [ctl]
"r" (ctl));
264static inline void write_ttbcr(uint32_t bcr)
266 __asm__
volatile(
"mcr p15, 0, %[bcr], c2, c0, 2 @ Write TTBCR\n\t"
267 : : [bcr]
"r" (bcr));
273static inline uint32_t read_dacr(
void)
277 __asm__
volatile(
"mrc p15, 0, %[dacr], c3, c0, 0 @ Read DACR\n\t"
278 : [dacr]
"=r" (dacr));
285static inline void write_dacr(uint32_t dacr)
287 __asm__
volatile(
"mcr p15, 0, %[dacr], c3, c0, 0 @ Write DACR\n\t"
288 : : [dacr]
"r" (dacr));
293static inline void refresh_tlb(
void)
298 __asm__
volatile(
"mcr p15, 0, %[zero], c8, c7, 0 @ TLBIALL\n\t"
303 __asm__
volatile(
"mcr p15, 0, %[zero], c7, c5, 0"
307 __asm__
volatile(
"mcr p15, 0, %[zero], c7, c5, 6"
315static inline uint32_t read_ttbr0(
void)
319 __asm__
volatile(
"mrc p15, 0, %[bar], c2, c0, 0 @ Read TTBR0\n\t"
322 return bar & ARM_TTBR_ADDR_MASK;
327static inline uint32_t read_ttbr0_unmasked(
void)
331 __asm__
volatile(
"mrc p15, 0, %[bar], c2, c0, 0 @ Read TTBR0\n\t"
338static inline void write_ttbr0(uint32_t bar)
346 uint32_t v = (bar & ARM_TTBR_ADDR_MASK ) | ARM_TTBR_FLAGS_CACHED;
347 __asm__
volatile(
"mcr p15, 0, %[bar], c2, c0, 0 @ Write TTBR0\n\t"
BeagleBone Black BSP definitions.
This header file provides the default definition of BSP_INITIAL_EXTENSION.
BSP_START_TEXT_SECTION void beagle_setup_mmu_and_cache(void)
Beagleboard specific set up of the MMU.
Definition: bspstartmmu.c:33
uint32_t phandle_t
Definition: ofw.h:56
This header file is provided for backward compatiblility.
This header file defines the RTEMS Classic API.