36#ifndef LIBBSP_ARM_REALVIEW_PBX_A9_IRQ_H
37#define LIBBSP_ARM_REALVIEW_PBX_A9_IRQ_H
59#define RVPBXA9_IRQ_WATCHDOG_0 32
60#define RVPBXA9_IRQ_SW_IRQ 33
61#define RVPBXA9_IRQ_TIMER_0_1 36
62#define RVPBXA9_IRQ_TIMER_2_3 37
63#define RVPBXA9_IRQ_GPIO_0 38
64#define RVPBXA9_IRQ_GPIO_1 39
65#define RVPBXA9_IRQ_GPIO_2 40
66#define RVPBXA9_IRQ_RTC 42
67#define RVPBXA9_IRQ_SSP 43
68#define RVPBXA9_IRQ_UART_0 44
69#define RVPBXA9_IRQ_UART_1 45
70#define RVPBXA9_IRQ_UART_2 46
71#define RVPBXA9_IRQ_UART_3 47
72#define RVPBXA9_IRQ_SCI 48
73#define RVPBXA9_IRQ_MCI_A 49
74#define RVPBXA9_IRQ_MCI_B 50
75#define RVPBXA9_IRQ_AACI 51
76#define RVPBXA9_IRQ_KMI0 52
77#define RVPBXA9_IRQ_KMI1 53
78#define RVPBXA9_IRQ_CLCD 55
79#define RVPBXA9_IRQ_DMAC 56
80#define RVPBXA9_IRQ_PWRFAIL 57
81#define RVPBXA9_IRQ_CF_INT 59
82#define RVPBXA9_IRQ_ETHERNET 60
83#define RVPBXA9_IRQ_USB 61
84#define RVPBXA9_IRQ_T1_INT_0 64
85#define RVPBXA9_IRQ_T1_INT_1 65
86#define RVPBXA9_IRQ_T1_INT_2 66
87#define RVPBXA9_IRQ_T1_INT_3 67
88#define RVPBXA9_IRQ_T1_INT_4 68
89#define RVPBXA9_IRQ_T1_INT_5 69
90#define RVPBXA9_IRQ_T1_INT_6 70
91#define RVPBXA9_IRQ_T1_INT_7 71
92#define RVPBXA9_IRQ_WATCHDOG_1 72
93#define RVPBXA9_IRQ_TIMER_4_5 73
94#define RVPBXA9_IRQ_TIMER_6_7 74
95#define RVPBXA9_IRQ_PCI_INTR 80
96#define RVPBXA9_IRQ_P_NMI 81
97#define RVPBXA9_IRQ_P_NINT_0 82
98#define RVPBXA9_IRQ_P_NINT_1 83
99#define RVPBXA9_IRQ_P_NINT_2 84
100#define RVPBXA9_IRQ_P_NINT_3 85
101#define RVPBXA9_IRQ_P_NINT_4 86
102#define RVPBXA9_IRQ_P_NINT_5 87
103#define RVPBXA9_IRQ_P_NINT_6 88
104#define RVPBXA9_IRQ_P_NINT_7 89
106#define BSP_INTERRUPT_VECTOR_COUNT 90
This header file provides the interfaces of the Cortex-A9 MPCore Support.
This header file provides interfaces of the ARM Generic Interrupt Controller (GIC) support.
This header file is provided for backward compatiblility.