RTEMS 6.1-rc7
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Modules | Data Structures | Macros
IOMUXC_LPSR_GPR Peripheral Access Layer

Modules

 IOMUXC_LPSR_GPR Register Masks
 

Data Structures

struct  IOMUXC_LPSR_GPR_Type
 

Macros

#define IOMUXC_LPSR_GPR_BASE   (0x40C0C000u)
 
#define IOMUXC_LPSR_GPR   ((IOMUXC_LPSR_GPR_Type *)IOMUXC_LPSR_GPR_BASE)
 
#define IOMUXC_LPSR_GPR_BASE_ADDRS   { IOMUXC_LPSR_GPR_BASE }
 
#define IOMUXC_LPSR_GPR_BASE_PTRS   { IOMUXC_LPSR_GPR }
 
#define IOMUXC_LPSR_GPR_BASE   (0x40C0C000u)
 
#define IOMUXC_LPSR_GPR   ((IOMUXC_LPSR_GPR_Type *)IOMUXC_LPSR_GPR_BASE)
 
#define IOMUXC_LPSR_GPR_BASE_ADDRS   { IOMUXC_LPSR_GPR_BASE }
 
#define IOMUXC_LPSR_GPR_BASE_PTRS   { IOMUXC_LPSR_GPR }
 

Detailed Description

Macro Definition Documentation

◆ IOMUXC_LPSR_GPR [1/2]

#define IOMUXC_LPSR_GPR   ((IOMUXC_LPSR_GPR_Type *)IOMUXC_LPSR_GPR_BASE)

Peripheral IOMUXC_LPSR_GPR base pointer

◆ IOMUXC_LPSR_GPR [2/2]

#define IOMUXC_LPSR_GPR   ((IOMUXC_LPSR_GPR_Type *)IOMUXC_LPSR_GPR_BASE)

Peripheral IOMUXC_LPSR_GPR base pointer

◆ IOMUXC_LPSR_GPR_BASE [1/2]

#define IOMUXC_LPSR_GPR_BASE   (0x40C0C000u)

Peripheral IOMUXC_LPSR_GPR base address

◆ IOMUXC_LPSR_GPR_BASE [2/2]

#define IOMUXC_LPSR_GPR_BASE   (0x40C0C000u)

Peripheral IOMUXC_LPSR_GPR base address

◆ IOMUXC_LPSR_GPR_BASE_ADDRS [1/2]

#define IOMUXC_LPSR_GPR_BASE_ADDRS   { IOMUXC_LPSR_GPR_BASE }

Array initializer of IOMUXC_LPSR_GPR peripheral base addresses

◆ IOMUXC_LPSR_GPR_BASE_ADDRS [2/2]

#define IOMUXC_LPSR_GPR_BASE_ADDRS   { IOMUXC_LPSR_GPR_BASE }

Array initializer of IOMUXC_LPSR_GPR peripheral base addresses

◆ IOMUXC_LPSR_GPR_BASE_PTRS [1/2]

#define IOMUXC_LPSR_GPR_BASE_PTRS   { IOMUXC_LPSR_GPR }

Array initializer of IOMUXC_LPSR_GPR peripheral base pointers

◆ IOMUXC_LPSR_GPR_BASE_PTRS [2/2]

#define IOMUXC_LPSR_GPR_BASE_PTRS   { IOMUXC_LPSR_GPR }

Array initializer of IOMUXC_LPSR_GPR peripheral base pointers