37#ifndef _RTEMS_SCORE_CPUIMPL_H
38#define _RTEMS_SCORE_CPUIMPL_H
40#include <rtems/score/cpu.h>
52#define CPU_PER_CPU_CONTROL_SIZE 0
54#define CPU_INTERRUPT_FRAME_SIZE 0x2E0
56#define CPU_THREAD_LOCAL_STORAGE_VARIANT 11
66 uint64_t register_lr_original;
89#ifdef AARCH64_MULTILIB_VFP
123 uint64_t register_elr;
124 uint64_t register_spsr;
125 uint64_t register_fpsr;
126 uint64_t register_fpcr;
138 "mrs %0, TPIDR_EL1" :
"=&r" ( value ) : :
"memory"
147#define _CPU_Get_current_per_CPU_control() \
148 _AARCH64_Get_current_per_CPU_control()
161uint64_t _AArch64_Get_current_processor_for_system_start(
void );
165void _CPU_Context_volatile_clobber( uintptr_t pattern );
167void _CPU_Context_validate( uintptr_t pattern );
169static inline void _CPU_Instruction_illegal(
void )
171 __asm__
volatile (
".inst 0x0" );
174static inline void _CPU_Instruction_no_operation(
void )
176 __asm__
volatile (
"nop" );
179static inline void _CPU_Use_thread_local_storage(
184 "msr TPIDR_EL0, %0" : :
"r" (
context->thread_id ) :
"memory"
188static inline void *_CPU_Get_TLS_thread_pointer(
192 return (
void *)(uintptr_t)
context->thread_id;
rtems_termios_device_context * context
Definition: console-config.c:62
Interrupt stack frame (ISF).
Definition: cpuimpl.h:64
Thread register context.
Definition: cpu.h:173
Per CPU Core Structure.
Definition: percpu.h:384