RTEMS 6.1-rc7
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fsl_iomuxc.h
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1/*
2 * Copyright 2016 Freescale Semiconductor, Inc.
3 * Copyright 2016-2021 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#ifndef _FSL_IOMUXC_H_
10#define _FSL_IOMUXC_H_
11
12#include "fsl_common.h"
13
21/*******************************************************************************
22 * Definitions
23 ******************************************************************************/
24/* Component ID definition, used by tools. */
25#ifndef FSL_COMPONENT_ID
26#define FSL_COMPONENT_ID "platform.drivers.iomuxc"
27#endif
28
32#define FSL_IOMUXC_DRIVER_VERSION (MAKE_VERSION(2, 0, 3))
41#define IOMUXC_GPIO_EMC_00_SEMC_DA00 0x401F8014U, 0x0U, 0, 0, 0x401F8204U
42#define IOMUXC_GPIO_EMC_00_FLEXPWM4_PWM0_A 0x401F8014U, 0x1U, 0x401F8494U, 0x0U, 0x401F8204U
43#define IOMUXC_GPIO_EMC_00_LPSPI2_SCK 0x401F8014U, 0x2U, 0x401F8500U, 0x1U, 0x401F8204U
44#define IOMUXC_GPIO_EMC_00_XBAR1_IN02 0x401F8014U, 0x3U, 0x401F860CU, 0x0U, 0x401F8204U
45#define IOMUXC_GPIO_EMC_00_FLEXIO1_D00 0x401F8014U, 0x4U, 0, 0, 0x401F8204U
46#define IOMUXC_GPIO_EMC_00_GPIO4_IO00 0x401F8014U, 0x5U, 0, 0, 0x401F8204U
47
48#define IOMUXC_GPIO_EMC_01_SEMC_DA01 0x401F8018U, 0x0U, 0, 0, 0x401F8208U
49#define IOMUXC_GPIO_EMC_01_FLEXPWM4_PWM0_B 0x401F8018U, 0x1U, 0, 0, 0x401F8208U
50#define IOMUXC_GPIO_EMC_01_LPSPI2_PCS0 0x401F8018U, 0x2U, 0x401F84FCU, 0x1U, 0x401F8208U
51#define IOMUXC_GPIO_EMC_01_XBAR1_IN03 0x401F8018U, 0x3U, 0x401F8610U, 0x0U, 0x401F8208U
52#define IOMUXC_GPIO_EMC_01_FLEXIO1_D01 0x401F8018U, 0x4U, 0, 0, 0x401F8208U
53#define IOMUXC_GPIO_EMC_01_GPIO4_IO01 0x401F8018U, 0x5U, 0, 0, 0x401F8208U
54
55#define IOMUXC_GPIO_EMC_02_SEMC_DA02 0x401F801CU, 0x0U, 0, 0, 0x401F820CU
56#define IOMUXC_GPIO_EMC_02_FLEXPWM4_PWM1_A 0x401F801CU, 0x1U, 0x401F8498U, 0x0U, 0x401F820CU
57#define IOMUXC_GPIO_EMC_02_LPSPI2_SDO 0x401F801CU, 0x2U, 0x401F8508U, 0x1U, 0x401F820CU
58#define IOMUXC_GPIO_EMC_02_XBAR1_INOUT04 0x401F801CU, 0x3U, 0x401F8614U, 0x0U, 0x401F820CU
59#define IOMUXC_GPIO_EMC_02_FLEXIO1_D02 0x401F801CU, 0x4U, 0, 0, 0x401F820CU
60#define IOMUXC_GPIO_EMC_02_GPIO4_IO02 0x401F801CU, 0x5U, 0, 0, 0x401F820CU
61
62#define IOMUXC_GPIO_EMC_03_SEMC_DA03 0x401F8020U, 0x0U, 0, 0, 0x401F8210U
63#define IOMUXC_GPIO_EMC_03_FLEXPWM4_PWM1_B 0x401F8020U, 0x1U, 0, 0, 0x401F8210U
64#define IOMUXC_GPIO_EMC_03_LPSPI2_SDI 0x401F8020U, 0x2U, 0x401F8504U, 0x1U, 0x401F8210U
65#define IOMUXC_GPIO_EMC_03_XBAR1_INOUT05 0x401F8020U, 0x3U, 0x401F8618U, 0x0U, 0x401F8210U
66#define IOMUXC_GPIO_EMC_03_FLEXIO1_D03 0x401F8020U, 0x4U, 0, 0, 0x401F8210U
67#define IOMUXC_GPIO_EMC_03_GPIO4_IO03 0x401F8020U, 0x5U, 0, 0, 0x401F8210U
68
69#define IOMUXC_GPIO_EMC_04_SEMC_DA04 0x401F8024U, 0x0U, 0, 0, 0x401F8214U
70#define IOMUXC_GPIO_EMC_04_FLEXPWM4_PWM2_A 0x401F8024U, 0x1U, 0x401F849CU, 0x0U, 0x401F8214U
71#define IOMUXC_GPIO_EMC_04_SAI2_TX_DATA 0x401F8024U, 0x2U, 0, 0, 0x401F8214U
72#define IOMUXC_GPIO_EMC_04_XBAR1_INOUT06 0x401F8024U, 0x3U, 0x401F861CU, 0x0U, 0x401F8214U
73#define IOMUXC_GPIO_EMC_04_FLEXIO1_D04 0x401F8024U, 0x4U, 0, 0, 0x401F8214U
74#define IOMUXC_GPIO_EMC_04_GPIO4_IO04 0x401F8024U, 0x5U, 0, 0, 0x401F8214U
75
76#define IOMUXC_GPIO_EMC_05_SEMC_DA05 0x401F8028U, 0x0U, 0, 0, 0x401F8218U
77#define IOMUXC_GPIO_EMC_05_FLEXPWM4_PWM2_B 0x401F8028U, 0x1U, 0, 0, 0x401F8218U
78#define IOMUXC_GPIO_EMC_05_SAI2_TX_SYNC 0x401F8028U, 0x2U, 0x401F85C4U, 0x0U, 0x401F8218U
79#define IOMUXC_GPIO_EMC_05_XBAR1_INOUT07 0x401F8028U, 0x3U, 0x401F8620U, 0x0U, 0x401F8218U
80#define IOMUXC_GPIO_EMC_05_FLEXIO1_D05 0x401F8028U, 0x4U, 0, 0, 0x401F8218U
81#define IOMUXC_GPIO_EMC_05_GPIO4_IO05 0x401F8028U, 0x5U, 0, 0, 0x401F8218U
82
83#define IOMUXC_GPIO_EMC_06_SEMC_DA06 0x401F802CU, 0x0U, 0, 0, 0x401F821CU
84#define IOMUXC_GPIO_EMC_06_FLEXPWM2_PWM0_A 0x401F802CU, 0x1U, 0x401F8478U, 0x0U, 0x401F821CU
85#define IOMUXC_GPIO_EMC_06_SAI2_TX_BCLK 0x401F802CU, 0x2U, 0x401F85C0U, 0x0U, 0x401F821CU
86#define IOMUXC_GPIO_EMC_06_XBAR1_INOUT08 0x401F802CU, 0x3U, 0x401F8624U, 0x0U, 0x401F821CU
87#define IOMUXC_GPIO_EMC_06_FLEXIO1_D06 0x401F802CU, 0x4U, 0, 0, 0x401F821CU
88#define IOMUXC_GPIO_EMC_06_GPIO4_IO06 0x401F802CU, 0x5U, 0, 0, 0x401F821CU
89
90#define IOMUXC_GPIO_EMC_07_SEMC_DA07 0x401F8030U, 0x0U, 0, 0, 0x401F8220U
91#define IOMUXC_GPIO_EMC_07_FLEXPWM2_PWM0_B 0x401F8030U, 0x1U, 0x401F8488U, 0x0U, 0x401F8220U
92#define IOMUXC_GPIO_EMC_07_SAI2_MCLK 0x401F8030U, 0x2U, 0x401F85B0U, 0x0U, 0x401F8220U
93#define IOMUXC_GPIO_EMC_07_XBAR1_INOUT09 0x401F8030U, 0x3U, 0x401F8628U, 0x0U, 0x401F8220U
94#define IOMUXC_GPIO_EMC_07_FLEXIO1_D07 0x401F8030U, 0x4U, 0, 0, 0x401F8220U
95#define IOMUXC_GPIO_EMC_07_GPIO4_IO07 0x401F8030U, 0x5U, 0, 0, 0x401F8220U
96
97#define IOMUXC_GPIO_EMC_08_SEMC_DM00 0x401F8034U, 0x0U, 0, 0, 0x401F8224U
98#define IOMUXC_GPIO_EMC_08_FLEXPWM2_PWM1_A 0x401F8034U, 0x1U, 0x401F847CU, 0x0U, 0x401F8224U
99#define IOMUXC_GPIO_EMC_08_SAI2_RX_DATA 0x401F8034U, 0x2U, 0x401F85B8U, 0x0U, 0x401F8224U
100#define IOMUXC_GPIO_EMC_08_XBAR1_INOUT17 0x401F8034U, 0x3U, 0x401F862CU, 0x0U, 0x401F8224U
101#define IOMUXC_GPIO_EMC_08_FLEXIO1_D08 0x401F8034U, 0x4U, 0, 0, 0x401F8224U
102#define IOMUXC_GPIO_EMC_08_GPIO4_IO08 0x401F8034U, 0x5U, 0, 0, 0x401F8224U
103
104#define IOMUXC_GPIO_EMC_09_SEMC_ADDR00 0x401F8038U, 0x0U, 0, 0, 0x401F8228U
105#define IOMUXC_GPIO_EMC_09_FLEXPWM2_PWM1_B 0x401F8038U, 0x1U, 0x401F848CU, 0x0U, 0x401F8228U
106#define IOMUXC_GPIO_EMC_09_SAI2_RX_SYNC 0x401F8038U, 0x2U, 0x401F85BCU, 0x0U, 0x401F8228U
107#define IOMUXC_GPIO_EMC_09_FLEXCAN2_TX 0x401F8038U, 0x3U, 0, 0, 0x401F8228U
108#define IOMUXC_GPIO_EMC_09_FLEXIO1_D09 0x401F8038U, 0x4U, 0, 0, 0x401F8228U
109#define IOMUXC_GPIO_EMC_09_GPIO4_IO09 0x401F8038U, 0x5U, 0, 0, 0x401F8228U
110
111#define IOMUXC_GPIO_EMC_10_SEMC_ADDR01 0x401F803CU, 0x0U, 0, 0, 0x401F822CU
112#define IOMUXC_GPIO_EMC_10_FLEXPWM2_PWM2_A 0x401F803CU, 0x1U, 0x401F8480U, 0x0U, 0x401F822CU
113#define IOMUXC_GPIO_EMC_10_SAI2_RX_BCLK 0x401F803CU, 0x2U, 0x401F85B4U, 0x0U, 0x401F822CU
114#define IOMUXC_GPIO_EMC_10_FLEXCAN2_RX 0x401F803CU, 0x3U, 0x401F8450U, 0x0U, 0x401F822CU
115#define IOMUXC_GPIO_EMC_10_FLEXIO1_D10 0x401F803CU, 0x4U, 0, 0, 0x401F822CU
116#define IOMUXC_GPIO_EMC_10_GPIO4_IO10 0x401F803CU, 0x5U, 0, 0, 0x401F822CU
117
118#define IOMUXC_GPIO_EMC_11_SEMC_ADDR02 0x401F8040U, 0x0U, 0, 0, 0x401F8230U
119#define IOMUXC_GPIO_EMC_11_FLEXPWM2_PWM2_B 0x401F8040U, 0x1U, 0x401F8490U, 0x0U, 0x401F8230U
120#define IOMUXC_GPIO_EMC_11_LPI2C4_SDA 0x401F8040U, 0x2U, 0x401F84E8U, 0x0U, 0x401F8230U
121#define IOMUXC_GPIO_EMC_11_USDHC2_RESET_B 0x401F8040U, 0x3U, 0, 0, 0x401F8230U
122#define IOMUXC_GPIO_EMC_11_FLEXIO1_D11 0x401F8040U, 0x4U, 0, 0, 0x401F8230U
123#define IOMUXC_GPIO_EMC_11_GPIO4_IO11 0x401F8040U, 0x5U, 0, 0, 0x401F8230U
124
125#define IOMUXC_GPIO_EMC_12_SEMC_ADDR03 0x401F8044U, 0x0U, 0, 0, 0x401F8234U
126#define IOMUXC_GPIO_EMC_12_XBAR1_IN24 0x401F8044U, 0x1U, 0x401F8640U, 0x0U, 0x401F8234U
127#define IOMUXC_GPIO_EMC_12_LPI2C4_SCL 0x401F8044U, 0x2U, 0x401F84E4U, 0x0U, 0x401F8234U
128#define IOMUXC_GPIO_EMC_12_USDHC1_WP 0x401F8044U, 0x3U, 0x401F85D8U, 0x0U, 0x401F8234U
129#define IOMUXC_GPIO_EMC_12_FLEXPWM1_PWM3_A 0x401F8044U, 0x4U, 0x401F8454U, 0x1U, 0x401F8234U
130#define IOMUXC_GPIO_EMC_12_GPIO4_IO12 0x401F8044U, 0x5U, 0, 0, 0x401F8234U
131
132#define IOMUXC_GPIO_EMC_13_SEMC_ADDR04 0x401F8048U, 0x0U, 0, 0, 0x401F8238U
133#define IOMUXC_GPIO_EMC_13_XBAR1_IN25 0x401F8048U, 0x1U, 0x401F8650U, 0x1U, 0x401F8238U
134#define IOMUXC_GPIO_EMC_13_LPUART3_TXD 0x401F8048U, 0x2U, 0x401F853CU, 0x1U, 0x401F8238U
135#define IOMUXC_GPIO_EMC_13_MQS_RIGHT 0x401F8048U, 0x3U, 0, 0, 0x401F8238U
136#define IOMUXC_GPIO_EMC_13_FLEXPWM1_PWM3_B 0x401F8048U, 0x4U, 0x401F8464U, 0x1U, 0x401F8238U
137#define IOMUXC_GPIO_EMC_13_GPIO4_IO13 0x401F8048U, 0x5U, 0, 0, 0x401F8238U
138
139#define IOMUXC_GPIO_EMC_14_SEMC_ADDR05 0x401F804CU, 0x0U, 0, 0, 0x401F823CU
140#define IOMUXC_GPIO_EMC_14_XBAR1_INOUT19 0x401F804CU, 0x1U, 0x401F8654U, 0x0U, 0x401F823CU
141#define IOMUXC_GPIO_EMC_14_LPUART3_RXD 0x401F804CU, 0x2U, 0x401F8538U, 0x1U, 0x401F823CU
142#define IOMUXC_GPIO_EMC_14_MQS_LEFT 0x401F804CU, 0x3U, 0, 0, 0x401F823CU
143#define IOMUXC_GPIO_EMC_14_LPSPI2_PCS1 0x401F804CU, 0x4U, 0, 0, 0x401F823CU
144#define IOMUXC_GPIO_EMC_14_GPIO4_IO14 0x401F804CU, 0x5U, 0, 0, 0x401F823CU
145
146#define IOMUXC_GPIO_EMC_15_SEMC_ADDR06 0x401F8050U, 0x0U, 0, 0, 0x401F8240U
147#define IOMUXC_GPIO_EMC_15_XBAR1_IN20 0x401F8050U, 0x1U, 0x401F8634U, 0x0U, 0x401F8240U
148#define IOMUXC_GPIO_EMC_15_LPUART3_CTS_B 0x401F8050U, 0x2U, 0x401F8534U, 0x0U, 0x401F8240U
149#define IOMUXC_GPIO_EMC_15_SPDIF_OUT 0x401F8050U, 0x3U, 0, 0, 0x401F8240U
150#define IOMUXC_GPIO_EMC_15_TMR3_TIMER0 0x401F8050U, 0x4U, 0x401F857CU, 0x0U, 0x401F8240U
151#define IOMUXC_GPIO_EMC_15_GPIO4_IO15 0x401F8050U, 0x5U, 0, 0, 0x401F8240U
152
153#define IOMUXC_GPIO_EMC_16_SEMC_ADDR07 0x401F8054U, 0x0U, 0, 0, 0x401F8244U
154#define IOMUXC_GPIO_EMC_16_XBAR1_IN21 0x401F8054U, 0x1U, 0x401F8658U, 0x0U, 0x401F8244U
155#define IOMUXC_GPIO_EMC_16_LPUART3_RTS_B 0x401F8054U, 0x2U, 0, 0, 0x401F8244U
156#define IOMUXC_GPIO_EMC_16_SPDIF_IN 0x401F8054U, 0x3U, 0x401F85C8U, 0x1U, 0x401F8244U
157#define IOMUXC_GPIO_EMC_16_TMR3_TIMER1 0x401F8054U, 0x4U, 0x401F8580U, 0x1U, 0x401F8244U
158#define IOMUXC_GPIO_EMC_16_GPIO4_IO16 0x401F8054U, 0x5U, 0, 0, 0x401F8244U
159
160#define IOMUXC_GPIO_EMC_17_SEMC_ADDR08 0x401F8058U, 0x0U, 0, 0, 0x401F8248U
161#define IOMUXC_GPIO_EMC_17_FLEXPWM4_PWM3_A 0x401F8058U, 0x1U, 0x401F84A0U, 0x0U, 0x401F8248U
162#define IOMUXC_GPIO_EMC_17_LPUART4_CTS_B 0x401F8058U, 0x2U, 0, 0, 0x401F8248U
163#define IOMUXC_GPIO_EMC_17_FLEXCAN1_TX 0x401F8058U, 0x3U, 0, 0, 0x401F8248U
164#define IOMUXC_GPIO_EMC_17_TMR3_TIMER2 0x401F8058U, 0x4U, 0x401F8584U, 0x0U, 0x401F8248U
165#define IOMUXC_GPIO_EMC_17_GPIO4_IO17 0x401F8058U, 0x5U, 0, 0, 0x401F8248U
166
167#define IOMUXC_GPIO_EMC_18_SEMC_ADDR09 0x401F805CU, 0x0U, 0, 0, 0x401F824CU
168#define IOMUXC_GPIO_EMC_18_FLEXPWM4_PWM3_B 0x401F805CU, 0x1U, 0, 0, 0x401F824CU
169#define IOMUXC_GPIO_EMC_18_LPUART4_RTS_B 0x401F805CU, 0x2U, 0, 0, 0x401F824CU
170#define IOMUXC_GPIO_EMC_18_FLEXCAN1_RX 0x401F805CU, 0x3U, 0x401F844CU, 0x1U, 0x401F824CU
171#define IOMUXC_GPIO_EMC_18_TMR3_TIMER3 0x401F805CU, 0x4U, 0x401F8588U, 0x0U, 0x401F824CU
172#define IOMUXC_GPIO_EMC_18_GPIO4_IO18 0x401F805CU, 0x5U, 0, 0, 0x401F824CU
173#define IOMUXC_GPIO_EMC_18_SNVS_VIO_5_CTL 0x401F805CU, 0x6U, 0, 0, 0x401F824CU
174
175#define IOMUXC_GPIO_EMC_19_SEMC_ADDR11 0x401F8060U, 0x0U, 0, 0, 0x401F8250U
176#define IOMUXC_GPIO_EMC_19_FLEXPWM2_PWM3_A 0x401F8060U, 0x1U, 0x401F8474U, 0x1U, 0x401F8250U
177#define IOMUXC_GPIO_EMC_19_LPUART4_TXD 0x401F8060U, 0x2U, 0x401F8544U, 0x1U, 0x401F8250U
178#define IOMUXC_GPIO_EMC_19_ENET_RX_DATA01 0x401F8060U, 0x3U, 0x401F8438U, 0x0U, 0x401F8250U
179#define IOMUXC_GPIO_EMC_19_TMR2_TIMER0 0x401F8060U, 0x4U, 0x401F856CU, 0x0U, 0x401F8250U
180#define IOMUXC_GPIO_EMC_19_GPIO4_IO19 0x401F8060U, 0x5U, 0, 0, 0x401F8250U
181#define IOMUXC_GPIO_EMC_19_SNVS_VIO_5 0x401F8060U, 0x6U, 0, 0, 0x401F8250U
182
183#define IOMUXC_GPIO_EMC_20_SEMC_ADDR12 0x401F8064U, 0x0U, 0, 0, 0x401F8254U
184#define IOMUXC_GPIO_EMC_20_FLEXPWM2_PWM3_B 0x401F8064U, 0x1U, 0x401F8484U, 0x1U, 0x401F8254U
185#define IOMUXC_GPIO_EMC_20_LPUART4_RXD 0x401F8064U, 0x2U, 0x401F8540U, 0x1U, 0x401F8254U
186#define IOMUXC_GPIO_EMC_20_ENET_RX_DATA00 0x401F8064U, 0x3U, 0x401F8434U, 0x0U, 0x401F8254U
187#define IOMUXC_GPIO_EMC_20_TMR2_TIMER1 0x401F8064U, 0x4U, 0x401F8570U, 0x0U, 0x401F8254U
188#define IOMUXC_GPIO_EMC_20_GPIO4_IO20 0x401F8064U, 0x5U, 0, 0, 0x401F8254U
189
190#define IOMUXC_GPIO_EMC_21_SEMC_BA0 0x401F8068U, 0x0U, 0, 0, 0x401F8258U
191#define IOMUXC_GPIO_EMC_21_FLEXPWM3_PWM3_A 0x401F8068U, 0x1U, 0, 0, 0x401F8258U
192#define IOMUXC_GPIO_EMC_21_LPI2C3_SDA 0x401F8068U, 0x2U, 0x401F84E0U, 0x0U, 0x401F8258U
193#define IOMUXC_GPIO_EMC_21_ENET_TX_DATA01 0x401F8068U, 0x3U, 0, 0, 0x401F8258U
194#define IOMUXC_GPIO_EMC_21_TMR2_TIMER2 0x401F8068U, 0x4U, 0x401F8574U, 0x0U, 0x401F8258U
195#define IOMUXC_GPIO_EMC_21_GPIO4_IO21 0x401F8068U, 0x5U, 0, 0, 0x401F8258U
196
197#define IOMUXC_GPIO_EMC_22_SEMC_BA1 0x401F806CU, 0x0U, 0, 0, 0x401F825CU
198#define IOMUXC_GPIO_EMC_22_FLEXPWM3_PWM3_B 0x401F806CU, 0x1U, 0, 0, 0x401F825CU
199#define IOMUXC_GPIO_EMC_22_LPI2C3_SCL 0x401F806CU, 0x2U, 0x401F84DCU, 0x0U, 0x401F825CU
200#define IOMUXC_GPIO_EMC_22_ENET_TX_DATA00 0x401F806CU, 0x3U, 0, 0, 0x401F825CU
201#define IOMUXC_GPIO_EMC_22_TMR2_TIMER3 0x401F806CU, 0x4U, 0x401F8578U, 0x0U, 0x401F825CU
202#define IOMUXC_GPIO_EMC_22_GPIO4_IO22 0x401F806CU, 0x5U, 0, 0, 0x401F825CU
203
204#define IOMUXC_GPIO_EMC_23_SEMC_ADDR10 0x401F8070U, 0x0U, 0, 0, 0x401F8260U
205#define IOMUXC_GPIO_EMC_23_FLEXPWM1_PWM0_A 0x401F8070U, 0x1U, 0x401F8458U, 0x0U, 0x401F8260U
206#define IOMUXC_GPIO_EMC_23_LPUART5_TXD 0x401F8070U, 0x2U, 0x401F854CU, 0x0U, 0x401F8260U
207#define IOMUXC_GPIO_EMC_23_ENET_RX_EN 0x401F8070U, 0x3U, 0x401F843CU, 0x0U, 0x401F8260U
208#define IOMUXC_GPIO_EMC_23_GPT1_CAPTURE2 0x401F8070U, 0x4U, 0, 0, 0x401F8260U
209#define IOMUXC_GPIO_EMC_23_GPIO4_IO23 0x401F8070U, 0x5U, 0, 0, 0x401F8260U
210
211#define IOMUXC_GPIO_EMC_24_SEMC_CAS 0x401F8074U, 0x0U, 0, 0, 0x401F8264U
212#define IOMUXC_GPIO_EMC_24_FLEXPWM1_PWM0_B 0x401F8074U, 0x1U, 0x401F8468U, 0x0U, 0x401F8264U
213#define IOMUXC_GPIO_EMC_24_LPUART5_RXD 0x401F8074U, 0x2U, 0x401F8548U, 0x0U, 0x401F8264U
214#define IOMUXC_GPIO_EMC_24_ENET_TX_EN 0x401F8074U, 0x3U, 0, 0, 0x401F8264U
215#define IOMUXC_GPIO_EMC_24_GPT1_CAPTURE1 0x401F8074U, 0x4U, 0, 0, 0x401F8264U
216#define IOMUXC_GPIO_EMC_24_GPIO4_IO24 0x401F8074U, 0x5U, 0, 0, 0x401F8264U
217
218#define IOMUXC_GPIO_EMC_25_SEMC_RAS 0x401F8078U, 0x0U, 0, 0, 0x401F8268U
219#define IOMUXC_GPIO_EMC_25_FLEXPWM1_PWM1_A 0x401F8078U, 0x1U, 0x401F845CU, 0x0U, 0x401F8268U
220#define IOMUXC_GPIO_EMC_25_LPUART6_TXD 0x401F8078U, 0x2U, 0x401F8554U, 0x0U, 0x401F8268U
221#define IOMUXC_GPIO_EMC_25_ENET_TX_CLK 0x401F8078U, 0x3U, 0x401F8448U, 0x0U, 0x401F8268U
222#define IOMUXC_GPIO_EMC_25_ENET_REF_CLK 0x401F8078U, 0x4U, 0x401F842CU, 0x0U, 0x401F8268U
223#define IOMUXC_GPIO_EMC_25_GPIO4_IO25 0x401F8078U, 0x5U, 0, 0, 0x401F8268U
224
225#define IOMUXC_GPIO_EMC_26_SEMC_CLK 0x401F807CU, 0x0U, 0, 0, 0x401F826CU
226#define IOMUXC_GPIO_EMC_26_FLEXPWM1_PWM1_B 0x401F807CU, 0x1U, 0x401F846CU, 0x0U, 0x401F826CU
227#define IOMUXC_GPIO_EMC_26_LPUART6_RXD 0x401F807CU, 0x2U, 0x401F8550U, 0x0U, 0x401F826CU
228#define IOMUXC_GPIO_EMC_26_ENET_RX_ER 0x401F807CU, 0x3U, 0x401F8440U, 0x0U, 0x401F826CU
229#define IOMUXC_GPIO_EMC_26_FLEXIO1_D12 0x401F807CU, 0x4U, 0, 0, 0x401F826CU
230#define IOMUXC_GPIO_EMC_26_GPIO4_IO26 0x401F807CU, 0x5U, 0, 0, 0x401F826CU
231
232#define IOMUXC_GPIO_EMC_27_SEMC_CKE 0x401F8080U, 0x0U, 0, 0, 0x401F8270U
233#define IOMUXC_GPIO_EMC_27_FLEXPWM1_PWM2_A 0x401F8080U, 0x1U, 0x401F8460U, 0x0U, 0x401F8270U
234#define IOMUXC_GPIO_EMC_27_LPUART5_RTS_B 0x401F8080U, 0x2U, 0, 0, 0x401F8270U
235#define IOMUXC_GPIO_EMC_27_LPSPI1_SCK 0x401F8080U, 0x3U, 0x401F84F0U, 0x0U, 0x401F8270U
236#define IOMUXC_GPIO_EMC_27_FLEXIO1_D13 0x401F8080U, 0x4U, 0, 0, 0x401F8270U
237#define IOMUXC_GPIO_EMC_27_GPIO4_IO27 0x401F8080U, 0x5U, 0, 0, 0x401F8270U
238
239#define IOMUXC_GPIO_EMC_28_SEMC_WE 0x401F8084U, 0x0U, 0, 0, 0x401F8274U
240#define IOMUXC_GPIO_EMC_28_FLEXPWM1_PWM2_B 0x401F8084U, 0x1U, 0x401F8470U, 0x0U, 0x401F8274U
241#define IOMUXC_GPIO_EMC_28_LPUART5_CTS_B 0x401F8084U, 0x2U, 0, 0, 0x401F8274U
242#define IOMUXC_GPIO_EMC_28_LPSPI1_SDO 0x401F8084U, 0x3U, 0x401F84F8U, 0x0U, 0x401F8274U
243#define IOMUXC_GPIO_EMC_28_FLEXIO1_D14 0x401F8084U, 0x4U, 0, 0, 0x401F8274U
244#define IOMUXC_GPIO_EMC_28_GPIO4_IO28 0x401F8084U, 0x5U, 0, 0, 0x401F8274U
245
246#define IOMUXC_GPIO_EMC_29_SEMC_CS0 0x401F8088U, 0x0U, 0, 0, 0x401F8278U
247#define IOMUXC_GPIO_EMC_29_FLEXPWM3_PWM0_A 0x401F8088U, 0x1U, 0, 0, 0x401F8278U
248#define IOMUXC_GPIO_EMC_29_LPUART6_RTS_B 0x401F8088U, 0x2U, 0, 0, 0x401F8278U
249#define IOMUXC_GPIO_EMC_29_LPSPI1_SDI 0x401F8088U, 0x3U, 0x401F84F4U, 0x0U, 0x401F8278U
250#define IOMUXC_GPIO_EMC_29_FLEXIO1_D15 0x401F8088U, 0x4U, 0, 0, 0x401F8278U
251#define IOMUXC_GPIO_EMC_29_GPIO4_IO29 0x401F8088U, 0x5U, 0, 0, 0x401F8278U
252
253#define IOMUXC_GPIO_EMC_30_SEMC_DA08 0x401F808CU, 0x0U, 0, 0, 0x401F827CU
254#define IOMUXC_GPIO_EMC_30_FLEXPWM3_PWM0_B 0x401F808CU, 0x1U, 0, 0, 0x401F827CU
255#define IOMUXC_GPIO_EMC_30_LPUART6_CTS_B 0x401F808CU, 0x2U, 0, 0, 0x401F827CU
256#define IOMUXC_GPIO_EMC_30_LPSPI1_PCS0 0x401F808CU, 0x3U, 0x401F84ECU, 0x1U, 0x401F827CU
257#define IOMUXC_GPIO_EMC_30_CSI_DATA23 0x401F808CU, 0x4U, 0, 0, 0x401F827CU
258#define IOMUXC_GPIO_EMC_30_GPIO4_IO30 0x401F808CU, 0x5U, 0, 0, 0x401F827CU
259
260#define IOMUXC_GPIO_EMC_31_SEMC_DA09 0x401F8090U, 0x0U, 0, 0, 0x401F8280U
261#define IOMUXC_GPIO_EMC_31_FLEXPWM3_PWM1_A 0x401F8090U, 0x1U, 0, 0, 0x401F8280U
262#define IOMUXC_GPIO_EMC_31_LPUART7_TXD 0x401F8090U, 0x2U, 0x401F855CU, 0x1U, 0x401F8280U
263#define IOMUXC_GPIO_EMC_31_LPSPI1_PCS1 0x401F8090U, 0x3U, 0, 0, 0x401F8280U
264#define IOMUXC_GPIO_EMC_31_CSI_DATA22 0x401F8090U, 0x4U, 0, 0, 0x401F8280U
265#define IOMUXC_GPIO_EMC_31_GPIO4_IO31 0x401F8090U, 0x5U, 0, 0, 0x401F8280U
266
267#define IOMUXC_GPIO_EMC_32_SEMC_DA10 0x401F8094U, 0x0U, 0, 0, 0x401F8284U
268#define IOMUXC_GPIO_EMC_32_FLEXPWM3_PWM1_B 0x401F8094U, 0x1U, 0, 0, 0x401F8284U
269#define IOMUXC_GPIO_EMC_32_LPUART7_RXD 0x401F8094U, 0x2U, 0x401F8558U, 0x1U, 0x401F8284U
270#define IOMUXC_GPIO_EMC_32_CCM_PMIC_READY 0x401F8094U, 0x3U, 0x401F83FCU, 0x4U, 0x401F8284U
271#define IOMUXC_GPIO_EMC_32_CSI_DATA21 0x401F8094U, 0x4U, 0, 0, 0x401F8284U
272#define IOMUXC_GPIO_EMC_32_GPIO3_IO18 0x401F8094U, 0x5U, 0, 0, 0x401F8284U
273
274#define IOMUXC_GPIO_EMC_33_SEMC_DA11 0x401F8098U, 0x0U, 0, 0, 0x401F8288U
275#define IOMUXC_GPIO_EMC_33_FLEXPWM3_PWM2_A 0x401F8098U, 0x1U, 0, 0, 0x401F8288U
276#define IOMUXC_GPIO_EMC_33_USDHC1_RESET_B 0x401F8098U, 0x2U, 0, 0, 0x401F8288U
277#define IOMUXC_GPIO_EMC_33_SAI3_RX_DATA 0x401F8098U, 0x3U, 0, 0, 0x401F8288U
278#define IOMUXC_GPIO_EMC_33_CSI_DATA20 0x401F8098U, 0x4U, 0, 0, 0x401F8288U
279#define IOMUXC_GPIO_EMC_33_GPIO3_IO19 0x401F8098U, 0x5U, 0, 0, 0x401F8288U
280
281#define IOMUXC_GPIO_EMC_34_SEMC_DA12 0x401F809CU, 0x0U, 0, 0, 0x401F828CU
282#define IOMUXC_GPIO_EMC_34_FLEXPWM3_PWM2_B 0x401F809CU, 0x1U, 0, 0, 0x401F828CU
283#define IOMUXC_GPIO_EMC_34_USDHC1_VSELECT 0x401F809CU, 0x2U, 0, 0, 0x401F828CU
284#define IOMUXC_GPIO_EMC_34_SAI3_RX_SYNC 0x401F809CU, 0x3U, 0, 0, 0x401F828CU
285#define IOMUXC_GPIO_EMC_34_CSI_DATA19 0x401F809CU, 0x4U, 0, 0, 0x401F828CU
286#define IOMUXC_GPIO_EMC_34_GPIO3_IO20 0x401F809CU, 0x5U, 0, 0, 0x401F828CU
287
288#define IOMUXC_GPIO_EMC_35_SEMC_DA13 0x401F80A0U, 0x0U, 0, 0, 0x401F8290U
289#define IOMUXC_GPIO_EMC_35_XBAR1_INOUT18 0x401F80A0U, 0x1U, 0x401F8630U, 0x0U, 0x401F8290U
290#define IOMUXC_GPIO_EMC_35_GPT1_COMPARE1 0x401F80A0U, 0x2U, 0, 0, 0x401F8290U
291#define IOMUXC_GPIO_EMC_35_SAI3_RX_BCLK 0x401F80A0U, 0x3U, 0, 0, 0x401F8290U
292#define IOMUXC_GPIO_EMC_35_CSI_DATA18 0x401F80A0U, 0x4U, 0, 0, 0x401F8290U
293#define IOMUXC_GPIO_EMC_35_GPIO3_IO21 0x401F80A0U, 0x5U, 0, 0, 0x401F8290U
294#define IOMUXC_GPIO_EMC_35_USDHC1_CD_B 0x401F80A0U, 0x6U, 0x401F85D4U, 0x0U, 0x401F8290U
295
296#define IOMUXC_GPIO_EMC_36_SEMC_DA14 0x401F80A4U, 0x0U, 0, 0, 0x401F8294U
297#define IOMUXC_GPIO_EMC_36_XBAR1_IN22 0x401F80A4U, 0x1U, 0x401F8638U, 0x0U, 0x401F8294U
298#define IOMUXC_GPIO_EMC_36_GPT1_COMPARE2 0x401F80A4U, 0x2U, 0, 0, 0x401F8294U
299#define IOMUXC_GPIO_EMC_36_SAI3_TX_DATA 0x401F80A4U, 0x3U, 0, 0, 0x401F8294U
300#define IOMUXC_GPIO_EMC_36_CSI_DATA17 0x401F80A4U, 0x4U, 0, 0, 0x401F8294U
301#define IOMUXC_GPIO_EMC_36_GPIO3_IO22 0x401F80A4U, 0x5U, 0, 0, 0x401F8294U
302#define IOMUXC_GPIO_EMC_36_USDHC1_WP 0x401F80A4U, 0x6U, 0x401F85D8U, 0x1U, 0x401F8294U
303
304#define IOMUXC_GPIO_EMC_37_SEMC_DA15 0x401F80A8U, 0x0U, 0, 0, 0x401F8298U
305#define IOMUXC_GPIO_EMC_37_XBAR1_IN23 0x401F80A8U, 0x1U, 0x401F863CU, 0x0U, 0x401F8298U
306#define IOMUXC_GPIO_EMC_37_GPT1_COMPARE3 0x401F80A8U, 0x2U, 0, 0, 0x401F8298U
307#define IOMUXC_GPIO_EMC_37_SAI3_MCLK 0x401F80A8U, 0x3U, 0, 0, 0x401F8298U
308#define IOMUXC_GPIO_EMC_37_CSI_DATA16 0x401F80A8U, 0x4U, 0, 0, 0x401F8298U
309#define IOMUXC_GPIO_EMC_37_GPIO3_IO23 0x401F80A8U, 0x5U, 0, 0, 0x401F8298U
310#define IOMUXC_GPIO_EMC_37_USDHC2_WP 0x401F80A8U, 0x6U, 0x401F8608U, 0x0U, 0x401F8298U
311
312#define IOMUXC_GPIO_EMC_38_SEMC_DM01 0x401F80ACU, 0x0U, 0, 0, 0x401F829CU
313#define IOMUXC_GPIO_EMC_38_FLEXPWM1_PWM3_A 0x401F80ACU, 0x1U, 0x401F8454U, 0x2U, 0x401F829CU
314#define IOMUXC_GPIO_EMC_38_LPUART8_TXD 0x401F80ACU, 0x2U, 0x401F8564U, 0x2U, 0x401F829CU
315#define IOMUXC_GPIO_EMC_38_SAI3_TX_BCLK 0x401F80ACU, 0x3U, 0, 0, 0x401F829CU
316#define IOMUXC_GPIO_EMC_38_CSI_FIELD 0x401F80ACU, 0x4U, 0, 0, 0x401F829CU
317#define IOMUXC_GPIO_EMC_38_GPIO3_IO24 0x401F80ACU, 0x5U, 0, 0, 0x401F829CU
318#define IOMUXC_GPIO_EMC_38_USDHC2_VSELECT 0x401F80ACU, 0x6U, 0, 0, 0x401F829CU
319
320#define IOMUXC_GPIO_EMC_39_SEMC_DQS 0x401F80B0U, 0x0U, 0, 0, 0x401F82A0U
321#define IOMUXC_GPIO_EMC_39_FLEXPWM1_PWM3_B 0x401F80B0U, 0x1U, 0x401F8464U, 0x2U, 0x401F82A0U
322#define IOMUXC_GPIO_EMC_39_LPUART8_RXD 0x401F80B0U, 0x2U, 0x401F8560U, 0x2U, 0x401F82A0U
323#define IOMUXC_GPIO_EMC_39_SAI3_TX_SYNC 0x401F80B0U, 0x3U, 0, 0, 0x401F82A0U
324#define IOMUXC_GPIO_EMC_39_WDOG1_B 0x401F80B0U, 0x4U, 0, 0, 0x401F82A0U
325#define IOMUXC_GPIO_EMC_39_GPIO3_IO25 0x401F80B0U, 0x5U, 0, 0, 0x401F82A0U
326#define IOMUXC_GPIO_EMC_39_USDHC2_CD_B 0x401F80B0U, 0x6U, 0x401F85E0U, 0x1U, 0x401F82A0U
327
328#define IOMUXC_GPIO_EMC_40_SEMC_RDY 0x401F80B4U, 0x0U, 0, 0, 0x401F82A4U
329#define IOMUXC_GPIO_EMC_40_GPT2_CAPTURE2 0x401F80B4U, 0x1U, 0, 0, 0x401F82A4U
330#define IOMUXC_GPIO_EMC_40_LPSPI1_PCS2 0x401F80B4U, 0x2U, 0, 0, 0x401F82A4U
331#define IOMUXC_GPIO_EMC_40_USB_OTG2_OC 0x401F80B4U, 0x3U, 0x401F85CCU, 0x1U, 0x401F82A4U
332#define IOMUXC_GPIO_EMC_40_ENET_MDC 0x401F80B4U, 0x4U, 0, 0, 0x401F82A4U
333#define IOMUXC_GPIO_EMC_40_GPIO3_IO26 0x401F80B4U, 0x5U, 0, 0, 0x401F82A4U
334#define IOMUXC_GPIO_EMC_40_USDHC2_RESET_B 0x401F80B4U, 0x6U, 0, 0, 0x401F82A4U
335
336#define IOMUXC_GPIO_EMC_41_SEMC_CSX0 0x401F80B8U, 0x0U, 0, 0, 0x401F82A8U
337#define IOMUXC_GPIO_EMC_41_GPT2_CAPTURE1 0x401F80B8U, 0x1U, 0, 0, 0x401F82A8U
338#define IOMUXC_GPIO_EMC_41_LPSPI1_PCS3 0x401F80B8U, 0x2U, 0, 0, 0x401F82A8U
339#define IOMUXC_GPIO_EMC_41_USB_OTG2_PWR 0x401F80B8U, 0x3U, 0, 0, 0x401F82A8U
340#define IOMUXC_GPIO_EMC_41_ENET_MDIO 0x401F80B8U, 0x4U, 0x401F8430U, 0x1U, 0x401F82A8U
341#define IOMUXC_GPIO_EMC_41_GPIO3_IO27 0x401F80B8U, 0x5U, 0, 0, 0x401F82A8U
342#define IOMUXC_GPIO_EMC_41_USDHC1_VSELECT 0x401F80B8U, 0x6U, 0, 0, 0x401F82A8U
343
344#define IOMUXC_GPIO_AD_B0_00_FLEXPWM2_PWM3_A 0x401F80BCU, 0x0U, 0x401F8474U, 0x2U, 0x401F82ACU
345#define IOMUXC_GPIO_AD_B0_00_XBAR1_INOUT14 0x401F80BCU, 0x1U, 0x401F8644U, 0x0U, 0x401F82ACU
346#define IOMUXC_GPIO_AD_B0_00_REF_CLK_32K 0x401F80BCU, 0x2U, 0, 0, 0x401F82ACU
347#define IOMUXC_GPIO_AD_B0_00_USB_OTG2_ID 0x401F80BCU, 0x3U, 0x401F83F8U, 0x0U, 0x401F82ACU
348#define IOMUXC_GPIO_AD_B0_00_LPI2C1_SCLS 0x401F80BCU, 0x4U, 0, 0, 0x401F82ACU
349#define IOMUXC_GPIO_AD_B0_00_GPIO1_IO00 0x401F80BCU, 0x5U, 0, 0, 0x401F82ACU
350#define IOMUXC_GPIO_AD_B0_00_USDHC1_RESET_B 0x401F80BCU, 0x6U, 0, 0, 0x401F82ACU
351#define IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK 0x401F80BCU, 0x7U, 0x401F8510U, 0x0U, 0x401F82ACU
352
353#define IOMUXC_GPIO_AD_B0_01_FLEXPWM2_PWM3_B 0x401F80C0U, 0x0U, 0x401F8484U, 0x2U, 0x401F82B0U
354#define IOMUXC_GPIO_AD_B0_01_XBAR1_INOUT15 0x401F80C0U, 0x1U, 0x401F8648U, 0x0U, 0x401F82B0U
355#define IOMUXC_GPIO_AD_B0_01_REF_CLK_24M 0x401F80C0U, 0x2U, 0, 0, 0x401F82B0U
356#define IOMUXC_GPIO_AD_B0_01_USB_OTG1_ID 0x401F80C0U, 0x3U, 0x401F83F4U, 0x0U, 0x401F82B0U
357#define IOMUXC_GPIO_AD_B0_01_LPI2C1_SDAS 0x401F80C0U, 0x4U, 0, 0, 0x401F82B0U
358#define IOMUXC_GPIO_AD_B0_01_GPIO1_IO01 0x401F80C0U, 0x5U, 0, 0, 0x401F82B0U
359#define IOMUXC_GPIO_AD_B0_01_EWM_OUT_B 0x401F80C0U, 0x6U, 0, 0, 0x401F82B0U
360#define IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO 0x401F80C0U, 0x7U, 0x401F8518U, 0x0U, 0x401F82B0U
361
362#define IOMUXC_GPIO_AD_B0_02_FLEXCAN2_TX 0x401F80C4U, 0x0U, 0, 0, 0x401F82B4U
363#define IOMUXC_GPIO_AD_B0_02_XBAR1_INOUT16 0x401F80C4U, 0x1U, 0x401F864CU, 0x0U, 0x401F82B4U
364#define IOMUXC_GPIO_AD_B0_02_LPUART6_TXD 0x401F80C4U, 0x2U, 0x401F8554U, 0x1U, 0x401F82B4U
365#define IOMUXC_GPIO_AD_B0_02_USB_OTG1_PWR 0x401F80C4U, 0x3U, 0, 0, 0x401F82B4U
366#define IOMUXC_GPIO_AD_B0_02_FLEXPWM1_PWM0_X 0x401F80C4U, 0x4U, 0, 0, 0x401F82B4U
367#define IOMUXC_GPIO_AD_B0_02_GPIO1_IO02 0x401F80C4U, 0x5U, 0, 0, 0x401F82B4U
368#define IOMUXC_GPIO_AD_B0_02_LPI2C1_HREQ 0x401F80C4U, 0x6U, 0, 0, 0x401F82B4U
369#define IOMUXC_GPIO_AD_B0_02_LPSPI3_SDI 0x401F80C4U, 0x7U, 0x401F8514U, 0x0U, 0x401F82B4U
370
371#define IOMUXC_GPIO_AD_B0_03_FLEXCAN2_RX 0x401F80C8U, 0x0U, 0x401F8450U, 0x1U, 0x401F82B8U
372#define IOMUXC_GPIO_AD_B0_03_XBAR1_INOUT17 0x401F80C8U, 0x1U, 0x401F862CU, 0x1U, 0x401F82B8U
373#define IOMUXC_GPIO_AD_B0_03_LPUART6_RXD 0x401F80C8U, 0x2U, 0x401F8550U, 0x1U, 0x401F82B8U
374#define IOMUXC_GPIO_AD_B0_03_USB_OTG1_OC 0x401F80C8U, 0x3U, 0x401F85D0U, 0x0U, 0x401F82B8U
375#define IOMUXC_GPIO_AD_B0_03_FLEXPWM1_PWM1_X 0x401F80C8U, 0x4U, 0, 0, 0x401F82B8U
376#define IOMUXC_GPIO_AD_B0_03_GPIO1_IO03 0x401F80C8U, 0x5U, 0, 0, 0x401F82B8U
377#define IOMUXC_GPIO_AD_B0_03_REF_CLK_24M 0x401F80C8U, 0x6U, 0, 0, 0x401F82B8U
378#define IOMUXC_GPIO_AD_B0_03_LPSPI3_PCS0 0x401F80C8U, 0x7U, 0x401F850CU, 0x0U, 0x401F82B8U
379
380#define IOMUXC_GPIO_AD_B0_04_SRC_BOOT_MODE00 0x401F80CCU, 0x0U, 0, 0, 0x401F82BCU
381#define IOMUXC_GPIO_AD_B0_04_MQS_RIGHT 0x401F80CCU, 0x1U, 0, 0, 0x401F82BCU
382#define IOMUXC_GPIO_AD_B0_04_ENET_TX_DATA03 0x401F80CCU, 0x2U, 0, 0, 0x401F82BCU
383#define IOMUXC_GPIO_AD_B0_04_SAI2_TX_SYNC 0x401F80CCU, 0x3U, 0x401F85C4U, 0x1U, 0x401F82BCU
384#define IOMUXC_GPIO_AD_B0_04_CSI_DATA09 0x401F80CCU, 0x4U, 0x401F841CU, 0x1U, 0x401F82BCU
385#define IOMUXC_GPIO_AD_B0_04_GPIO1_IO04 0x401F80CCU, 0x5U, 0, 0, 0x401F82BCU
386#define IOMUXC_GPIO_AD_B0_04_PIT_TRIGGER00 0x401F80CCU, 0x6U, 0, 0, 0x401F82BCU
387#define IOMUXC_GPIO_AD_B0_04_LPSPI3_PCS1 0x401F80CCU, 0x7U, 0, 0, 0x401F82BCU
388
389#define IOMUXC_GPIO_AD_B0_05_SRC_BOOT_MODE01 0x401F80D0U, 0x0U, 0, 0, 0x401F82C0U
390#define IOMUXC_GPIO_AD_B0_05_MQS_LEFT 0x401F80D0U, 0x1U, 0, 0, 0x401F82C0U
391#define IOMUXC_GPIO_AD_B0_05_ENET_TX_DATA02 0x401F80D0U, 0x2U, 0, 0, 0x401F82C0U
392#define IOMUXC_GPIO_AD_B0_05_SAI2_TX_BCLK 0x401F80D0U, 0x3U, 0x401F85C0U, 0x1U, 0x401F82C0U
393#define IOMUXC_GPIO_AD_B0_05_CSI_DATA08 0x401F80D0U, 0x4U, 0x401F8418U, 0x1U, 0x401F82C0U
394#define IOMUXC_GPIO_AD_B0_05_GPIO1_IO05 0x401F80D0U, 0x5U, 0, 0, 0x401F82C0U
395#define IOMUXC_GPIO_AD_B0_05_XBAR1_INOUT17 0x401F80D0U, 0x6U, 0x401F862CU, 0x2U, 0x401F82C0U
396#define IOMUXC_GPIO_AD_B0_05_LPSPI3_PCS2 0x401F80D0U, 0x7U, 0, 0, 0x401F82C0U
397
398#define IOMUXC_GPIO_AD_B0_06_JTAG_TMS 0x401F80D4U, 0x0U, 0, 0, 0x401F82C4U
399#define IOMUXC_GPIO_AD_B0_06_GPT2_COMPARE1 0x401F80D4U, 0x1U, 0, 0, 0x401F82C4U
400#define IOMUXC_GPIO_AD_B0_06_ENET_RX_CLK 0x401F80D4U, 0x2U, 0, 0, 0x401F82C4U
401#define IOMUXC_GPIO_AD_B0_06_SAI2_RX_BCLK 0x401F80D4U, 0x3U, 0x401F85B4U, 0x1U, 0x401F82C4U
402#define IOMUXC_GPIO_AD_B0_06_CSI_DATA07 0x401F80D4U, 0x4U, 0x401F8414U, 0x1U, 0x401F82C4U
403#define IOMUXC_GPIO_AD_B0_06_GPIO1_IO06 0x401F80D4U, 0x5U, 0, 0, 0x401F82C4U
404#define IOMUXC_GPIO_AD_B0_06_XBAR1_INOUT18 0x401F80D4U, 0x6U, 0x401F8630U, 0x1U, 0x401F82C4U
405#define IOMUXC_GPIO_AD_B0_06_LPSPI3_PCS3 0x401F80D4U, 0x7U, 0, 0, 0x401F82C4U
406
407#define IOMUXC_GPIO_AD_B0_07_JTAG_TCK 0x401F80D8U, 0x0U, 0, 0, 0x401F82C8U
408#define IOMUXC_GPIO_AD_B0_07_GPT2_COMPARE2 0x401F80D8U, 0x1U, 0, 0, 0x401F82C8U
409#define IOMUXC_GPIO_AD_B0_07_ENET_TX_ER 0x401F80D8U, 0x2U, 0, 0, 0x401F82C8U
410#define IOMUXC_GPIO_AD_B0_07_SAI2_RX_SYNC 0x401F80D8U, 0x3U, 0x401F85BCU, 0x1U, 0x401F82C8U
411#define IOMUXC_GPIO_AD_B0_07_CSI_DATA06 0x401F80D8U, 0x4U, 0x401F8410U, 0x1U, 0x401F82C8U
412#define IOMUXC_GPIO_AD_B0_07_GPIO1_IO07 0x401F80D8U, 0x5U, 0, 0, 0x401F82C8U
413#define IOMUXC_GPIO_AD_B0_07_XBAR1_INOUT19 0x401F80D8U, 0x6U, 0x401F8654U, 0x1U, 0x401F82C8U
414#define IOMUXC_GPIO_AD_B0_07_ENET_1588_EVENT3_OUT 0x401F80D8U, 0x7U, 0, 0, 0x401F82C8U
415
416#define IOMUXC_GPIO_AD_B0_08_JTAG_MOD 0x401F80DCU, 0x0U, 0, 0, 0x401F82CCU
417#define IOMUXC_GPIO_AD_B0_08_GPT2_COMPARE3 0x401F80DCU, 0x1U, 0, 0, 0x401F82CCU
418#define IOMUXC_GPIO_AD_B0_08_ENET_RX_DATA03 0x401F80DCU, 0x2U, 0, 0, 0x401F82CCU
419#define IOMUXC_GPIO_AD_B0_08_SAI2_RX_DATA 0x401F80DCU, 0x3U, 0x401F85B8U, 0x1U, 0x401F82CCU
420#define IOMUXC_GPIO_AD_B0_08_CSI_DATA05 0x401F80DCU, 0x4U, 0x401F840CU, 0x1U, 0x401F82CCU
421#define IOMUXC_GPIO_AD_B0_08_GPIO1_IO08 0x401F80DCU, 0x5U, 0, 0, 0x401F82CCU
422#define IOMUXC_GPIO_AD_B0_08_XBAR1_IN20 0x401F80DCU, 0x6U, 0x401F8634U, 0x1U, 0x401F82CCU
423#define IOMUXC_GPIO_AD_B0_08_ENET_1588_EVENT3_IN 0x401F80DCU, 0x7U, 0, 0, 0x401F82CCU
424
425#define IOMUXC_GPIO_AD_B0_09_JTAG_TDI 0x401F80E0U, 0x0U, 0, 0, 0x401F82D0U
426#define IOMUXC_GPIO_AD_B0_09_FLEXPWM2_PWM3_A 0x401F80E0U, 0x1U, 0x401F8474U, 0x3U, 0x401F82D0U
427#define IOMUXC_GPIO_AD_B0_09_ENET_RX_DATA02 0x401F80E0U, 0x2U, 0, 0, 0x401F82D0U
428#define IOMUXC_GPIO_AD_B0_09_SAI2_TX_DATA 0x401F80E0U, 0x3U, 0, 0, 0x401F82D0U
429#define IOMUXC_GPIO_AD_B0_09_CSI_DATA04 0x401F80E0U, 0x4U, 0x401F8408U, 0x1U, 0x401F82D0U
430#define IOMUXC_GPIO_AD_B0_09_GPIO1_IO09 0x401F80E0U, 0x5U, 0, 0, 0x401F82D0U
431#define IOMUXC_GPIO_AD_B0_09_XBAR1_IN21 0x401F80E0U, 0x6U, 0x401F8658U, 0x1U, 0x401F82D0U
432#define IOMUXC_GPIO_AD_B0_09_GPT2_CLK 0x401F80E0U, 0x7U, 0, 0, 0x401F82D0U
433
434#define IOMUXC_GPIO_AD_B0_10_JTAG_TDO 0x401F80E4U, 0x0U, 0, 0, 0x401F82D4U
435#define IOMUXC_GPIO_AD_B0_10_FLEXPWM1_PWM3_A 0x401F80E4U, 0x1U, 0x401F8454U, 0x3U, 0x401F82D4U
436#define IOMUXC_GPIO_AD_B0_10_ENET_CRS 0x401F80E4U, 0x2U, 0, 0, 0x401F82D4U
437#define IOMUXC_GPIO_AD_B0_10_SAI2_MCLK 0x401F80E4U, 0x3U, 0x401F85B0U, 0x1U, 0x401F82D4U
438#define IOMUXC_GPIO_AD_B0_10_CSI_DATA03 0x401F80E4U, 0x4U, 0x401F8404U, 0x1U, 0x401F82D4U
439#define IOMUXC_GPIO_AD_B0_10_GPIO1_IO10 0x401F80E4U, 0x5U, 0, 0, 0x401F82D4U
440#define IOMUXC_GPIO_AD_B0_10_XBAR1_IN22 0x401F80E4U, 0x6U, 0x401F8638U, 0x1U, 0x401F82D4U
441#define IOMUXC_GPIO_AD_B0_10_ENET_1588_EVENT0_OUT 0x401F80E4U, 0x7U, 0, 0, 0x401F82D4U
442
443#define IOMUXC_GPIO_AD_B0_11_JTAG_TRSTB 0x401F80E8U, 0x0U, 0, 0, 0x401F82D8U
444#define IOMUXC_GPIO_AD_B0_11_FLEXPWM1_PWM3_B 0x401F80E8U, 0x1U, 0x401F8464U, 0x3U, 0x401F82D8U
445#define IOMUXC_GPIO_AD_B0_11_ENET_COL 0x401F80E8U, 0x2U, 0, 0, 0x401F82D8U
446#define IOMUXC_GPIO_AD_B0_11_WDOG1_B 0x401F80E8U, 0x3U, 0, 0, 0x401F82D8U
447#define IOMUXC_GPIO_AD_B0_11_CSI_DATA02 0x401F80E8U, 0x4U, 0x401F8400U, 0x1U, 0x401F82D8U
448#define IOMUXC_GPIO_AD_B0_11_GPIO1_IO11 0x401F80E8U, 0x5U, 0, 0, 0x401F82D8U
449#define IOMUXC_GPIO_AD_B0_11_XBAR1_IN23 0x401F80E8U, 0x6U, 0x401F863CU, 0x1U, 0x401F82D8U
450#define IOMUXC_GPIO_AD_B0_11_ENET_1588_EVENT0_IN 0x401F80E8U, 0x7U, 0x401F8444U, 0x1U, 0x401F82D8U
451
452#define IOMUXC_GPIO_AD_B0_12_LPI2C4_SCL 0x401F80ECU, 0x0U, 0x401F84E4U, 0x1U, 0x401F82DCU
453#define IOMUXC_GPIO_AD_B0_12_CCM_PMIC_READY 0x401F80ECU, 0x1U, 0x401F83FCU, 0x1U, 0x401F82DCU
454#define IOMUXC_GPIO_AD_B0_12_LPUART1_TXD 0x401F80ECU, 0x2U, 0, 0, 0x401F82DCU
455#define IOMUXC_GPIO_AD_B0_12_WDOG2_B 0x401F80ECU, 0x3U, 0, 0, 0x401F82DCU
456#define IOMUXC_GPIO_AD_B0_12_FLEXPWM1_PWM2_X 0x401F80ECU, 0x4U, 0, 0, 0x401F82DCU
457#define IOMUXC_GPIO_AD_B0_12_GPIO1_IO12 0x401F80ECU, 0x5U, 0, 0, 0x401F82DCU
458#define IOMUXC_GPIO_AD_B0_12_ENET_1588_EVENT1_OUT 0x401F80ECU, 0x6U, 0, 0, 0x401F82DCU
459#define IOMUXC_GPIO_AD_B0_12_NMI 0x401F80ECU, 0x7U, 0x401F8568U, 0x0U, 0x401F82DCU
460
461#define IOMUXC_GPIO_AD_B0_13_LPI2C4_SDA 0x401F80F0U, 0x0U, 0x401F84E8U, 0x1U, 0x401F82E0U
462#define IOMUXC_GPIO_AD_B0_13_GPT1_CLK 0x401F80F0U, 0x1U, 0, 0, 0x401F82E0U
463#define IOMUXC_GPIO_AD_B0_13_LPUART1_RXD 0x401F80F0U, 0x2U, 0, 0, 0x401F82E0U
464#define IOMUXC_GPIO_AD_B0_13_EWM_OUT_B 0x401F80F0U, 0x3U, 0, 0, 0x401F82E0U
465#define IOMUXC_GPIO_AD_B0_13_FLEXPWM1_PWM3_X 0x401F80F0U, 0x4U, 0, 0, 0x401F82E0U
466#define IOMUXC_GPIO_AD_B0_13_GPIO1_IO13 0x401F80F0U, 0x5U, 0, 0, 0x401F82E0U
467#define IOMUXC_GPIO_AD_B0_13_ENET_1588_EVENT1_IN 0x401F80F0U, 0x6U, 0, 0, 0x401F82E0U
468#define IOMUXC_GPIO_AD_B0_13_REF_CLK_24M 0x401F80F0U, 0x7U, 0, 0, 0x401F82E0U
469
470#define IOMUXC_GPIO_AD_B0_14_USB_OTG2_OC 0x401F80F4U, 0x0U, 0x401F85CCU, 0x0U, 0x401F82E4U
471#define IOMUXC_GPIO_AD_B0_14_XBAR1_IN24 0x401F80F4U, 0x1U, 0x401F8640U, 0x1U, 0x401F82E4U
472#define IOMUXC_GPIO_AD_B0_14_LPUART1_CTS_B 0x401F80F4U, 0x2U, 0, 0, 0x401F82E4U
473#define IOMUXC_GPIO_AD_B0_14_ENET_1588_EVENT0_OUT 0x401F80F4U, 0x3U, 0, 0, 0x401F82E4U
474#define IOMUXC_GPIO_AD_B0_14_CSI_VSYNC 0x401F80F4U, 0x4U, 0x401F8428U, 0x0U, 0x401F82E4U
475#define IOMUXC_GPIO_AD_B0_14_GPIO1_IO14 0x401F80F4U, 0x5U, 0, 0, 0x401F82E4U
476#define IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX 0x401F80F4U, 0x6U, 0, 0, 0x401F82E4U
477
478#define IOMUXC_GPIO_AD_B0_15_USB_OTG2_PWR 0x401F80F8U, 0x0U, 0, 0, 0x401F82E8U
479#define IOMUXC_GPIO_AD_B0_15_XBAR1_IN25 0x401F80F8U, 0x1U, 0x401F8650U, 0x0U, 0x401F82E8U
480#define IOMUXC_GPIO_AD_B0_15_LPUART1_RTS_B 0x401F80F8U, 0x2U, 0, 0, 0x401F82E8U
481#define IOMUXC_GPIO_AD_B0_15_ENET_1588_EVENT0_IN 0x401F80F8U, 0x3U, 0x401F8444U, 0x0U, 0x401F82E8U
482#define IOMUXC_GPIO_AD_B0_15_CSI_HSYNC 0x401F80F8U, 0x4U, 0x401F8420U, 0x0U, 0x401F82E8U
483#define IOMUXC_GPIO_AD_B0_15_GPIO1_IO15 0x401F80F8U, 0x5U, 0, 0, 0x401F82E8U
484#define IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX 0x401F80F8U, 0x6U, 0x401F8450U, 0x2U, 0x401F82E8U
485#define IOMUXC_GPIO_AD_B0_15_WDOG1_WDOG_RST_B_DEB 0x401F80F8U, 0x7U, 0, 0, 0x401F82E8U
486
487#define IOMUXC_GPIO_AD_B1_00_USB_OTG2_ID 0x401F80FCU, 0x0U, 0x401F83F8U, 0x1U, 0x401F82ECU
488#define IOMUXC_GPIO_AD_B1_00_TMR3_TIMER0 0x401F80FCU, 0x1U, 0x401F857CU, 0x1U, 0x401F82ECU
489#define IOMUXC_GPIO_AD_B1_00_LPUART2_CTS_B 0x401F80FCU, 0x2U, 0, 0, 0x401F82ECU
490#define IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL 0x401F80FCU, 0x3U, 0x401F84CCU, 0x1U, 0x401F82ECU
491#define IOMUXC_GPIO_AD_B1_00_WDOG1_B 0x401F80FCU, 0x4U, 0, 0, 0x401F82ECU
492#define IOMUXC_GPIO_AD_B1_00_GPIO1_IO16 0x401F80FCU, 0x5U, 0, 0, 0x401F82ECU
493#define IOMUXC_GPIO_AD_B1_00_USDHC1_WP 0x401F80FCU, 0x6U, 0x401F85D8U, 0x2U, 0x401F82ECU
494#define IOMUXC_GPIO_AD_B1_00_KPP_ROW07 0x401F80FCU, 0x7U, 0, 0, 0x401F82ECU
495
496#define IOMUXC_GPIO_AD_B1_01_USB_OTG1_PWR 0x401F8100U, 0x0U, 0, 0, 0x401F82F0U
497#define IOMUXC_GPIO_AD_B1_01_TMR3_TIMER1 0x401F8100U, 0x1U, 0x401F8580U, 0x0U, 0x401F82F0U
498#define IOMUXC_GPIO_AD_B1_01_LPUART2_RTS_B 0x401F8100U, 0x2U, 0, 0, 0x401F82F0U
499#define IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA 0x401F8100U, 0x3U, 0x401F84D0U, 0x1U, 0x401F82F0U
500#define IOMUXC_GPIO_AD_B1_01_CCM_PMIC_READY 0x401F8100U, 0x4U, 0x401F83FCU, 0x2U, 0x401F82F0U
501#define IOMUXC_GPIO_AD_B1_01_GPIO1_IO17 0x401F8100U, 0x5U, 0, 0, 0x401F82F0U
502#define IOMUXC_GPIO_AD_B1_01_USDHC1_VSELECT 0x401F8100U, 0x6U, 0, 0, 0x401F82F0U
503#define IOMUXC_GPIO_AD_B1_01_KPP_COL07 0x401F8100U, 0x7U, 0, 0, 0x401F82F0U
504
505#define IOMUXC_GPIO_AD_B1_02_USB_OTG1_ID 0x401F8104U, 0x0U, 0x401F83F4U, 0x1U, 0x401F82F4U
506#define IOMUXC_GPIO_AD_B1_02_TMR3_TIMER2 0x401F8104U, 0x1U, 0x401F8584U, 0x1U, 0x401F82F4U
507#define IOMUXC_GPIO_AD_B1_02_LPUART2_TXD 0x401F8104U, 0x2U, 0x401F8530U, 0x1U, 0x401F82F4U
508#define IOMUXC_GPIO_AD_B1_02_SPDIF_OUT 0x401F8104U, 0x3U, 0, 0, 0x401F82F4U
509#define IOMUXC_GPIO_AD_B1_02_ENET_1588_EVENT2_OUT 0x401F8104U, 0x4U, 0, 0, 0x401F82F4U
510#define IOMUXC_GPIO_AD_B1_02_GPIO1_IO18 0x401F8104U, 0x5U, 0, 0, 0x401F82F4U
511#define IOMUXC_GPIO_AD_B1_02_USDHC1_CD_B 0x401F8104U, 0x6U, 0x401F85D4U, 0x1U, 0x401F82F4U
512#define IOMUXC_GPIO_AD_B1_02_KPP_ROW06 0x401F8104U, 0x7U, 0, 0, 0x401F82F4U
513
514#define IOMUXC_GPIO_AD_B1_03_USB_OTG1_OC 0x401F8108U, 0x0U, 0x401F85D0U, 0x1U, 0x401F82F8U
515#define IOMUXC_GPIO_AD_B1_03_TMR3_TIMER3 0x401F8108U, 0x1U, 0x401F8588U, 0x1U, 0x401F82F8U
516#define IOMUXC_GPIO_AD_B1_03_LPUART2_RXD 0x401F8108U, 0x2U, 0x401F852CU, 0x1U, 0x401F82F8U
517#define IOMUXC_GPIO_AD_B1_03_SPDIF_IN 0x401F8108U, 0x3U, 0x401F85C8U, 0x0U, 0x401F82F8U
518#define IOMUXC_GPIO_AD_B1_03_ENET_1588_EVENT2_IN 0x401F8108U, 0x4U, 0, 0, 0x401F82F8U
519#define IOMUXC_GPIO_AD_B1_03_GPIO1_IO19 0x401F8108U, 0x5U, 0, 0, 0x401F82F8U
520#define IOMUXC_GPIO_AD_B1_03_USDHC2_CD_B 0x401F8108U, 0x6U, 0x401F85E0U, 0x0U, 0x401F82F8U
521#define IOMUXC_GPIO_AD_B1_03_KPP_COL06 0x401F8108U, 0x7U, 0, 0, 0x401F82F8U
522
523#define IOMUXC_GPIO_AD_B1_04_FLEXSPI_B_DATA3 0x401F810CU, 0x0U, 0x401F84C4U, 0x1U, 0x401F82FCU
524#define IOMUXC_GPIO_AD_B1_04_ENET_MDC 0x401F810CU, 0x1U, 0, 0, 0x401F82FCU
525#define IOMUXC_GPIO_AD_B1_04_LPUART3_CTS_B 0x401F810CU, 0x2U, 0x401F8534U, 0x1U, 0x401F82FCU
526#define IOMUXC_GPIO_AD_B1_04_SPDIF_SR_CLK 0x401F810CU, 0x3U, 0, 0, 0x401F82FCU
527#define IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK 0x401F810CU, 0x4U, 0x401F8424U, 0x0U, 0x401F82FCU
528#define IOMUXC_GPIO_AD_B1_04_GPIO1_IO20 0x401F810CU, 0x5U, 0, 0, 0x401F82FCU
529#define IOMUXC_GPIO_AD_B1_04_USDHC2_DATA0 0x401F810CU, 0x6U, 0x401F85E8U, 0x1U, 0x401F82FCU
530#define IOMUXC_GPIO_AD_B1_04_KPP_ROW05 0x401F810CU, 0x7U, 0, 0, 0x401F82FCU
531
532#define IOMUXC_GPIO_AD_B1_05_FLEXSPI_B_DATA2 0x401F8110U, 0x0U, 0x401F84C0U, 0x1U, 0x401F8300U
533#define IOMUXC_GPIO_AD_B1_05_ENET_MDIO 0x401F8110U, 0x1U, 0x401F8430U, 0x0U, 0x401F8300U
534#define IOMUXC_GPIO_AD_B1_05_LPUART3_RTS_B 0x401F8110U, 0x2U, 0, 0, 0x401F8300U
535#define IOMUXC_GPIO_AD_B1_05_SPDIF_OUT 0x401F8110U, 0x3U, 0, 0, 0x401F8300U
536#define IOMUXC_GPIO_AD_B1_05_CSI_MCLK 0x401F8110U, 0x4U, 0, 0, 0x401F8300U
537#define IOMUXC_GPIO_AD_B1_05_GPIO1_IO21 0x401F8110U, 0x5U, 0, 0, 0x401F8300U
538#define IOMUXC_GPIO_AD_B1_05_USDHC2_DATA1 0x401F8110U, 0x6U, 0x401F85ECU, 0x1U, 0x401F8300U
539#define IOMUXC_GPIO_AD_B1_05_KPP_COL05 0x401F8110U, 0x7U, 0, 0, 0x401F8300U
540
541#define IOMUXC_GPIO_AD_B1_06_FLEXSPI_B_DATA1 0x401F8114U, 0x0U, 0x401F84BCU, 0x1U, 0x401F8304U
542#define IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA 0x401F8114U, 0x1U, 0x401F84E0U, 0x2U, 0x401F8304U
543#define IOMUXC_GPIO_AD_B1_06_LPUART3_TXD 0x401F8114U, 0x2U, 0x401F853CU, 0x0U, 0x401F8304U
544#define IOMUXC_GPIO_AD_B1_06_SPDIF_LOCK 0x401F8114U, 0x3U, 0, 0, 0x401F8304U
545#define IOMUXC_GPIO_AD_B1_06_CSI_VSYNC 0x401F8114U, 0x4U, 0x401F8428U, 0x1U, 0x401F8304U
546#define IOMUXC_GPIO_AD_B1_06_GPIO1_IO22 0x401F8114U, 0x5U, 0, 0, 0x401F8304U
547#define IOMUXC_GPIO_AD_B1_06_USDHC2_DATA2 0x401F8114U, 0x6U, 0x401F85F0U, 0x1U, 0x401F8304U
548#define IOMUXC_GPIO_AD_B1_06_KPP_ROW04 0x401F8114U, 0x7U, 0, 0, 0x401F8304U
549
550#define IOMUXC_GPIO_AD_B1_07_FLEXSPI_B_DATA0 0x401F8118U, 0x0U, 0x401F84B8U, 0x1U, 0x401F8308U
551#define IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL 0x401F8118U, 0x1U, 0x401F84DCU, 0x2U, 0x401F8308U
552#define IOMUXC_GPIO_AD_B1_07_LPUART3_RXD 0x401F8118U, 0x2U, 0x401F8538U, 0x0U, 0x401F8308U
553#define IOMUXC_GPIO_AD_B1_07_SPDIF_EXT_CLK 0x401F8118U, 0x3U, 0, 0, 0x401F8308U
554#define IOMUXC_GPIO_AD_B1_07_CSI_HSYNC 0x401F8118U, 0x4U, 0x401F8420U, 0x1U, 0x401F8308U
555#define IOMUXC_GPIO_AD_B1_07_GPIO1_IO23 0x401F8118U, 0x5U, 0, 0, 0x401F8308U
556#define IOMUXC_GPIO_AD_B1_07_USDHC2_DATA3 0x401F8118U, 0x6U, 0x401F85F4U, 0x1U, 0x401F8308U
557#define IOMUXC_GPIO_AD_B1_07_KPP_COL04 0x401F8118U, 0x7U, 0, 0, 0x401F8308U
558
559#define IOMUXC_GPIO_AD_B1_08_FLEXSPI_A_SS1_B 0x401F811CU, 0x0U, 0, 0, 0x401F830CU
560#define IOMUXC_GPIO_AD_B1_08_FLEXPWM4_PWM0_A 0x401F811CU, 0x1U, 0x401F8494U, 0x1U, 0x401F830CU
561#define IOMUXC_GPIO_AD_B1_08_FLEXCAN1_TX 0x401F811CU, 0x2U, 0, 0, 0x401F830CU
562#define IOMUXC_GPIO_AD_B1_08_CCM_PMIC_READY 0x401F811CU, 0x3U, 0x401F83FCU, 0x3U, 0x401F830CU
563#define IOMUXC_GPIO_AD_B1_08_CSI_DATA09 0x401F811CU, 0x4U, 0x401F841CU, 0x0U, 0x401F830CU
564#define IOMUXC_GPIO_AD_B1_08_GPIO1_IO24 0x401F811CU, 0x5U, 0, 0, 0x401F830CU
565#define IOMUXC_GPIO_AD_B1_08_USDHC2_CMD 0x401F811CU, 0x6U, 0x401F85E4U, 0x1U, 0x401F830CU
566#define IOMUXC_GPIO_AD_B1_08_KPP_ROW03 0x401F811CU, 0x7U, 0, 0, 0x401F830CU
567
568#define IOMUXC_GPIO_AD_B1_09_FLEXSPI_A_DQS 0x401F8120U, 0x0U, 0x401F84A4U, 0x1U, 0x401F8310U
569#define IOMUXC_GPIO_AD_B1_09_FLEXPWM4_PWM1_A 0x401F8120U, 0x1U, 0x401F8498U, 0x1U, 0x401F8310U
570#define IOMUXC_GPIO_AD_B1_09_FLEXCAN1_RX 0x401F8120U, 0x2U, 0x401F844CU, 0x2U, 0x401F8310U
571#define IOMUXC_GPIO_AD_B1_09_SAI1_MCLK 0x401F8120U, 0x3U, 0x401F858CU, 0x1U, 0x401F8310U
572#define IOMUXC_GPIO_AD_B1_09_CSI_DATA08 0x401F8120U, 0x4U, 0x401F8418U, 0x0U, 0x401F8310U
573#define IOMUXC_GPIO_AD_B1_09_GPIO1_IO25 0x401F8120U, 0x5U, 0, 0, 0x401F8310U
574#define IOMUXC_GPIO_AD_B1_09_USDHC2_CLK 0x401F8120U, 0x6U, 0x401F85DCU, 0x1U, 0x401F8310U
575#define IOMUXC_GPIO_AD_B1_09_KPP_COL03 0x401F8120U, 0x7U, 0, 0, 0x401F8310U
576
577#define IOMUXC_GPIO_AD_B1_10_FLEXSPI_A_DATA3 0x401F8124U, 0x0U, 0x401F84B4U, 0x1U, 0x401F8314U
578#define IOMUXC_GPIO_AD_B1_10_WDOG1_B 0x401F8124U, 0x1U, 0, 0, 0x401F8314U
579#define IOMUXC_GPIO_AD_B1_10_LPUART8_TXD 0x401F8124U, 0x2U, 0x401F8564U, 0x1U, 0x401F8314U
580#define IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC 0x401F8124U, 0x3U, 0x401F85A4U, 0x1U, 0x401F8314U
581#define IOMUXC_GPIO_AD_B1_10_CSI_DATA07 0x401F8124U, 0x4U, 0x401F8414U, 0x0U, 0x401F8314U
582#define IOMUXC_GPIO_AD_B1_10_GPIO1_IO26 0x401F8124U, 0x5U, 0, 0, 0x401F8314U
583#define IOMUXC_GPIO_AD_B1_10_USDHC2_WP 0x401F8124U, 0x6U, 0x401F8608U, 0x1U, 0x401F8314U
584#define IOMUXC_GPIO_AD_B1_10_KPP_ROW02 0x401F8124U, 0x7U, 0, 0, 0x401F8314U
585
586#define IOMUXC_GPIO_AD_B1_11_FLEXSPI_A_DATA2 0x401F8128U, 0x0U, 0x401F84B0U, 0x1U, 0x401F8318U
587#define IOMUXC_GPIO_AD_B1_11_EWM_OUT_B 0x401F8128U, 0x1U, 0, 0, 0x401F8318U
588#define IOMUXC_GPIO_AD_B1_11_LPUART8_RXD 0x401F8128U, 0x2U, 0x401F8560U, 0x1U, 0x401F8318U
589#define IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK 0x401F8128U, 0x3U, 0x401F8590U, 0x1U, 0x401F8318U
590#define IOMUXC_GPIO_AD_B1_11_CSI_DATA06 0x401F8128U, 0x4U, 0x401F8410U, 0x0U, 0x401F8318U
591#define IOMUXC_GPIO_AD_B1_11_GPIO1_IO27 0x401F8128U, 0x5U, 0, 0, 0x401F8318U
592#define IOMUXC_GPIO_AD_B1_11_USDHC2_RESET_B 0x401F8128U, 0x6U, 0, 0, 0x401F8318U
593#define IOMUXC_GPIO_AD_B1_11_KPP_COL02 0x401F8128U, 0x7U, 0, 0, 0x401F8318U
594
595#define IOMUXC_GPIO_AD_B1_12_FLEXSPI_A_DATA1 0x401F812CU, 0x0U, 0x401F84ACU, 0x1U, 0x401F831CU
596#define IOMUXC_GPIO_AD_B1_12_ACMP1_OUT 0x401F812CU, 0x1U, 0, 0, 0x401F831CU
597#define IOMUXC_GPIO_AD_B1_12_LPSPI3_PCS0 0x401F812CU, 0x2U, 0x401F850CU, 0x1U, 0x401F831CU
598#define IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00 0x401F812CU, 0x3U, 0x401F8594U, 0x1U, 0x401F831CU
599#define IOMUXC_GPIO_AD_B1_12_CSI_DATA05 0x401F812CU, 0x4U, 0x401F840CU, 0x0U, 0x401F831CU
600#define IOMUXC_GPIO_AD_B1_12_GPIO1_IO28 0x401F812CU, 0x5U, 0, 0, 0x401F831CU
601#define IOMUXC_GPIO_AD_B1_12_USDHC2_DATA4 0x401F812CU, 0x6U, 0x401F85F8U, 0x1U, 0x401F831CU
602#define IOMUXC_GPIO_AD_B1_12_KPP_ROW01 0x401F812CU, 0x7U, 0, 0, 0x401F831CU
603
604#define IOMUXC_GPIO_AD_B1_13_FLEXSPI_A_DATA00 0x401F8130U, 0x0U, 0x401F84A8U, 0x1U, 0x401F8320U
605#define IOMUXC_GPIO_AD_B1_13_ACMP2_OUT 0x401F8130U, 0x1U, 0, 0, 0x401F8320U
606#define IOMUXC_GPIO_AD_B1_13_LPSPI3_SDI 0x401F8130U, 0x2U, 0x401F8514U, 0x1U, 0x401F8320U
607#define IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00 0x401F8130U, 0x3U, 0, 0, 0x401F8320U
608#define IOMUXC_GPIO_AD_B1_13_CSI_DATA04 0x401F8130U, 0x4U, 0x401F8408U, 0x0U, 0x401F8320U
609#define IOMUXC_GPIO_AD_B1_13_GPIO1_IO29 0x401F8130U, 0x5U, 0, 0, 0x401F8320U
610#define IOMUXC_GPIO_AD_B1_13_USDHC2_DATA5 0x401F8130U, 0x6U, 0x401F85FCU, 0x1U, 0x401F8320U
611#define IOMUXC_GPIO_AD_B1_13_KPP_COL01 0x401F8130U, 0x7U, 0, 0, 0x401F8320U
612
613#define IOMUXC_GPIO_AD_B1_14_FLEXSPI_A_SCLK 0x401F8134U, 0x0U, 0x401F84C8U, 0x1U, 0x401F8324U
614#define IOMUXC_GPIO_AD_B1_14_ACMP3_OUT 0x401F8134U, 0x1U, 0, 0, 0x401F8324U
615#define IOMUXC_GPIO_AD_B1_14_LPSPI3_SDO 0x401F8134U, 0x2U, 0x401F8518U, 0x1U, 0x401F8324U
616#define IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK 0x401F8134U, 0x3U, 0x401F85A8U, 0x1U, 0x401F8324U
617#define IOMUXC_GPIO_AD_B1_14_CSI_DATA03 0x401F8134U, 0x4U, 0x401F8404U, 0x0U, 0x401F8324U
618#define IOMUXC_GPIO_AD_B1_14_GPIO1_IO30 0x401F8134U, 0x5U, 0, 0, 0x401F8324U
619#define IOMUXC_GPIO_AD_B1_14_USDHC2_DATA6 0x401F8134U, 0x6U, 0x401F8600U, 0x1U, 0x401F8324U
620#define IOMUXC_GPIO_AD_B1_14_KPP_ROW00 0x401F8134U, 0x7U, 0, 0, 0x401F8324U
621
622#define IOMUXC_GPIO_AD_B1_15_FLEXSPI_A_SS0_B 0x401F8138U, 0x0U, 0, 0, 0x401F8328U
623#define IOMUXC_GPIO_AD_B1_15_ACMP4_OUT 0x401F8138U, 0x1U, 0, 0, 0x401F8328U
624#define IOMUXC_GPIO_AD_B1_15_LPSPI3_SCK 0x401F8138U, 0x2U, 0, 0, 0x401F8328U
625#define IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC 0x401F8138U, 0x3U, 0x401F85ACU, 0x1U, 0x401F8328U
626#define IOMUXC_GPIO_AD_B1_15_CSI_DATA02 0x401F8138U, 0x4U, 0x401F8400U, 0x0U, 0x401F8328U
627#define IOMUXC_GPIO_AD_B1_15_GPIO1_IO31 0x401F8138U, 0x5U, 0, 0, 0x401F8328U
628#define IOMUXC_GPIO_AD_B1_15_USDHC2_DATA7 0x401F8138U, 0x6U, 0x401F8604U, 0x1U, 0x401F8328U
629#define IOMUXC_GPIO_AD_B1_15_KPP_COL00 0x401F8138U, 0x7U, 0, 0, 0x401F8328U
630
631#define IOMUXC_GPIO_B0_00_LCD_CLK 0x401F813CU, 0x0U, 0, 0, 0x401F832CU
632#define IOMUXC_GPIO_B0_00_TMR1_TIMER0 0x401F813CU, 0x1U, 0, 0, 0x401F832CU
633#define IOMUXC_GPIO_B0_00_MQS_RIGHT 0x401F813CU, 0x2U, 0, 0, 0x401F832CU
634#define IOMUXC_GPIO_B0_00_LPSPI4_PCS0 0x401F813CU, 0x3U, 0x401F851CU, 0x0U, 0x401F832CU
635#define IOMUXC_GPIO_B0_00_FLEXIO2_D00 0x401F813CU, 0x4U, 0, 0, 0x401F832CU
636#define IOMUXC_GPIO_B0_00_GPIO2_IO00 0x401F813CU, 0x5U, 0, 0, 0x401F832CU
637#define IOMUXC_GPIO_B0_00_SEMC_CSX1 0x401F813CU, 0x6U, 0, 0, 0x401F832CU
638
639#define IOMUXC_GPIO_B0_01_LCD_ENABLE 0x401F8140U, 0x0U, 0, 0, 0x401F8330U
640#define IOMUXC_GPIO_B0_01_TMR1_TIMER1 0x401F8140U, 0x1U, 0, 0, 0x401F8330U
641#define IOMUXC_GPIO_B0_01_MQS_LEFT 0x401F8140U, 0x2U, 0, 0, 0x401F8330U
642#define IOMUXC_GPIO_B0_01_LPSPI4_SDI 0x401F8140U, 0x3U, 0x401F8524U, 0x0U, 0x401F8330U
643#define IOMUXC_GPIO_B0_01_FLEXIO2_D01 0x401F8140U, 0x4U, 0, 0, 0x401F8330U
644#define IOMUXC_GPIO_B0_01_GPIO2_IO01 0x401F8140U, 0x5U, 0, 0, 0x401F8330U
645#define IOMUXC_GPIO_B0_01_SEMC_CSX2 0x401F8140U, 0x6U, 0, 0, 0x401F8330U
646
647#define IOMUXC_GPIO_B0_02_LCD_HSYNC 0x401F8144U, 0x0U, 0, 0, 0x401F8334U
648#define IOMUXC_GPIO_B0_02_TMR1_TIMER2 0x401F8144U, 0x1U, 0, 0, 0x401F8334U
649#define IOMUXC_GPIO_B0_02_FLEXCAN1_TX 0x401F8144U, 0x2U, 0, 0, 0x401F8334U
650#define IOMUXC_GPIO_B0_02_LPSPI4_SDO 0x401F8144U, 0x3U, 0x401F8528U, 0x0U, 0x401F8334U
651#define IOMUXC_GPIO_B0_02_FLEXIO2_D02 0x401F8144U, 0x4U, 0, 0, 0x401F8334U
652#define IOMUXC_GPIO_B0_02_GPIO2_IO02 0x401F8144U, 0x5U, 0, 0, 0x401F8334U
653#define IOMUXC_GPIO_B0_02_SEMC_CSX3 0x401F8144U, 0x6U, 0, 0, 0x401F8334U
654
655#define IOMUXC_GPIO_B0_03_LCD_VSYNC 0x401F8148U, 0x0U, 0, 0, 0x401F8338U
656#define IOMUXC_GPIO_B0_03_TMR2_TIMER0 0x401F8148U, 0x1U, 0x401F856CU, 0x1U, 0x401F8338U
657#define IOMUXC_GPIO_B0_03_FLEXCAN1_RX 0x401F8148U, 0x2U, 0x401F844CU, 0x3U, 0x401F8338U
658#define IOMUXC_GPIO_B0_03_LPSPI4_SCK 0x401F8148U, 0x3U, 0x401F8520U, 0x0U, 0x401F8338U
659#define IOMUXC_GPIO_B0_03_FLEXIO2_D03 0x401F8148U, 0x4U, 0, 0, 0x401F8338U
660#define IOMUXC_GPIO_B0_03_GPIO2_IO03 0x401F8148U, 0x5U, 0, 0, 0x401F8338U
661#define IOMUXC_GPIO_B0_03_WDOG2_RESET_B_DEB 0x401F8148U, 0x6U, 0, 0, 0x401F8338U
662
663#define IOMUXC_GPIO_B0_04_LCD_DATA00 0x401F814CU, 0x0U, 0, 0, 0x401F833CU
664#define IOMUXC_GPIO_B0_04_TMR2_TIMER1 0x401F814CU, 0x1U, 0x401F8570U, 0x1U, 0x401F833CU
665#define IOMUXC_GPIO_B0_04_LPI2C2_SCL 0x401F814CU, 0x2U, 0x401F84D4U, 0x1U, 0x401F833CU
666#define IOMUXC_GPIO_B0_04_ARM_TRACE00 0x401F814CU, 0x3U, 0, 0, 0x401F833CU
667#define IOMUXC_GPIO_B0_04_FLEXIO2_D04 0x401F814CU, 0x4U, 0, 0, 0x401F833CU
668#define IOMUXC_GPIO_B0_04_GPIO2_IO04 0x401F814CU, 0x5U, 0, 0, 0x401F833CU
669#define IOMUXC_GPIO_B0_04_SRC_BT_CFG00 0x401F814CU, 0x6U, 0, 0, 0x401F833CU
670
671#define IOMUXC_GPIO_B0_05_LCD_DATA01 0x401F8150U, 0x0U, 0, 0, 0x401F8340U
672#define IOMUXC_GPIO_B0_05_TMR2_TIMER2 0x401F8150U, 0x1U, 0x401F8574U, 0x1U, 0x401F8340U
673#define IOMUXC_GPIO_B0_05_LPI2C2_SDA 0x401F8150U, 0x2U, 0x401F84D8U, 0x1U, 0x401F8340U
674#define IOMUXC_GPIO_B0_05_ARM_TRACE01 0x401F8150U, 0x3U, 0, 0, 0x401F8340U
675#define IOMUXC_GPIO_B0_05_FLEXIO2_D05 0x401F8150U, 0x4U, 0, 0, 0x401F8340U
676#define IOMUXC_GPIO_B0_05_GPIO2_IO05 0x401F8150U, 0x5U, 0, 0, 0x401F8340U
677#define IOMUXC_GPIO_B0_05_SRC_BT_CFG01 0x401F8150U, 0x6U, 0, 0, 0x401F8340U
678
679#define IOMUXC_GPIO_B0_06_LCD_DATA02 0x401F8154U, 0x0U, 0, 0, 0x401F8344U
680#define IOMUXC_GPIO_B0_06_TMR3_TIMER0 0x401F8154U, 0x1U, 0x401F857CU, 0x2U, 0x401F8344U
681#define IOMUXC_GPIO_B0_06_FLEXPWM2_PWM0_A 0x401F8154U, 0x2U, 0x401F8478U, 0x1U, 0x401F8344U
682#define IOMUXC_GPIO_B0_06_ARM_TRACE02 0x401F8154U, 0x3U, 0, 0, 0x401F8344U
683#define IOMUXC_GPIO_B0_06_FLEXIO2_D06 0x401F8154U, 0x4U, 0, 0, 0x401F8344U
684#define IOMUXC_GPIO_B0_06_GPIO2_IO06 0x401F8154U, 0x5U, 0, 0, 0x401F8344U
685#define IOMUXC_GPIO_B0_06_SRC_BT_CFG02 0x401F8154U, 0x6U, 0, 0, 0x401F8344U
686
687#define IOMUXC_GPIO_B0_07_LCD_DATA03 0x401F8158U, 0x0U, 0, 0, 0x401F8348U
688#define IOMUXC_GPIO_B0_07_TMR3_TIMER1 0x401F8158U, 0x1U, 0x401F8580U, 0x2U, 0x401F8348U
689#define IOMUXC_GPIO_B0_07_FLEXPWM2_PWM0_B 0x401F8158U, 0x2U, 0x401F8488U, 0x1U, 0x401F8348U
690#define IOMUXC_GPIO_B0_07_ARM_TRACE03 0x401F8158U, 0x3U, 0, 0, 0x401F8348U
691#define IOMUXC_GPIO_B0_07_FLEXIO2_D07 0x401F8158U, 0x4U, 0, 0, 0x401F8348U
692#define IOMUXC_GPIO_B0_07_GPIO2_IO07 0x401F8158U, 0x5U, 0, 0, 0x401F8348U
693#define IOMUXC_GPIO_B0_07_SRC_BT_CFG03 0x401F8158U, 0x6U, 0, 0, 0x401F8348U
694
695#define IOMUXC_GPIO_B0_08_LCD_DATA04 0x401F815CU, 0x0U, 0, 0, 0x401F834CU
696#define IOMUXC_GPIO_B0_08_TMR3_TIMER2 0x401F815CU, 0x1U, 0x401F8584U, 0x2U, 0x401F834CU
697#define IOMUXC_GPIO_B0_08_FLEXPWM2_PWM1_A 0x401F815CU, 0x2U, 0x401F847CU, 0x1U, 0x401F834CU
698#define IOMUXC_GPIO_B0_08_LPUART3_TXD 0x401F815CU, 0x3U, 0x401F853CU, 0x2U, 0x401F834CU
699#define IOMUXC_GPIO_B0_08_FLEXIO2_D08 0x401F815CU, 0x4U, 0, 0, 0x401F834CU
700#define IOMUXC_GPIO_B0_08_GPIO2_IO08 0x401F815CU, 0x5U, 0, 0, 0x401F834CU
701#define IOMUXC_GPIO_B0_08_SRC_BT_CFG04 0x401F815CU, 0x6U, 0, 0, 0x401F834CU
702
703#define IOMUXC_GPIO_B0_09_LCD_DATA05 0x401F8160U, 0x0U, 0, 0, 0x401F8350U
704#define IOMUXC_GPIO_B0_09_TMR4_TIMER0 0x401F8160U, 0x1U, 0, 0, 0x401F8350U
705#define IOMUXC_GPIO_B0_09_FLEXPWM2_PWM1_B 0x401F8160U, 0x2U, 0x401F848CU, 0x1U, 0x401F8350U
706#define IOMUXC_GPIO_B0_09_LPUART3_RXD 0x401F8160U, 0x3U, 0x401F8538U, 0x2U, 0x401F8350U
707#define IOMUXC_GPIO_B0_09_FLEXIO2_D09 0x401F8160U, 0x4U, 0, 0, 0x401F8350U
708#define IOMUXC_GPIO_B0_09_GPIO2_IO09 0x401F8160U, 0x5U, 0, 0, 0x401F8350U
709#define IOMUXC_GPIO_B0_09_SRC_BT_CFG05 0x401F8160U, 0x6U, 0, 0, 0x401F8350U
710
711#define IOMUXC_GPIO_B0_10_LCD_DATA06 0x401F8164U, 0x0U, 0, 0, 0x401F8354U
712#define IOMUXC_GPIO_B0_10_TMR4_TIMER1 0x401F8164U, 0x1U, 0, 0, 0x401F8354U
713#define IOMUXC_GPIO_B0_10_FLEXPWM2_PWM2_A 0x401F8164U, 0x2U, 0x401F8480U, 0x1U, 0x401F8354U
714#define IOMUXC_GPIO_B0_10_SAI1_TX_DATA03 0x401F8164U, 0x3U, 0x401F8598U, 0x1U, 0x401F8354U
715#define IOMUXC_GPIO_B0_10_FLEXIO2_D10 0x401F8164U, 0x4U, 0, 0, 0x401F8354U
716#define IOMUXC_GPIO_B0_10_GPIO2_IO10 0x401F8164U, 0x5U, 0, 0, 0x401F8354U
717#define IOMUXC_GPIO_B0_10_SRC_BT_CFG06 0x401F8164U, 0x6U, 0, 0, 0x401F8354U
718
719#define IOMUXC_GPIO_B0_11_LCD_DATA07 0x401F8168U, 0x0U, 0, 0, 0x401F8358U
720#define IOMUXC_GPIO_B0_11_TMR4_TIMER2 0x401F8168U, 0x1U, 0, 0, 0x401F8358U
721#define IOMUXC_GPIO_B0_11_FLEXPWM2_PWM2_B 0x401F8168U, 0x2U, 0x401F8490U, 0x1U, 0x401F8358U
722#define IOMUXC_GPIO_B0_11_SAI1_TX_DATA02 0x401F8168U, 0x3U, 0x401F859CU, 0x1U, 0x401F8358U
723#define IOMUXC_GPIO_B0_11_FLEXIO2_D11 0x401F8168U, 0x4U, 0, 0, 0x401F8358U
724#define IOMUXC_GPIO_B0_11_GPIO2_IO11 0x401F8168U, 0x5U, 0, 0, 0x401F8358U
725#define IOMUXC_GPIO_B0_11_SRC_BT_CFG07 0x401F8168U, 0x6U, 0, 0, 0x401F8358U
726
727#define IOMUXC_GPIO_B0_12_LCD_DATA08 0x401F816CU, 0x0U, 0, 0, 0x401F835CU
728#define IOMUXC_GPIO_B0_12_XBAR1_INOUT10 0x401F816CU, 0x1U, 0, 0, 0x401F835CU
729#define IOMUXC_GPIO_B0_12_ARM_TRACE_CLK 0x401F816CU, 0x2U, 0, 0, 0x401F835CU
730#define IOMUXC_GPIO_B0_12_SAI1_TX_DATA01 0x401F816CU, 0x3U, 0x401F85A0U, 0x1U, 0x401F835CU
731#define IOMUXC_GPIO_B0_12_FLEXIO2_D12 0x401F816CU, 0x4U, 0, 0, 0x401F835CU
732#define IOMUXC_GPIO_B0_12_GPIO2_IO12 0x401F816CU, 0x5U, 0, 0, 0x401F835CU
733#define IOMUXC_GPIO_B0_12_SRC_BT_CFG08 0x401F816CU, 0x6U, 0, 0, 0x401F835CU
734
735#define IOMUXC_GPIO_B0_13_LCD_DATA09 0x401F8170U, 0x0U, 0, 0, 0x401F8360U
736#define IOMUXC_GPIO_B0_13_XBAR1_INOUT11 0x401F8170U, 0x1U, 0, 0, 0x401F8360U
737#define IOMUXC_GPIO_B0_13_ARM_TRACE_SWO 0x401F8170U, 0x2U, 0, 0, 0x401F8360U
738#define IOMUXC_GPIO_B0_13_SAI1_MCLK 0x401F8170U, 0x3U, 0x401F858CU, 0x2U, 0x401F8360U
739#define IOMUXC_GPIO_B0_13_FLEXIO2_D13 0x401F8170U, 0x4U, 0, 0, 0x401F8360U
740#define IOMUXC_GPIO_B0_13_GPIO2_IO13 0x401F8170U, 0x5U, 0, 0, 0x401F8360U
741#define IOMUXC_GPIO_B0_13_SRC_BT_CFG09 0x401F8170U, 0x6U, 0, 0, 0x401F8360U
742
743#define IOMUXC_GPIO_B0_14_LCD_DATA10 0x401F8174U, 0x0U, 0, 0, 0x401F8364U
744#define IOMUXC_GPIO_B0_14_XBAR1_INOUT12 0x401F8174U, 0x1U, 0, 0, 0x401F8364U
745#define IOMUXC_GPIO_B0_14_ARM_CM7_TXEV 0x401F8174U, 0x2U, 0, 0, 0x401F8364U
746#define IOMUXC_GPIO_B0_14_SAI1_RX_SYNC 0x401F8174U, 0x3U, 0x401F85A4U, 0x2U, 0x401F8364U
747#define IOMUXC_GPIO_B0_14_FLEXIO2_D14 0x401F8174U, 0x4U, 0, 0, 0x401F8364U
748#define IOMUXC_GPIO_B0_14_GPIO2_IO14 0x401F8174U, 0x5U, 0, 0, 0x401F8364U
749#define IOMUXC_GPIO_B0_14_SRC_BT_CFG10 0x401F8174U, 0x6U, 0, 0, 0x401F8364U
750
751#define IOMUXC_GPIO_B0_15_LCD_DATA11 0x401F8178U, 0x0U, 0, 0, 0x401F8368U
752#define IOMUXC_GPIO_B0_15_XBAR1_INOUT13 0x401F8178U, 0x1U, 0, 0, 0x401F8368U
753#define IOMUXC_GPIO_B0_15_ARM_CM7_RXEV 0x401F8178U, 0x2U, 0, 0, 0x401F8368U
754#define IOMUXC_GPIO_B0_15_SAI1_RX_BCLK 0x401F8178U, 0x3U, 0x401F8590U, 0x2U, 0x401F8368U
755#define IOMUXC_GPIO_B0_15_FLEXIO2_D15 0x401F8178U, 0x4U, 0, 0, 0x401F8368U
756#define IOMUXC_GPIO_B0_15_GPIO2_IO15 0x401F8178U, 0x5U, 0, 0, 0x401F8368U
757#define IOMUXC_GPIO_B0_15_SRC_BT_CFG11 0x401F8178U, 0x6U, 0, 0, 0x401F8368U
758
759#define IOMUXC_GPIO_B1_00_LCD_DATA12 0x401F817CU, 0x0U, 0, 0, 0x401F836CU
760#define IOMUXC_GPIO_B1_00_XBAR1_INOUT14 0x401F817CU, 0x1U, 0x401F8644U, 0x1U, 0x401F836CU
761#define IOMUXC_GPIO_B1_00_LPUART4_TXD 0x401F817CU, 0x2U, 0x401F8544U, 0x2U, 0x401F836CU
762#define IOMUXC_GPIO_B1_00_SAI1_RX_DATA00 0x401F817CU, 0x3U, 0x401F8594U, 0x2U, 0x401F836CU
763#define IOMUXC_GPIO_B1_00_FLEXIO2_D16 0x401F817CU, 0x4U, 0, 0, 0x401F836CU
764#define IOMUXC_GPIO_B1_00_GPIO2_IO16 0x401F817CU, 0x5U, 0, 0, 0x401F836CU
765#define IOMUXC_GPIO_B1_00_FLEXPWM1_PWM3_A 0x401F817CU, 0x6U, 0x401F8454U, 0x4U, 0x401F836CU
766
767#define IOMUXC_GPIO_B1_01_LCD_DATA13 0x401F8180U, 0x0U, 0, 0, 0x401F8370U
768#define IOMUXC_GPIO_B1_01_XBAR1_INOUT15 0x401F8180U, 0x1U, 0x401F8648U, 0x1U, 0x401F8370U
769#define IOMUXC_GPIO_B1_01_LPUART4_RXD 0x401F8180U, 0x2U, 0x401F8540U, 0x2U, 0x401F8370U
770#define IOMUXC_GPIO_B1_01_SAI1_TX_DATA00 0x401F8180U, 0x3U, 0, 0, 0x401F8370U
771#define IOMUXC_GPIO_B1_01_FLEXIO2_D17 0x401F8180U, 0x4U, 0, 0, 0x401F8370U
772#define IOMUXC_GPIO_B1_01_GPIO2_IO17 0x401F8180U, 0x5U, 0, 0, 0x401F8370U
773#define IOMUXC_GPIO_B1_01_FLEXPWM1_PWM3_B 0x401F8180U, 0x6U, 0x401F8464U, 0x4U, 0x401F8370U
774
775#define IOMUXC_GPIO_B1_02_LCD_DATA14 0x401F8184U, 0x0U, 0, 0, 0x401F8374U
776#define IOMUXC_GPIO_B1_02_XBAR1_INOUT16 0x401F8184U, 0x1U, 0x401F864CU, 0x1U, 0x401F8374U
777#define IOMUXC_GPIO_B1_02_LPSPI4_PCS2 0x401F8184U, 0x2U, 0, 0, 0x401F8374U
778#define IOMUXC_GPIO_B1_02_SAI1_TX_BCLK 0x401F8184U, 0x3U, 0x401F85A8U, 0x2U, 0x401F8374U
779#define IOMUXC_GPIO_B1_02_FLEXIO2_D18 0x401F8184U, 0x4U, 0, 0, 0x401F8374U
780#define IOMUXC_GPIO_B1_02_GPIO2_IO18 0x401F8184U, 0x5U, 0, 0, 0x401F8374U
781#define IOMUXC_GPIO_B1_02_FLEXPWM2_PWM3_A 0x401F8184U, 0x6U, 0x401F8474U, 0x4U, 0x401F8374U
782
783#define IOMUXC_GPIO_B1_03_LCD_DATA15 0x401F8188U, 0x0U, 0, 0, 0x401F8378U
784#define IOMUXC_GPIO_B1_03_XBAR1_INOUT17 0x401F8188U, 0x1U, 0x401F862CU, 0x3U, 0x401F8378U
785#define IOMUXC_GPIO_B1_03_LPSPI4_PCS1 0x401F8188U, 0x2U, 0, 0, 0x401F8378U
786#define IOMUXC_GPIO_B1_03_SAI1_TX_SYNC 0x401F8188U, 0x3U, 0x401F85ACU, 0x2U, 0x401F8378U
787#define IOMUXC_GPIO_B1_03_FLEXIO2_D19 0x401F8188U, 0x4U, 0, 0, 0x401F8378U
788#define IOMUXC_GPIO_B1_03_GPIO2_IO19 0x401F8188U, 0x5U, 0, 0, 0x401F8378U
789#define IOMUXC_GPIO_B1_03_FLEXPWM2_PWM3_B 0x401F8188U, 0x6U, 0x401F8484U, 0x3U, 0x401F8378U
790
791#define IOMUXC_GPIO_B1_04_LCD_DATA16 0x401F818CU, 0x0U, 0, 0, 0x401F837CU
792#define IOMUXC_GPIO_B1_04_LPSPI4_PCS0 0x401F818CU, 0x1U, 0x401F851CU, 0x1U, 0x401F837CU
793#define IOMUXC_GPIO_B1_04_CSI_DATA15 0x401F818CU, 0x2U, 0, 0, 0x401F837CU
794#define IOMUXC_GPIO_B1_04_ENET_RX_DATA00 0x401F818CU, 0x3U, 0x401F8434U, 0x1U, 0x401F837CU
795#define IOMUXC_GPIO_B1_04_FLEXIO2_D20 0x401F818CU, 0x4U, 0, 0, 0x401F837CU
796#define IOMUXC_GPIO_B1_04_GPIO2_IO20 0x401F818CU, 0x5U, 0, 0, 0x401F837CU
797
798#define IOMUXC_GPIO_B1_05_LCD_DATA17 0x401F8190U, 0x0U, 0, 0, 0x401F8380U
799#define IOMUXC_GPIO_B1_05_LPSPI4_SDI 0x401F8190U, 0x1U, 0x401F8524U, 0x1U, 0x401F8380U
800#define IOMUXC_GPIO_B1_05_CSI_DATA14 0x401F8190U, 0x2U, 0, 0, 0x401F8380U
801#define IOMUXC_GPIO_B1_05_ENET_RX_DATA01 0x401F8190U, 0x3U, 0x401F8438U, 0x1U, 0x401F8380U
802#define IOMUXC_GPIO_B1_05_FLEXIO2_D21 0x401F8190U, 0x4U, 0, 0, 0x401F8380U
803#define IOMUXC_GPIO_B1_05_GPIO2_IO21 0x401F8190U, 0x5U, 0, 0, 0x401F8380U
804
805#define IOMUXC_GPIO_B1_06_LCD_DATA18 0x401F8194U, 0x0U, 0, 0, 0x401F8384U
806#define IOMUXC_GPIO_B1_06_LPSPI4_SDO 0x401F8194U, 0x1U, 0x401F8528U, 0x1U, 0x401F8384U
807#define IOMUXC_GPIO_B1_06_CSI_DATA13 0x401F8194U, 0x2U, 0, 0, 0x401F8384U
808#define IOMUXC_GPIO_B1_06_ENET_RX_EN 0x401F8194U, 0x3U, 0x401F843CU, 0x1U, 0x401F8384U
809#define IOMUXC_GPIO_B1_06_FLEXIO2_D22 0x401F8194U, 0x4U, 0, 0, 0x401F8384U
810#define IOMUXC_GPIO_B1_06_GPIO2_IO22 0x401F8194U, 0x5U, 0, 0, 0x401F8384U
811
812#define IOMUXC_GPIO_B1_07_LCD_DATA19 0x401F8198U, 0x0U, 0, 0, 0x401F8388U
813#define IOMUXC_GPIO_B1_07_LPSPI4_SCK 0x401F8198U, 0x1U, 0x401F8520U, 0x1U, 0x401F8388U
814#define IOMUXC_GPIO_B1_07_CSI_DATA12 0x401F8198U, 0x2U, 0, 0, 0x401F8388U
815#define IOMUXC_GPIO_B1_07_ENET_TX_DATA00 0x401F8198U, 0x3U, 0, 0, 0x401F8388U
816#define IOMUXC_GPIO_B1_07_FLEXIO2_D23 0x401F8198U, 0x4U, 0, 0, 0x401F8388U
817#define IOMUXC_GPIO_B1_07_GPIO2_IO23 0x401F8198U, 0x5U, 0, 0, 0x401F8388U
818
819#define IOMUXC_GPIO_B1_08_LCD_DATA20 0x401F819CU, 0x0U, 0, 0, 0x401F838CU
820#define IOMUXC_GPIO_B1_08_TMR1_TIMER3 0x401F819CU, 0x1U, 0, 0, 0x401F838CU
821#define IOMUXC_GPIO_B1_08_CSI_DATA11 0x401F819CU, 0x2U, 0, 0, 0x401F838CU
822#define IOMUXC_GPIO_B1_08_ENET_TX_DATA01 0x401F819CU, 0x3U, 0, 0, 0x401F838CU
823#define IOMUXC_GPIO_B1_08_FLEXIO2_D24 0x401F819CU, 0x4U, 0, 0, 0x401F838CU
824#define IOMUXC_GPIO_B1_08_GPIO2_IO24 0x401F819CU, 0x5U, 0, 0, 0x401F838CU
825#define IOMUXC_GPIO_B1_08_FLEXCAN2_TX 0x401F819CU, 0x6U, 0, 0, 0x401F838CU
826
827#define IOMUXC_GPIO_B1_09_LCD_DATA21 0x401F81A0U, 0x0U, 0, 0, 0x401F8390U
828#define IOMUXC_GPIO_B1_09_TMR2_TIMER3 0x401F81A0U, 0x1U, 0x401F8578U, 0x1U, 0x401F8390U
829#define IOMUXC_GPIO_B1_09_CSI_DATA10 0x401F81A0U, 0x2U, 0, 0, 0x401F8390U
830#define IOMUXC_GPIO_B1_09_ENET_TX_EN 0x401F81A0U, 0x3U, 0, 0, 0x401F8390U
831#define IOMUXC_GPIO_B1_09_FLEXIO2_D25 0x401F81A0U, 0x4U, 0, 0, 0x401F8390U
832#define IOMUXC_GPIO_B1_09_GPIO2_IO25 0x401F81A0U, 0x5U, 0, 0, 0x401F8390U
833#define IOMUXC_GPIO_B1_09_FLEXCAN2_RX 0x401F81A0U, 0x6U, 0x401F8450U, 0x3U, 0x401F8390U
834
835#define IOMUXC_GPIO_B1_10_LCD_DATA22 0x401F81A4U, 0x0U, 0, 0, 0x401F8394U
836#define IOMUXC_GPIO_B1_10_TMR3_TIMER3 0x401F81A4U, 0x1U, 0x401F8588U, 0x2U, 0x401F8394U
837#define IOMUXC_GPIO_B1_10_CSI_DATA00 0x401F81A4U, 0x2U, 0, 0, 0x401F8394U
838#define IOMUXC_GPIO_B1_10_ENET_TX_CLK 0x401F81A4U, 0x3U, 0x401F8448U, 0x1U, 0x401F8394U
839#define IOMUXC_GPIO_B1_10_FLEXIO2_D26 0x401F81A4U, 0x4U, 0, 0, 0x401F8394U
840#define IOMUXC_GPIO_B1_10_GPIO2_IO26 0x401F81A4U, 0x5U, 0, 0, 0x401F8394U
841#define IOMUXC_GPIO_B1_10_ENET_REF_CLK 0x401F81A4U, 0x6U, 0x401F842CU, 0x1U, 0x401F8394U
842
843#define IOMUXC_GPIO_B1_11_LCD_DATA23 0x401F81A8U, 0x0U, 0, 0, 0x401F8398U
844#define IOMUXC_GPIO_B1_11_TMR4_TIMER3 0x401F81A8U, 0x1U, 0, 0, 0x401F8398U
845#define IOMUXC_GPIO_B1_11_CSI_DATA01 0x401F81A8U, 0x2U, 0, 0, 0x401F8398U
846#define IOMUXC_GPIO_B1_11_ENET_RX_ER 0x401F81A8U, 0x3U, 0x401F8440U, 0x1U, 0x401F8398U
847#define IOMUXC_GPIO_B1_11_FLEXIO2_D27 0x401F81A8U, 0x4U, 0, 0, 0x401F8398U
848#define IOMUXC_GPIO_B1_11_GPIO2_IO27 0x401F81A8U, 0x5U, 0, 0, 0x401F8398U
849#define IOMUXC_GPIO_B1_11_LPSPI4_PCS3 0x401F81A8U, 0x6U, 0, 0, 0x401F8398U
850
851#define IOMUXC_GPIO_B1_12_LPUART5_TXD 0x401F81ACU, 0x1U, 0x401F854CU, 0x1U, 0x401F839CU
852#define IOMUXC_GPIO_B1_12_CSI_PIXCLK 0x401F81ACU, 0x2U, 0x401F8424U, 0x1U, 0x401F839CU
853#define IOMUXC_GPIO_B1_12_ENET_1588_EVENT0_IN 0x401F81ACU, 0x3U, 0x401F8444U, 0x2U, 0x401F839CU
854#define IOMUXC_GPIO_B1_12_FLEXIO2_D28 0x401F81ACU, 0x4U, 0, 0, 0x401F839CU
855#define IOMUXC_GPIO_B1_12_GPIO2_IO28 0x401F81ACU, 0x5U, 0, 0, 0x401F839CU
856#define IOMUXC_GPIO_B1_12_USDHC1_CD_B 0x401F81ACU, 0x6U, 0x401F85D4U, 0x2U, 0x401F839CU
857
858#define IOMUXC_GPIO_B1_13_WDOG1_B 0x401F81B0U, 0x0U, 0, 0, 0x401F83A0U
859#define IOMUXC_GPIO_B1_13_LPUART5_RXD 0x401F81B0U, 0x1U, 0x401F8548U, 0x1U, 0x401F83A0U
860#define IOMUXC_GPIO_B1_13_CSI_VSYNC 0x401F81B0U, 0x2U, 0x401F8428U, 0x2U, 0x401F83A0U
861#define IOMUXC_GPIO_B1_13_ENET_1588_EVENT0_OUT 0x401F81B0U, 0x3U, 0, 0, 0x401F83A0U
862#define IOMUXC_GPIO_B1_13_FLEXIO2_D29 0x401F81B0U, 0x4U, 0, 0, 0x401F83A0U
863#define IOMUXC_GPIO_B1_13_GPIO2_IO29 0x401F81B0U, 0x5U, 0, 0, 0x401F83A0U
864#define IOMUXC_GPIO_B1_13_USDHC1_WP 0x401F81B0U, 0x6U, 0x401F85D8U, 0x3U, 0x401F83A0U
865
866#define IOMUXC_GPIO_B1_14_ENET_MDC 0x401F81B4U, 0x0U, 0, 0, 0x401F83A4U
867#define IOMUXC_GPIO_B1_14_FLEXPWM4_PWM2_A 0x401F81B4U, 0x1U, 0x401F849CU, 0x1U, 0x401F83A4U
868#define IOMUXC_GPIO_B1_14_CSI_HSYNC 0x401F81B4U, 0x2U, 0x401F8420U, 0x2U, 0x401F83A4U
869#define IOMUXC_GPIO_B1_14_XBAR1_IN02 0x401F81B4U, 0x3U, 0x401F860CU, 0x1U, 0x401F83A4U
870#define IOMUXC_GPIO_B1_14_FLEXIO2_D30 0x401F81B4U, 0x4U, 0, 0, 0x401F83A4U
871#define IOMUXC_GPIO_B1_14_GPIO2_IO30 0x401F81B4U, 0x5U, 0, 0, 0x401F83A4U
872#define IOMUXC_GPIO_B1_14_USDHC1_VSELECT 0x401F81B4U, 0x6U, 0, 0, 0x401F83A4U
873
874#define IOMUXC_GPIO_B1_15_ENET_MDIO 0x401F81B8U, 0x0U, 0x401F8430U, 0x2U, 0x401F83A8U
875#define IOMUXC_GPIO_B1_15_FLEXPWM4_PWM3_A 0x401F81B8U, 0x1U, 0x401F84A0U, 0x1U, 0x401F83A8U
876#define IOMUXC_GPIO_B1_15_CSI_MCLK 0x401F81B8U, 0x2U, 0, 0, 0x401F83A8U
877#define IOMUXC_GPIO_B1_15_XBAR1_IN03 0x401F81B8U, 0x3U, 0x401F8610U, 0x1U, 0x401F83A8U
878#define IOMUXC_GPIO_B1_15_FLEXIO2_D31 0x401F81B8U, 0x4U, 0, 0, 0x401F83A8U
879#define IOMUXC_GPIO_B1_15_GPIO2_IO31 0x401F81B8U, 0x5U, 0, 0, 0x401F83A8U
880#define IOMUXC_GPIO_B1_15_USDHC1_RESET_B 0x401F81B8U, 0x6U, 0, 0, 0x401F83A8U
881
882#define IOMUXC_GPIO_SD_B0_00_USDHC1_CMD 0x401F81BCU, 0x0U, 0, 0, 0x401F83ACU
883#define IOMUXC_GPIO_SD_B0_00_FLEXPWM1_PWM0_A 0x401F81BCU, 0x1U, 0x401F8458U, 0x1U, 0x401F83ACU
884#define IOMUXC_GPIO_SD_B0_00_LPI2C3_SCL 0x401F81BCU, 0x2U, 0x401F84DCU, 0x1U, 0x401F83ACU
885#define IOMUXC_GPIO_SD_B0_00_XBAR1_INOUT04 0x401F81BCU, 0x3U, 0x401F8614U, 0x1U, 0x401F83ACU
886#define IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK 0x401F81BCU, 0x4U, 0x401F84F0U, 0x1U, 0x401F83ACU
887#define IOMUXC_GPIO_SD_B0_00_GPIO3_IO12 0x401F81BCU, 0x5U, 0, 0, 0x401F83ACU
888#define IOMUXC_GPIO_SD_B0_00_FLEXSPI_A_SS1_B 0x401F81BCU, 0x6U, 0, 0, 0x401F83ACU
889
890#define IOMUXC_GPIO_SD_B0_01_USDHC1_CLK 0x401F81C0U, 0x0U, 0, 0, 0x401F83B0U
891#define IOMUXC_GPIO_SD_B0_01_FLEXPWM1_PWM0_B 0x401F81C0U, 0x1U, 0x401F8468U, 0x1U, 0x401F83B0U
892#define IOMUXC_GPIO_SD_B0_01_LPI2C3_SDA 0x401F81C0U, 0x2U, 0x401F84E0U, 0x1U, 0x401F83B0U
893#define IOMUXC_GPIO_SD_B0_01_XBAR1_INOUT05 0x401F81C0U, 0x3U, 0x401F8618U, 0x1U, 0x401F83B0U
894#define IOMUXC_GPIO_SD_B0_01_LPSPI1_PCS0 0x401F81C0U, 0x4U, 0x401F84ECU, 0x0U, 0x401F83B0U
895#define IOMUXC_GPIO_SD_B0_01_GPIO3_IO13 0x401F81C0U, 0x5U, 0, 0, 0x401F83B0U
896#define IOMUXC_GPIO_SD_B0_01_FLEXSPI_B_SS1_B 0x401F81C0U, 0x6U, 0, 0, 0x401F83B0U
897
898#define IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0 0x401F81C4U, 0x0U, 0, 0, 0x401F83B4U
899#define IOMUXC_GPIO_SD_B0_02_FLEXPWM1_PWM1_A 0x401F81C4U, 0x1U, 0x401F845CU, 0x1U, 0x401F83B4U
900#define IOMUXC_GPIO_SD_B0_02_LPUART8_CTS_B 0x401F81C4U, 0x2U, 0, 0, 0x401F83B4U
901#define IOMUXC_GPIO_SD_B0_02_XBAR1_INOUT06 0x401F81C4U, 0x3U, 0x401F861CU, 0x1U, 0x401F83B4U
902#define IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO 0x401F81C4U, 0x4U, 0x401F84F8U, 0x1U, 0x401F83B4U
903#define IOMUXC_GPIO_SD_B0_02_GPIO3_IO14 0x401F81C4U, 0x5U, 0, 0, 0x401F83B4U
904
905#define IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1 0x401F81C8U, 0x0U, 0, 0, 0x401F83B8U
906#define IOMUXC_GPIO_SD_B0_03_FLEXPWM1_PWM1_B 0x401F81C8U, 0x1U, 0x401F846CU, 0x1U, 0x401F83B8U
907#define IOMUXC_GPIO_SD_B0_03_LPUART8_RTS_B 0x401F81C8U, 0x2U, 0, 0, 0x401F83B8U
908#define IOMUXC_GPIO_SD_B0_03_XBAR1_INOUT07 0x401F81C8U, 0x3U, 0x401F8620U, 0x1U, 0x401F83B8U
909#define IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI 0x401F81C8U, 0x4U, 0x401F84F4U, 0x1U, 0x401F83B8U
910#define IOMUXC_GPIO_SD_B0_03_GPIO3_IO15 0x401F81C8U, 0x5U, 0, 0, 0x401F83B8U
911
912#define IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2 0x401F81CCU, 0x0U, 0, 0, 0x401F83BCU
913#define IOMUXC_GPIO_SD_B0_04_FLEXPWM1_PWM2_A 0x401F81CCU, 0x1U, 0x401F8460U, 0x1U, 0x401F83BCU
914#define IOMUXC_GPIO_SD_B0_04_LPUART8_TXD 0x401F81CCU, 0x2U, 0x401F8564U, 0x0U, 0x401F83BCU
915#define IOMUXC_GPIO_SD_B0_04_XBAR1_INOUT08 0x401F81CCU, 0x3U, 0x401F8624U, 0x1U, 0x401F83BCU
916#define IOMUXC_GPIO_SD_B0_04_FLEXSPI_B_SS0_B 0x401F81CCU, 0x4U, 0, 0, 0x401F83BCU
917#define IOMUXC_GPIO_SD_B0_04_GPIO3_IO16 0x401F81CCU, 0x5U, 0, 0, 0x401F83BCU
918#define IOMUXC_GPIO_SD_B0_04_CCM_CLKO1 0x401F81CCU, 0x6U, 0, 0, 0x401F83BCU
919
920#define IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3 0x401F81D0U, 0x0U, 0, 0, 0x401F83C0U
921#define IOMUXC_GPIO_SD_B0_05_FLEXPWM1_PWM2_B 0x401F81D0U, 0x1U, 0x401F8470U, 0x1U, 0x401F83C0U
922#define IOMUXC_GPIO_SD_B0_05_LPUART8_RXD 0x401F81D0U, 0x2U, 0x401F8560U, 0x0U, 0x401F83C0U
923#define IOMUXC_GPIO_SD_B0_05_XBAR1_INOUT09 0x401F81D0U, 0x3U, 0x401F8628U, 0x1U, 0x401F83C0U
924#define IOMUXC_GPIO_SD_B0_05_FLEXSPI_B_DQS 0x401F81D0U, 0x4U, 0, 0, 0x401F83C0U
925#define IOMUXC_GPIO_SD_B0_05_GPIO3_IO17 0x401F81D0U, 0x5U, 0, 0, 0x401F83C0U
926#define IOMUXC_GPIO_SD_B0_05_CCM_CLKO2 0x401F81D0U, 0x6U, 0, 0, 0x401F83C0U
927
928#define IOMUXC_GPIO_SD_B1_00_USDHC2_DATA3 0x401F81D4U, 0x0U, 0x401F85F4U, 0x0U, 0x401F83C4U
929#define IOMUXC_GPIO_SD_B1_00_FLEXSPI_B_DATA3 0x401F81D4U, 0x1U, 0x401F84C4U, 0x0U, 0x401F83C4U
930#define IOMUXC_GPIO_SD_B1_00_FLEXPWM1_PWM3_A 0x401F81D4U, 0x2U, 0x401F8454U, 0x0U, 0x401F83C4U
931#define IOMUXC_GPIO_SD_B1_00_SAI1_TX_DATA03 0x401F81D4U, 0x3U, 0x401F8598U, 0x0U, 0x401F83C4U
932#define IOMUXC_GPIO_SD_B1_00_LPUART4_TXD 0x401F81D4U, 0x4U, 0x401F8544U, 0x0U, 0x401F83C4U
933#define IOMUXC_GPIO_SD_B1_00_GPIO3_IO00 0x401F81D4U, 0x5U, 0, 0, 0x401F83C4U
934
935#define IOMUXC_GPIO_SD_B1_01_USDHC2_DATA2 0x401F81D8U, 0x0U, 0x401F85F0U, 0x0U, 0x401F83C8U
936#define IOMUXC_GPIO_SD_B1_01_FLEXSPI_B_DATA2 0x401F81D8U, 0x1U, 0x401F84C0U, 0x0U, 0x401F83C8U
937#define IOMUXC_GPIO_SD_B1_01_FLEXPWM1_PWM3_B 0x401F81D8U, 0x2U, 0x401F8464U, 0x0U, 0x401F83C8U
938#define IOMUXC_GPIO_SD_B1_01_SAI1_TX_DATA02 0x401F81D8U, 0x3U, 0x401F859CU, 0x0U, 0x401F83C8U
939#define IOMUXC_GPIO_SD_B1_01_LPUART4_RXD 0x401F81D8U, 0x4U, 0x401F8540U, 0x0U, 0x401F83C8U
940#define IOMUXC_GPIO_SD_B1_01_GPIO3_IO01 0x401F81D8U, 0x5U, 0, 0, 0x401F83C8U
941
942#define IOMUXC_GPIO_SD_B1_02_USDHC2_DATA1 0x401F81DCU, 0x0U, 0x401F85ECU, 0x0U, 0x401F83CCU
943#define IOMUXC_GPIO_SD_B1_02_FLEXSPI_B_DATA1 0x401F81DCU, 0x1U, 0x401F84BCU, 0x0U, 0x401F83CCU
944#define IOMUXC_GPIO_SD_B1_02_FLEXPWM2_PWM3_A 0x401F81DCU, 0x2U, 0x401F8474U, 0x0U, 0x401F83CCU
945#define IOMUXC_GPIO_SD_B1_02_SAI1_TX_DATA01 0x401F81DCU, 0x3U, 0x401F85A0U, 0x0U, 0x401F83CCU
946#define IOMUXC_GPIO_SD_B1_02_FLEXCAN1_TX 0x401F81DCU, 0x4U, 0, 0, 0x401F83CCU
947#define IOMUXC_GPIO_SD_B1_02_GPIO3_IO02 0x401F81DCU, 0x5U, 0, 0, 0x401F83CCU
948#define IOMUXC_GPIO_SD_B1_02_CCM_WAIT 0x401F81DCU, 0x6U, 0, 0, 0x401F83CCU
949
950#define IOMUXC_GPIO_SD_B1_03_USDHC2_DATA0 0x401F81E0U, 0x0U, 0x401F85E8U, 0x0U, 0x401F83D0U
951#define IOMUXC_GPIO_SD_B1_03_FLEXSPI_B_DATA0 0x401F81E0U, 0x1U, 0x401F84B8U, 0x0U, 0x401F83D0U
952#define IOMUXC_GPIO_SD_B1_03_FLEXPWM2_PWM3_B 0x401F81E0U, 0x2U, 0x401F8484U, 0x0U, 0x401F83D0U
953#define IOMUXC_GPIO_SD_B1_03_SAI1_MCLK 0x401F81E0U, 0x3U, 0x401F858CU, 0x0U, 0x401F83D0U
954#define IOMUXC_GPIO_SD_B1_03_FLEXCAN1_RX 0x401F81E0U, 0x4U, 0x401F844CU, 0x0U, 0x401F83D0U
955#define IOMUXC_GPIO_SD_B1_03_GPIO3_IO03 0x401F81E0U, 0x5U, 0, 0, 0x401F83D0U
956#define IOMUXC_GPIO_SD_B1_03_CCM_PMIC_READY 0x401F81E0U, 0x6U, 0x401F83FCU, 0x0U, 0x401F83D0U
957
958#define IOMUXC_GPIO_SD_B1_04_USDHC2_CLK 0x401F81E4U, 0x0U, 0x401F85DCU, 0x0U, 0x401F83D4U
959#define IOMUXC_GPIO_SD_B1_04_FLEXSPI_B_SCLK 0x401F81E4U, 0x1U, 0, 0, 0x401F83D4U
960#define IOMUXC_GPIO_SD_B1_04_LPI2C1_SCL 0x401F81E4U, 0x2U, 0x401F84CCU, 0x0U, 0x401F83D4U
961#define IOMUXC_GPIO_SD_B1_04_SAI1_RX_SYNC 0x401F81E4U, 0x3U, 0x401F85A4U, 0x0U, 0x401F83D4U
962#define IOMUXC_GPIO_SD_B1_04_FLEXSPI_A_SS1_B 0x401F81E4U, 0x4U, 0, 0, 0x401F83D4U
963#define IOMUXC_GPIO_SD_B1_04_GPIO3_IO04 0x401F81E4U, 0x5U, 0, 0, 0x401F83D4U
964#define IOMUXC_GPIO_SD_B1_04_CCM_STOP 0x401F81E4U, 0x6U, 0, 0, 0x401F83D4U
965
966#define IOMUXC_GPIO_SD_B1_05_USDHC2_CMD 0x401F81E8U, 0x0U, 0x401F85E4U, 0x0U, 0x401F83D8U
967#define IOMUXC_GPIO_SD_B1_05_FLEXSPI_A_DQS 0x401F81E8U, 0x1U, 0x401F84A4U, 0x0U, 0x401F83D8U
968#define IOMUXC_GPIO_SD_B1_05_LPI2C1_SDA 0x401F81E8U, 0x2U, 0x401F84D0U, 0x0U, 0x401F83D8U
969#define IOMUXC_GPIO_SD_B1_05_SAI1_RX_BCLK 0x401F81E8U, 0x3U, 0x401F8590U, 0x0U, 0x401F83D8U
970#define IOMUXC_GPIO_SD_B1_05_FLEXSPI_B_SS0_B 0x401F81E8U, 0x4U, 0, 0, 0x401F83D8U
971#define IOMUXC_GPIO_SD_B1_05_GPIO3_IO05 0x401F81E8U, 0x5U, 0, 0, 0x401F83D8U
972
973#define IOMUXC_GPIO_SD_B1_06_USDHC2_RESET_B 0x401F81ECU, 0x0U, 0, 0, 0x401F83DCU
974#define IOMUXC_GPIO_SD_B1_06_FLEXSPI_A_SS0_B 0x401F81ECU, 0x1U, 0, 0, 0x401F83DCU
975#define IOMUXC_GPIO_SD_B1_06_LPUART7_CTS_B 0x401F81ECU, 0x2U, 0, 0, 0x401F83DCU
976#define IOMUXC_GPIO_SD_B1_06_SAI1_RX_DATA00 0x401F81ECU, 0x3U, 0x401F8594U, 0x0U, 0x401F83DCU
977#define IOMUXC_GPIO_SD_B1_06_LPSPI2_PCS0 0x401F81ECU, 0x4U, 0x401F84FCU, 0x0U, 0x401F83DCU
978#define IOMUXC_GPIO_SD_B1_06_GPIO3_IO06 0x401F81ECU, 0x5U, 0, 0, 0x401F83DCU
979
980#define IOMUXC_GPIO_SD_B1_07_SEMC_CSX1 0x401F81F0U, 0x0U, 0, 0, 0x401F83E0U
981#define IOMUXC_GPIO_SD_B1_07_FLEXSPI_A_SCLK 0x401F81F0U, 0x1U, 0x401F84C8U, 0x0U, 0x401F83E0U
982#define IOMUXC_GPIO_SD_B1_07_LPUART7_RTS_B 0x401F81F0U, 0x2U, 0, 0, 0x401F83E0U
983#define IOMUXC_GPIO_SD_B1_07_SAI1_TX_DATA00 0x401F81F0U, 0x3U, 0, 0, 0x401F83E0U
984#define IOMUXC_GPIO_SD_B1_07_LPSPI2_SCK 0x401F81F0U, 0x4U, 0x401F8500U, 0x0U, 0x401F83E0U
985#define IOMUXC_GPIO_SD_B1_07_GPIO3_IO07 0x401F81F0U, 0x5U, 0, 0, 0x401F83E0U
986#define IOMUXC_GPIO_SD_B1_07_CCM_REF_EN_B 0x401F81F0U, 0x6U, 0, 0, 0x401F83E0U
987
988#define IOMUXC_GPIO_SD_B1_08_USDHC2_DATA4 0x401F81F4U, 0x0U, 0x401F85F8U, 0x0U, 0x401F83E4U
989#define IOMUXC_GPIO_SD_B1_08_FLEXSPI_A_DATA00 0x401F81F4U, 0x1U, 0x401F84A8U, 0x0U, 0x401F83E4U
990#define IOMUXC_GPIO_SD_B1_08_LPUART7_TXD 0x401F81F4U, 0x2U, 0x401F855CU, 0x0U, 0x401F83E4U
991#define IOMUXC_GPIO_SD_B1_08_SAI1_TX_BCLK 0x401F81F4U, 0x3U, 0x401F85A8U, 0x0U, 0x401F83E4U
992#define IOMUXC_GPIO_SD_B1_08_LPSPI2_SD0 0x401F81F4U, 0x4U, 0x401F8508U, 0x0U, 0x401F83E4U
993#define IOMUXC_GPIO_SD_B1_08_GPIO3_IO08 0x401F81F4U, 0x5U, 0, 0, 0x401F83E4U
994#define IOMUXC_GPIO_SD_B1_08_SEMC_CSX2 0x401F81F4U, 0x6U, 0, 0, 0x401F83E4U
995
996#define IOMUXC_GPIO_SD_B1_09_USDHC2_DATA5 0x401F81F8U, 0x0U, 0x401F85FCU, 0x0U, 0x401F83E8U
997#define IOMUXC_GPIO_SD_B1_09_FLEXSPI_A_DATA1 0x401F81F8U, 0x1U, 0x401F84ACU, 0x0U, 0x401F83E8U
998#define IOMUXC_GPIO_SD_B1_09_LPUART7_RXD 0x401F81F8U, 0x2U, 0x401F8558U, 0x0U, 0x401F83E8U
999#define IOMUXC_GPIO_SD_B1_09_SAI1_TX_SYNC 0x401F81F8U, 0x3U, 0x401F85ACU, 0x0U, 0x401F83E8U
1000#define IOMUXC_GPIO_SD_B1_09_LPSPI2_SDI 0x401F81F8U, 0x4U, 0x401F8504U, 0x0U, 0x401F83E8U
1001#define IOMUXC_GPIO_SD_B1_09_GPIO3_IO09 0x401F81F8U, 0x5U, 0, 0, 0x401F83E8U
1002
1003#define IOMUXC_GPIO_SD_B1_10_USDHC2_DATA6 0x401F81FCU, 0x0U, 0x401F8600U, 0x0U, 0x401F83ECU
1004#define IOMUXC_GPIO_SD_B1_10_FLEXSPI_A_DATA2 0x401F81FCU, 0x1U, 0x401F84B0U, 0x0U, 0x401F83ECU
1005#define IOMUXC_GPIO_SD_B1_10_LPUART2_RXD 0x401F81FCU, 0x2U, 0x401F852CU, 0x0U, 0x401F83ECU
1006#define IOMUXC_GPIO_SD_B1_10_LPI2C2_SDA 0x401F81FCU, 0x3U, 0x401F84D8U, 0x0U, 0x401F83ECU
1007#define IOMUXC_GPIO_SD_B1_10_LPSPI2_PCS2 0x401F81FCU, 0x4U, 0, 0, 0x401F83ECU
1008#define IOMUXC_GPIO_SD_B1_10_GPIO3_IO10 0x401F81FCU, 0x5U, 0, 0, 0x401F83ECU
1009
1010#define IOMUXC_GPIO_SD_B1_11_USDHC2_DATA7 0x401F8200U, 0x0U, 0x401F8604U, 0x0U, 0x401F83F0U
1011#define IOMUXC_GPIO_SD_B1_11_FLEXSPI_A_DATA3 0x401F8200U, 0x1U, 0x401F84B4U, 0x0U, 0x401F83F0U
1012#define IOMUXC_GPIO_SD_B1_11_LPUART2_TXD 0x401F8200U, 0x2U, 0x401F8530U, 0x0U, 0x401F83F0U
1013#define IOMUXC_GPIO_SD_B1_11_LPI2C2_SCL 0x401F8200U, 0x3U, 0x401F84D4U, 0x0U, 0x401F83F0U
1014#define IOMUXC_GPIO_SD_B1_11_LPSPI2_PCS3 0x401F8200U, 0x4U, 0, 0, 0x401F83F0U
1015#define IOMUXC_GPIO_SD_B1_11_GPIO3_IO11 0x401F8200U, 0x5U, 0, 0, 0x401F83F0U
1016
1017#define IOMUXC_SNVS_WAKEUP_GPIO5_IO00 0x400A8000U, 0x5U, 0, 0, 0x400A8018U
1018#define IOMUXC_SNVS_WAKEUP_NMI 0x400A8000U, 0x7U, 0x401F8568U, 0x1U, 0x400A8018U
1019
1020#define IOMUXC_SNVS_PMIC_ON_REQ_SNVS_PMIC_ON_REQ 0x400A8004U, 0x0U, 0, 0, 0x400A801CU
1021#define IOMUXC_SNVS_PMIC_ON_REQ_GPIO5_IO01 0x400A8004U, 0x5U, 0, 0, 0x400A801CU
1022
1023#define IOMUXC_SNVS_PMIC_STBY_REQ_CCM_PMIC_STBY_REQ 0x400A8008U, 0x0U, 0, 0, 0x400A8020U
1024#define IOMUXC_SNVS_PMIC_STBY_REQ_GPIO5_IO02 0x400A8008U, 0x5U, 0, 0, 0x400A8020U
1025
1026#define IOMUXC_SNVS_TEST_MODE 0, 0, 0, 0, 0x400A800CU
1027
1028#define IOMUXC_SNVS_POR_B 0, 0, 0, 0, 0x400A8010U
1029
1030#define IOMUXC_SNVS_ONOFF 0, 0, 0, 0, 0x400A8014U
1031
1034#define IOMUXC_GPR_SAIMCLK_LOWBITMASK (0x7U)
1035#define IOMUXC_GPR_SAIMCLK_HIGHBITMASK (0x3U)
1036
1037typedef enum _iomuxc_gpr_mode
1038{
1039 kIOMUXC_GPR_GlobalInterruptRequest = IOMUXC_GPR_GPR1_GINT_MASK,
1040 kIOMUXC_GPR_ENET1RefClkMode = IOMUXC_GPR_GPR1_ENET_TX_CLK_SEL_MASK,
1041 kIOMUXC_GPR_ENET1TxClkOutputDir = IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK,
1042 kIOMUXC_GPR_SAI1MClkOutputDir = IOMUXC_GPR_GPR1_SAI1_MCLK_DIR_MASK,
1043 kIOMUXC_GPR_SAI2MClkOutputDir = IOMUXC_GPR_GPR1_SAI2_MCLK_DIR_MASK,
1044 kIOMUXC_GPR_SAI3MClkOutputDir = IOMUXC_GPR_GPR1_SAI3_MCLK_DIR_MASK,
1045 kIOMUXC_GPR_ExcMonitorSlavErrResponse = IOMUXC_GPR_GPR1_EXC_MON_MASK,
1046 kIOMUXC_GPR_AHBClockEnable = (int)IOMUXC_GPR_GPR1_CM7_FORCE_HCLK_EN_MASK,
1047} iomuxc_gpr_mode_t;
1048
1049typedef enum _iomuxc_gpr_saimclk
1050{
1051 kIOMUXC_GPR_SAI1MClk1Sel = IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_SHIFT,
1052 kIOMUXC_GPR_SAI1MClk2Sel = IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_SHIFT,
1053 kIOMUXC_GPR_SAI1MClk3Sel = IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_SHIFT,
1054 kIOMUXC_GPR_SAI2MClk3Sel = IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_SHIFT,
1055 kIOMUXC_GPR_SAI3MClk3Sel = IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_SHIFT,
1056} iomuxc_gpr_saimclk_t;
1057
1058typedef enum _iomuxc_mqs_pwm_oversample_rate
1059{
1060 kIOMUXC_MqsPwmOverSampleRate32 = 0, /* MQS PWM over sampling rate 32. */
1061 kIOMUXC_MqsPwmOverSampleRate64 = 1 /* MQS PWM over sampling rate 64. */
1062} iomuxc_mqs_pwm_oversample_rate_t;
1063
1064#if defined(__cplusplus)
1065extern "C" {
1066#endif /*_cplusplus */
1067
1070
1092static inline void IOMUXC_SetPinMux(uint32_t muxRegister,
1093 uint32_t muxMode,
1094 uint32_t inputRegister,
1095 uint32_t inputDaisy,
1096 uint32_t configRegister,
1097 uint32_t inputOnfield)
1098{
1099 *((volatile uint32_t *)muxRegister) =
1101
1102 if (inputRegister != 0UL)
1103 {
1104 *((volatile uint32_t *)inputRegister) = inputDaisy;
1105 }
1106}
1107
1124static inline void IOMUXC_SetPinConfig(uint32_t muxRegister,
1125 uint32_t muxMode,
1126 uint32_t inputRegister,
1127 uint32_t inputDaisy,
1128 uint32_t configRegister,
1129 uint32_t configValue)
1130{
1131 if (configRegister != 0UL)
1132 {
1133 *((volatile uint32_t *)configRegister) = configValue;
1134 }
1135}
1136
1144static inline void IOMUXC_EnableMode(IOMUXC_GPR_Type *base, uint32_t mode, bool enable)
1145{
1146 mode &= ~(IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK | IOMUXC_GPR_GPR1_SAI1_MCLK2_SEL_MASK |
1147 IOMUXC_GPR_GPR1_SAI1_MCLK3_SEL_MASK | IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK |
1148 IOMUXC_GPR_GPR1_SAI3_MCLK3_SEL_MASK);
1149
1150 if (enable)
1151 {
1152 base->GPR1 |= mode;
1153 }
1154 else
1155 {
1156 base->GPR1 &= ~mode;
1157 }
1158}
1159
1167static inline void IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR_Type *base, iomuxc_gpr_saimclk_t mclk, uint8_t clkSrc)
1168{
1169 uint32_t gpr;
1170
1171 if (mclk > kIOMUXC_GPR_SAI1MClk2Sel)
1172 {
1173 gpr = base->GPR1 & ~((uint32_t)IOMUXC_GPR_SAIMCLK_HIGHBITMASK << (uint32_t)mclk);
1174 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | gpr;
1175 }
1176 else
1177 {
1178 gpr = base->GPR1 & ~((uint32_t)IOMUXC_GPR_SAIMCLK_LOWBITMASK << (uint32_t)mclk);
1179 base->GPR1 = (((uint32_t)clkSrc & IOMUXC_GPR_SAIMCLK_LOWBITMASK) << (uint32_t)mclk) | gpr;
1180 }
1181}
1182
1189static inline void IOMUXC_MQSEnterSoftwareReset(IOMUXC_GPR_Type *base, bool enable)
1190{
1191 if (enable)
1192 {
1193 base->GPR2 |= IOMUXC_GPR_GPR2_MQS_SW_RST_MASK;
1194 }
1195 else
1196 {
1197 base->GPR2 &= ~IOMUXC_GPR_GPR2_MQS_SW_RST_MASK;
1198 }
1199}
1200
1207static inline void IOMUXC_MQSEnable(IOMUXC_GPR_Type *base, bool enable)
1208{
1209 if (enable)
1210 {
1211 base->GPR2 |= IOMUXC_GPR_GPR2_MQS_EN_MASK;
1212 }
1213 else
1214 {
1215 base->GPR2 &= ~IOMUXC_GPR_GPR2_MQS_EN_MASK;
1216 }
1217}
1218
1227static inline void IOMUXC_MQSConfig(IOMUXC_GPR_Type *base, iomuxc_mqs_pwm_oversample_rate_t rate, uint8_t divider)
1228{
1229 uint32_t gpr = base->GPR2 & ~(IOMUXC_GPR_GPR2_MQS_OVERSAMPLE_MASK | IOMUXC_GPR_GPR2_MQS_CLK_DIV_MASK);
1230 base->GPR2 = gpr | IOMUXC_GPR_GPR2_MQS_OVERSAMPLE(rate) | IOMUXC_GPR_GPR2_MQS_CLK_DIV(divider);
1231}
1232
1235#if defined(__cplusplus)
1236}
1237#endif /*_cplusplus */
1238
1241#endif /* _FSL_IOMUXC_H_ */
#define IOMUXC_GPR_GPR2_MQS_CLK_DIV(x)
Definition: MIMXRT1052.h:24843
#define IOMUXC_GPR_GPR2_MQS_OVERSAMPLE(x)
Definition: MIMXRT1052.h:24867
#define IOMUXC_SW_MUX_CTL_PAD_SION(x)
Definition: MIMXRT1052.h:24264
#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(x)
Definition: MIMXRT1052.h:24256
Definition: MIMXRT1052.h:24400