RTEMS 6.1-rc7
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regs.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
12/*
13 * Copyright (C) 2008, 2013 embedded brains GmbH & Co. KG
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#ifndef LIBCPU_POWERPC_MPC55XX_REGS_H
38#define LIBCPU_POWERPC_MPC55XX_REGS_H
39
40#include <bspopts.h>
41
42#if MPC55XX_CHIP_FAMILY == 551
43 #include <mpc55xx/fsl-mpc551x.h>
44 #define MPC55XX_HAS_EBI
45 #define MPC55XX_HAS_ESCI
46 #define MPC55XX_HAS_EMIOS
47 #define MPC55XX_HAS_FMPLL_ENHANCED
48 #define MPC55XX_HAS_SIU
49#elif MPC55XX_CHIP_FAMILY == 555
50 #include <mpc55xx/fsl-mpc555x.h>
51 #define MPC55XX_HAS_EBI
52 #define MPC55XX_HAS_ESCI
53 #define MPC55XX_HAS_EMIOS
54 #define MPC55XX_HAS_FMPLL
55 #define MPC55XX_HAS_UNIFIED_CACHE
56 #define MPC55XX_HAS_SIU
57#elif MPC55XX_CHIP_FAMILY == 556
58 #include <mpc55xx/fsl-mpc556x.h>
59 #define MPC55XX_HAS_EBI
60 #define MPC55XX_HAS_ESCI
61 #define MPC55XX_HAS_EMIOS
62 #define MPC55XX_HAS_FMPLL
63 #define MPC55XX_HAS_UNIFIED_CACHE
64 #define MPC55XX_HAS_SIU
65#elif MPC55XX_CHIP_FAMILY == 564
66 #include <mpc55xx/fsl-mpc564xL.h>
67 #define MPC55XX_HAS_STM
68 #define MPC55XX_HAS_SWT
69 #define MPC55XX_HAS_MODE_CONTROL
70 #define MPC55XX_HAS_INSTRUCTION_CACHE
71 #define MPC55XX_HAS_LINFLEX
72 #define MPC55XX_HAS_SECOND_INTERNAL_RAM_AREA
73 #define MPC55XX_HAS_SIU_LITE
74#elif MPC55XX_CHIP_FAMILY == 566
75 #include <mpc55xx/fsl-mpc5668.h>
76 #define MPC55XX_HAS_ESCI
77 #define MPC55XX_HAS_EMIOS
78 #define MPC55XX_HAS_FMPLL_ENHANCED
79 #define MPC55XX_HAS_UNIFIED_CACHE
80 #define MPC55XX_HAS_SIU
81 /*
82 * TODO: This e200z650n3e core has a wait instruction, but it did not wake-up
83 * from PIT interrupts.
84 */
85#elif MPC55XX_CHIP_FAMILY == 567
86 #include <mpc55xx/fsl-mpc567x.h>
87 #define MPC55XX_HAS_EBI
88 #define MPC55XX_HAS_ESCI
89 #define MPC55XX_HAS_EMIOS
90 #define MPC55XX_HAS_FMPLL_ENHANCED
91 #define MPC55XX_HAS_INSTRUCTION_CACHE
92 #define MPC55XX_HAS_DATA_CACHE
93 #define MPC55XX_HAS_SIU
94 #define MPC55XX_HAS_WAIT_INSTRUCTION
95#else
96 #error "unsupported chip type"
97#endif
98
99#define MPC55XX_ZERO_FLAGS { .R = 0 }
100
101#endif /* LIBCPU_POWERPC_MPC55XX_REGS_H */