20#ifndef STM32H7xx_HAL_NOR_H
21#define STM32H7xx_HAL_NOR_H
62 HAL_NOR_STATUS_SUCCESS = 0U,
63 HAL_NOR_STATUS_ONGOING,
65 HAL_NOR_STATUS_TIMEOUT
75 uint16_t Device_Code1;
77 uint16_t Device_Code2;
106#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
107typedef struct __NOR_HandleTypeDef
125#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
126 void (* MspInitCallback)(
struct __NOR_HandleTypeDef *hnor);
127 void (* MspDeInitCallback)(
struct __NOR_HandleTypeDef *hnor);
131#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
137 HAL_NOR_MSP_INIT_CB_ID = 0x00U,
138 HAL_NOR_MSP_DEINIT_CB_ID = 0x01U
139} HAL_NOR_CallbackIDTypeDef;
160#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
161#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) do { \
162 (__HANDLE__)->State = HAL_NOR_STATE_RESET; \
163 (__HANDLE__)->MspInitCallback = NULL; \
164 (__HANDLE__)->MspDeInitCallback = NULL; \
167#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
204 uint32_t uwBufferSize);
206 uint32_t uwBufferSize);
212#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
215 pNOR_CallbackTypeDef pCallback);
256#define MC_ADDRESS ((uint16_t)0x0000)
257#define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
258#define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
259#define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
262#define CFI1_ADDRESS ((uint16_t)0x0061)
263#define CFI2_ADDRESS ((uint16_t)0x0062)
264#define CFI3_ADDRESS ((uint16_t)0x0063)
265#define CFI4_ADDRESS ((uint16_t)0x0064)
268#define NOR_TMEOUT ((uint16_t)0xFFFF)
271#define NOR_MEMORY_8B ((uint8_t)0x00)
272#define NOR_MEMORY_16B ((uint8_t)0x01)
275#define NOR_MEMORY_ADRESS1 (0x60000000U)
276#define NOR_MEMORY_ADRESS2 (0x64000000U)
277#define NOR_MEMORY_ADRESS3 (0x68000000U)
278#define NOR_MEMORY_ADRESS4 (0x6C000000U)
295#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
296 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
297 ((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \
298 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
306#define NOR_WRITE(__ADDRESS__, __DATA__) do{ \
307 (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
#define __IO
Definition: core_cm4.h:239
HAL_NOR_StateTypeDef
HAL SRAM State structures definition.
Definition: stm32h7xx_hal_nor.h:49
HAL_NOR_StatusTypeDef
FMC NOR Status typedef.
Definition: stm32h7xx_hal_nor.h:61
@ HAL_NOR_STATE_ERROR
Definition: stm32h7xx_hal_nor.h:53
@ HAL_NOR_STATE_RESET
Definition: stm32h7xx_hal_nor.h:50
@ HAL_NOR_STATE_PROTECTED
Definition: stm32h7xx_hal_nor.h:54
@ HAL_NOR_STATE_READY
Definition: stm32h7xx_hal_nor.h:51
@ HAL_NOR_STATE_BUSY
Definition: stm32h7xx_hal_nor.h:52
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
Header file of FMC HAL module.
FMC NORSRAM Configuration Structure definition.
Definition: stm32h7xx_ll_fmc.h:192
FMC NORSRAM Timing parameters structure definition.
Definition: stm32h7xx_ll_fmc.h:255
FMC NOR CFI typedef.
Definition: stm32h7xx_hal_nor.h:89
uint16_t CFI_1
Definition: stm32h7xx_hal_nor.h:94
NOR handle Structure definition.
Definition: stm32h7xx_hal_nor.h:112
FMC_NORSRAM_TypeDef * Instance
Definition: stm32h7xx_hal_nor.h:113
uint32_t CommandSet
Definition: stm32h7xx_hal_nor.h:123
__IO HAL_NOR_StateTypeDef State
Definition: stm32h7xx_hal_nor.h:121
FMC_NORSRAM_EXTENDED_TypeDef * Extended
Definition: stm32h7xx_hal_nor.h:115
HAL_LockTypeDef Lock
Definition: stm32h7xx_hal_nor.h:119
FMC_NORSRAM_InitTypeDef Init
Definition: stm32h7xx_hal_nor.h:117
FMC NOR ID typedef.
Definition: stm32h7xx_hal_nor.h:72
uint16_t Device_Code3
Definition: stm32h7xx_hal_nor.h:79
uint16_t Manufacturer_Code
Definition: stm32h7xx_hal_nor.h:73