RTEMS 6.1-rc7
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gr1553bc_list.h
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 * GR1553B BC driver, Descriptor LIST handling
5 *
6 * COPYRIGHT (c) 2010.
7 * Cobham Gaisler AB.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __GR1553BC_LIST_H__
32#define __GR1553BC_LIST_H__
33
214#include <stdint.h>
215#include "gr1553bc.h"
216
217/**** CONFIGURATION OPTIONS ****/
218
219/* Define GR1553BC_TIMESLOT to make driver take care of time
220 * management of minor frames.
221 */
222#define GR1553BC_TIMESLOT
223
224#define GR1553BC_MINOR_MAX 256
225#define GR1553BC_SLOT_MAX 32
226
227#ifdef __cplusplus
228extern "C" {
229#endif
230
231struct gr1553bc_list;
232struct gr1553bc_major;
233struct gr1553bc_minor;
234struct gr1553bc_minor_cfg;
235struct gr1553bc_major_cfg;
236
238 int slot_cnt;
239 int timeslot; /* Total time of minor frame in us */
240};
241
243 int minor_cnt; /* Number of Minor Frames */
244 struct gr1553bc_minor_cfg minor_cfgs[1];
245};
246
248 unsigned char rt_timeout[31]; /* Number of us timeout tolerance per RT */
249 unsigned char bc_timeout; /* Number of us timeout tolerance of
250 * broadcast transfers */
251 int tropt_irq_on_err; /* Generate IRQ on transfer error */
252 int tropt_pause_on_err; /* Pause list on transfer error */
253 int async_list; /* Set to non-zero if asyncronous list*/
254};
255
256/* Default Configuration */
257extern struct gr1553bc_list_cfg gr1553bc_def_cfg;
258
259/* Complete list of all major frames */
261 void *_table_custom; /* Config option given by user */
262 void *_table; /* address of allocated bd-table */
263 unsigned int table_hw; /* Descriptor table base HW-ADR */
264 unsigned int table_cpu; /* Descriptor table base CPU-ADR */
265 int table_size; /* Descriptor Table Size */
266 void *bc; /* BC HW, needed for adr translation */
267 unsigned char rt_timeout[32]; /* Tolerance per RT, default 20us
268 * Note: 31 is for Broadcast */
269 uint32_t tropts; /* Transfer descriptor options:
270 * On transfer error the following bits
271 * do affect:
272 * - bit28 1=Generate IRQ
273 * - bit26 1=Pause transfer list
274 *
275 */
276 int async_list; /* async list or not */
277 int major_cnt; /* Number of Major frames */
278 struct gr1553bc_major *majors[1]; /* Var-Array of Major Pointers*/
279};
280
281/* Alloc a List with a maximum number of Major frames supported */
282extern int gr1553bc_list_alloc(struct gr1553bc_list **list, int max_major);
283
284/* Free List if allocated with gr1553bc_list_alloc() */
285extern void gr1553bc_list_free(struct gr1553bc_list *list);
286
287/* Configure Global List parameters
288 *
289 * \param list List to be configured and initialized.
290 * \param cfg List Configuration
291 * \param bc The BC hardware device description
292 * (only needed for address translation)
293 */
294extern int gr1553bc_list_config
295 (
296 struct gr1553bc_list *list,
297 struct gr1553bc_list_cfg *cfg,
298 void *bc
299 );
300
301/* Link a 'major' Major frame with next major frame
302 * The links affected:
303 * - major->next
304 * - major->minor[LAST]->next
305 */
306extern void gr1553bc_list_link_major(
307 struct gr1553bc_major *major,
308 struct gr1553bc_major *next
309 );
310
311/* Link in a Major frame into a BC list.
312 * Calls gr1553bc_list_link_major() to link major frame with major-1 and
313 * major+1. If ending or starting major frame the frame is wrapped around.
314 */
315extern int gr1553bc_list_set_major(
316 struct gr1553bc_list *list,
317 struct gr1553bc_major *major,
318 int no);
319
320/* Calculate the size required in the descriptor table by one minor frame. */
321extern int gr1553bc_minor_table_size(struct gr1553bc_minor *minor);
322
323/* Calculate the size required for the descriptor table.
324 */
325extern int gr1553bc_list_table_size(struct gr1553bc_list *list);
326
327/* Allocate an empty descriptor table from list description suitable for
328 * the BC given by 'bc'.
329 *
330 * \param bdtab_custom Custom Descriptor Allocation options:
331 * ZERO: Dynamically allocated by Driver (CPU near RAM)
332 * Non-Zero: Use provided address as BASE of BD-TABLE
333 * Non-Zero with LSB set: Same as Non-Zero but address
334 * is given as HW address (used with AMBA-over-PCI to
335 * to specify RAM location on PCI board).
336 */
337extern int gr1553bc_list_table_alloc
338 (
339 struct gr1553bc_list *list,
340 void *bdtab_custom
341 );
342
343/* Free descriptor table allocated with gr1553bc_list_table_alloc() */
344extern void gr1553bc_list_table_free(struct gr1553bc_list *list);
345
346/* Build an empty descriptor table from list description,
347 * the minor frames will be linked together.
348 */
349extern int gr1553bc_list_table_build(struct gr1553bc_list *list);
350
351/* Major Frame */
353 struct gr1553bc_major *next; /* Next Major Frame */
354 struct gr1553bc_major_cfg *cfg; /* User Config of Major frame */
355 struct gr1553bc_minor *minors[1]; /* Minor frames */
356};
357
358/* Minor Frame */
360 struct gr1553bc_minor *next; /* Next Minor Frame */
361 struct gr1553bc_minor_cfg *cfg; /* User Config of Minor frame */
362 uint32_t alloc; /* Descripts allocated */
363
364 /* Note: THIS POINTER MUST BE ALIGNED ON A 128-bit BOUNDARY */
365 union gr1553bc_bd *bds; /* Descriptors for this minor frame (CPU ADRS)*/
366};
367
368/* Alloc a Major/Minor frame skeleton according to the configuration structure.
369 * The descriptor table is not allocated.
370 */
371extern int gr1553bc_major_alloc_skel
372 (
373 struct gr1553bc_major **major,
374 struct gr1553bc_major_cfg *cfg
375 );
376
377/* Unique Message/Descriptor ID. Can be used to identify a Major or Minor
378 * Frame, or a Slot.
379 *
380 * - If minor_num is 0xff, the ID identifies a Major Frame
381 * - If slot_num is 0xff, the ID identifies a Minor Frame
382 * - If non of the above is true, the ID identifies a specific Slot
383 */
384#define GR1553BC_ID(major_num, minor_num, slot_num) \
385 ((((major_num)<<16)&0xff0000) | (((minor_num)<<8)&0xff00) | \
386 ((slot_num) & 0xff))
387#define GR1553BC_MINOR_ID(major_num, minor_num) \
388 GR1553BC_ID(major_num, minor_num, 0xff)
389#define GR1553BC_MAJOR_ID(major_num) \
390 GR1553BC_ID(major_num, 0xff, 0xff)
391
392#define GR1553BC_MAJID_FROM_ID(mid) (((mid) >> 16) & 0xff)
393#define GR1553BC_MINID_FROM_ID(mid) (((mid) >> 8) & 0xff)
394#define GR1553BC_SLOTID_FROM_ID(mid) ((mid) & 0xff)
395#define GR1553BC_ID_SET_SLOT(mid, slot_num) (((mid) & ~0xff) | ((slot_num) & 0xff))
396
397extern struct gr1553bc_major *gr1553bc_major_from_id
398 (
399 struct gr1553bc_list *list,
400 int mid
401 );
402
403extern struct gr1553bc_minor *gr1553bc_minor_from_id
404 (
405 struct gr1553bc_list *list,
406 int mid
407 );
408
409/* Get free time left of minor frame identified by MID 'mid' */
410extern int gr1553bc_list_freetime(struct gr1553bc_list *list, int mid);
411
412/* Get free time left of minor frame */
413extern int gr1553bc_minor_freetime(struct gr1553bc_minor *minor);
414
415/* Allocate a time slot on a minor frame, major/minor frame is identified
416 * by MID. The 'mid' is a input/ouput parameter, the resulting slot taken
417 * will be placed in 'mid', a pointer to the allocated descriptor is stored
418 * into bd.
419 *
420 * Major/Minor must be specified by MID, if slot is specified that slot will
421 * be allocated, if slot is 0xff, then the first free slot is allocated.
422 *
423 * The function fails (return negative) if timeslot is longer than remaining
424 * time in minor frame, if no more slots are available in minor frame, if
425 * MID points to a bad major/minor or major/minor/slot.
426 */
427extern int gr1553bc_slot_alloc(
428 struct gr1553bc_list *list,
429 int *mid,
430 int timeslot,
431 union gr1553bc_bd **bd
432 );
433/* Same as gr1553bc_slot_alloc but identifies a minor instead of list.
434 * The major/minor part of MID is ignored.
435 */
436extern int gr1553bc_slot_alloc2(
437 struct gr1553bc_minor *minor,
438 int *mid,
439 int timeslot,
440 union gr1553bc_bd **bd
441 );
442
443/* Free message slot and the time associated with it. The time taken by the
444 * message slot is added to the END TIME descriptor, if managed by the driver
445 * for this minor frame. The descriptor will be
446 */
447extern int gr1553bc_slot_free(struct gr1553bc_list *list, int mid);
448extern int gr1553bc_slot_free2(struct gr1553bc_minor *minor, int mid);
449
450/* Find MID from Descriptor pointer
451 *
452 * In the end of each minor frame is a unconditional jump
453 * to next minor frame descriptor. The hardware does not
454 * use the last 8 bytes of conditional descriptors, in the
455 * padding area a MID is stored so that we can lookup the
456 * MID of a descriptor. This function finds the jump
457 * descriptor and subtracs the offset from it.
458 *
459 * A faster way of looking up can be implemented if the
460 * list is symertical, however in the current setup we
461 * allow different numbers of slots in minor frames, and
462 * different number of minor frames in a major frame.
463 *
464 * \param bd IN: Descriptor to lookup MID of (CPU address of BD)
465 * \param mid OUT: Pointer to where Message-ID (Slot-ID) will be stored
466 * \param async OUT: Function will store non-zero value if BD belogs to
467 * async list.
468 */
469extern int gr1553bc_mid_from_bd(
470 union gr1553bc_bd *bd,
471 int *mid,
472 int *async
473 );
474
475/********** TRANSFER DESCRIPTOR MANIPULATION **********/
476
477/* Get pointer to descriptor entry from MID. */
478extern union gr1553bc_bd *gr1553bc_slot_bd
479 (
480 struct gr1553bc_list *list,
481 int mid
482 );
483
484/* IRQ function */
485typedef void (*bcirq_func_t)(union gr1553bc_bd *bd, void *data);
486
487/* Create unconditional IRQ customly defined location.
488 * The IRQ is disabled, enable it with gr1553bc_slot_irq_enable().
489 */
490extern int gr1553bc_slot_irq_prepare
491 (
492 struct gr1553bc_list *list,
493 int mid,
494 bcirq_func_t func,
495 void *data
496 );
497
498/* Enable previously prepared unconditional IRQ */
499extern int gr1553bc_slot_irq_enable(struct gr1553bc_list *list, int mid);
500
501/* Disable unconditional IRQ point, changed to unconditional JUMP
502 * to descriptor following.
503 * After disabling it it can be enabled again, or freed.
504 */
505extern int gr1553bc_slot_irq_disable(struct gr1553bc_list *list, int mid);
506
507/* Create custom jump to descriptor, conditional or unconditional, see
508 * hardware manual for conditions.
509 *
510 * set conditional to GR1553BC_UNCOND_JMP for unconditional jump.
511 */
512extern int gr1553bc_slot_jump
513 (
514 struct gr1553bc_list *list,
515 int mid,
516 uint32_t condition,
517 int to_mid
518 );
519
520/* Create a dummy transfer, paused until external trigger is set. The
521 * Slot is will have the dummy bit set, no transfer will take place.
522 */
523extern int gr1553bc_slot_exttrig(struct gr1553bc_list *list, int mid);
524
525/* Create a transfer on a previous allocated descriptor. It is assumed
526 * that the descriptor has been initialized empty before calling this
527 * function, this is to avoid races.
528 *
529 * The settings that are controlled on a global level (and not
530 * by this function):
531 * - IRQ after transfer error
532 * - IRQ after transfer (not supported, insert separate IRQ slot after this)
533 * - Pause schedule after transfer error
534 * - Pause schedule after transfer (not supported)
535 * - slot time optional (set when MID allocated), otherwise 0
536 * - (OPTIONAL) Dummy Bit, set using slot_empty() or ..._TT_DUMMY
537 * - RT timeout tolerance (managed per RT)
538 *
539 * Input Parameters:
540 * - Retry Mode (options)
541 * - Number of retires (options)
542 * - Bus selection (A or B) (options)
543 * - dummy bit (options)
544 * - transfer type (tt)
545 * - rt src/dst address (tt)
546 * - RT subaddress (tt)
547 * - word count (tt)
548 * - mode code (tt)
549 * - data pointer (dptr)
550 *
551 *
552 * See macros defined in this header file for creating transfer types (tt)
553 * and word count etc.
554 *
555 * See macros defined in this header file for creating the mask of options.
556 *
557 * Note that if bit0 (LSB) of dptr is set, then the address is translated into
558 * hardware address, otherwise the dptr is assumed to be accessible from the
559 * 1553 core. This is an option only for AMBA-over-PCI.
560 */
561extern int gr1553bc_slot_transfer(
562 struct gr1553bc_list *list,
563 int mid,
564 int options,
565 int tt,
566 uint16_t *dptr);
567
568/* Remove or set dummy bit of a transfer descriptor
569 * Bit31 of *dummy is written to the dummy bit, the
570 * old descriptor value is stored into *dummy.
571 */
572extern int gr1553bc_slot_dummy(
573 struct gr1553bc_list *list,
574 int mid,
575 unsigned int *dummy);
576
577/* Make a slot empty (BC will not generate bus transfers), time slot
578 * allocated is untouched (if assigned).
579 */
580extern int gr1553bc_slot_empty(struct gr1553bc_list *list, int mid);
581
582/* Transfer descriptor status and/or update Transfer descriptor data pointer.
583 *
584 * Read and/or write Status of a slot. Writing the status word may be
585 * used by software to indicate that result has been handled, or bit 31
586 * may be written 1 telling software that when it reaches 0, then BC
587 * has executed the request.
588 *
589 * Operation:
590 * bd->status = *stat & (bd->status 0xffffff) | (*stat & 0x80000000);
591 * *stat = Value of bd->status before rewrite.
592 *
593 * Note that the status word is not written when *stat is zero.
594 *
595 * Note that if bit0 (LSB) of dptr is set, then the address is translated into
596 * hardware address, otherwise the dptr is assumed to be accessible from the
597 * 1553 core. This is an option only for AMBA-over-PCI.
598 */
599extern int gr1553bc_slot_update(
600 struct gr1553bc_list *list,
601 int mid,
602 uint16_t *dptr,
603 unsigned int *stat);
604
605/* Modify a transfer descriptor in any way,
606 *
607 * flags:
608 * bit[N=0..3]: 1 = set BD wordN according to argument wordN,
609 * 0 = do not modify BD wordN
610 */
611extern int gr1553bc_slot_raw
612 (
613 struct gr1553bc_list *list,
614 int mid,
615 unsigned int flags,
616 uint32_t word0,
617 uint32_t word1,
618 uint32_t word2,
619 uint32_t word3
620 );
621
622
623/***** Macros to create BC Transfer Types (tt) for gr1553bc_slot_transfer() *****/
624
625/* WRITE TO RT (BC-to-RT) */
626#define GR1553BC_BC2RT(rtadr, subadr, word_count) \
627 ((rtadr<<11) | (subadr<<5) | (0x1f<<21) | (0<<10) | \
628 ((word_count>=32) ? 0 : word_count))
629
630/* READ FROM RT (RT-to-BC) */
631#define GR1553BC_RT2BC(rtadr, subadr, word_count) \
632 ((rtadr<<11) | (subadr<<5) | (0x1f<<21) | (1<<10) | \
633 ((word_count>=32) ? 0 : word_count))
634
635/* RT(TX) WRITE TO RT(RX) (RT-to-RT) */
636#define GR1553BC_RT2RT(tx_rtadr, tx_subadr, rx_rtadr, rx_subadr, word_count) \
637 ((rx_rtadr<<11) | (rx_subadr<<5) | \
638 (tx_rtadr<<21) | (tx_subadr<<16) | \
639 (0<<10) | \
640 ((word_count>=32) ? 0 : word_count))
641
642/* Mode command without data. (BC-to-RT)
643 * Mode code: 0,1,2,3,4,5,6,7 or 8.
644 */
645#define GR1553BC_MC_NODATA(rtadr, modecode) \
646 ((rtadr<<11) | (0x1f<<5) | (0x1f<<21) | \
647 (modecode<<0) | (1<<10))
648
649/* Mode command with 4 byte data (RT-to-BC)
650 * Mode code: 16, 18 or 19.
651 */
652#define GR1553BC_MC_RT2BC(rtadr, modecode) \
653 ((rtadr<<11) | (0x1f<<5) | (0x1f<<21) | \
654 (modecode<<0) | (1<<10))
655
656/* Mode command with 4 byte data (BC-to-RT)
657 * Mode code: 17, 20 or 21.
658 */
659#define GR1553BC_MC_BC2RT(rtadr, modecode) \
660 ((rtadr<<11) | (0x1f<<5) | (0x1f<<21) | \
661 (modecode<<0) | (0<<10))
662
663/* Broadcast to all RTs, to a specific subaddress (BC-to-RTs) */
664#define GR1553BC_BC_BC2RT(subadr, word_count) \
665 ((0x1f<<11) | (subadr<<5) | (0x1f<<21) | \
666 (0<<10) | \
667 ((word_count>=32) ? 0 : word_count))
668
669/* Request RT to broadcast to all RTs, to a specific subaddress (RT-to-RTs) */
670#define GR1553BC_BC_RT2RT(tx_rtadr, tx_subadr, rx_subadr, word_count) \
671 ((0x1f<<11) | (rx_subadr<<5) | \
672 (tx_rtadr<<21) | (tx_subadr<<16) | \
673 (0<<10) | \
674 ((word_count>=32) ? 0 : word_count))
675
676/* Broadcast mode command without data (BC-to-RTs)
677 * Mode code: 1,3,4,5,6,7 or 8
678 */
679#define GR1553BC_BC_MC_NODATA(modecode) \
680 ((0x1f<<11) | (0x1f<<5) | (0x1f<<21) | \
681 ((modecode)<<0) | (1<<10))
682
683/* Broadcast mode command with 4 byte data (BC-to-RTs)
684 * Mode code: 17, 20 or 21
685 */
686#define GR1553BC_BC_MC_BC2RT(modecode) \
687 ((0x1f<<11) | (0x1f<<5) | (0x1f<<21) | \
688 ((modecode)<<0) | (0<<10))
689
690
691/***** Macros to create BC options (options) for gr1553bc_slot_transfer() *****/
692
693/* Dummy (BC does no bus trasactions) */
694#define GR1553BC_OPT_DUMMY (1<<1)
695
696/* Retry modes */
697#define GR1553BC_RETRY_SAME 0x0 /* Retry on the same bus only */
698#define GR1553BC_RETRY_ALTER 0x1 /* Retry alternating on both busses */
699#define GR1553BC_RETRY_ATTEMPT 0x2 /* Many attepts first on original
700 * bus then on other bus */
701/* Number of retires supported */
702#define GR1553BC_RETRY_CNT_MAX 6
703
704/* Dummy bit: No transfer
705 * Bus bit: 0=A, 1=B
706 * Exttrig bit: Wait for external trigger (used for timesync)
707 * Exclusive bit: 1=Don't allow other messages in this time slot.
708 */
709#define GR1553BC_OPTIONS(dummy, exttrig, exclusive, retrymode, nretry, bus) \
710 ((((exttrig) & 0x1) << 30) | (((exclusive) & 0x1) << 29) | \
711 ((retrymode) << 23) | ((nretry) << 20) | \
712 ((bus) & 1) | (((dummy) & 0x1) << 1))
713
714#define GR1553BC_OPTIONS_BUSA GR1553BC_OPTIONS(0,0,0,GR1553BC_RETRY_SAME,0,0)
715#define GR1553BC_OPTIONS_BUSB GR1553BC_OPTIONS(0,0,0,GR1553BC_RETRY_SAME,0,1)
716#define GR1553BC_OPTIONS_BUSA_DUM GR1553BC_OPTIONS(1,0,0,GR1553BC_RETRY_SAME,0,0)
717#define GR1553BC_OPTIONS_BUSB_DUM GR1553BC_OPTIONS(1,0,0,GR1553BC_RETRY_SAME,0,1)
718
719/* Show parts of a list - this is for debugging only */
720extern void gr1553bc_show_list(struct gr1553bc_list *list, int options);
721
722#ifdef __cplusplus
723}
724#endif
725
726#endif /* __GR1553BC_LIST_H__ */
Definition: gr1553bc_list.h:247
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Definition: gr1553bc.h:91