20#ifndef STM32H7xx_HAL_RTC_EX_H
21#define STM32H7xx_HAL_RTC_EX_H
96 uint32_t TimeStampOnTamperDetection;
98} RTC_InternalTamperTypeDef;
107#define RTC_ATAMP_SEED_NB_UINT32 4U
116#define RTC_TAMP_NB 3u
143} RTC_ATampInputTypeDef;
148 uint32_t ActiveFilter;
151 uint32_t ActiveAsyncPrescaler;
154 uint32_t TimeStampOnTamperDetection;
157 uint32_t ActiveOutputChangePeriod;
160 uint32_t Seed[RTC_ATAMP_SEED_NB_UINT32];
164 RTC_ATampInputTypeDef TampInput[RTC_TAMP_NB];
167} RTC_ActiveTampersTypeDef;
194#define BKP_REG_NUMBER TAMP_BKP_NUMBER
196#define BKP_REG_NUMBER RTC_BKP_NUMBER
206#define RTC_BKP_DR0 0x00u
207#define RTC_BKP_DR1 0x01u
208#define RTC_BKP_DR2 0x02u
209#define RTC_BKP_DR3 0x03u
210#define RTC_BKP_DR4 0x04u
211#define RTC_BKP_DR5 0x05u
212#define RTC_BKP_DR6 0x06u
213#define RTC_BKP_DR7 0x07u
214#define RTC_BKP_DR8 0x08u
215#define RTC_BKP_DR9 0x09u
216#define RTC_BKP_DR10 0x0Au
217#define RTC_BKP_DR11 0x0Bu
218#define RTC_BKP_DR12 0x0Cu
219#define RTC_BKP_DR13 0x0Du
220#define RTC_BKP_DR14 0x0Eu
221#define RTC_BKP_DR15 0x0Fu
222#define RTC_BKP_DR16 0x10u
223#define RTC_BKP_DR17 0x11u
224#define RTC_BKP_DR18 0x12u
225#define RTC_BKP_DR19 0x13u
226#define RTC_BKP_DR20 0x14u
227#define RTC_BKP_DR21 0x15u
228#define RTC_BKP_DR22 0x16u
229#define RTC_BKP_DR23 0x17u
230#define RTC_BKP_DR24 0x18u
231#define RTC_BKP_DR25 0x19u
232#define RTC_BKP_DR26 0x1Au
233#define RTC_BKP_DR27 0x1Bu
234#define RTC_BKP_DR28 0x1Cu
235#define RTC_BKP_DR29 0x1Du
236#define RTC_BKP_DR30 0x1Eu
237#define RTC_BKP_DR31 0x1Fu
251#define RTC_TIMESTAMPEDGE_RISING 0x00000000u
252#define RTC_TIMESTAMPEDGE_FALLING RTC_CR_TSEDGE
261#define RTC_TIMESTAMPPIN_DEFAULT 0x00000000u
276#define RTC_TAMPER_1 TAMP_CR1_TAMP1E
277#define RTC_TAMPER_2 TAMP_CR1_TAMP2E
278#define RTC_TAMPER_3 TAMP_CR1_TAMP3E
280#define RTC_TAMPER_1 RTC_TAMPCR_TAMP1E
281#define RTC_TAMPER_2 RTC_TAMPCR_TAMP2E
282#define RTC_TAMPER_3 RTC_TAMPCR_TAMP3E
285#define RTC_TAMPER_ALL (RTC_TAMPER_1 | RTC_TAMPER_2 | RTC_TAMPER_3)
295#define RTC_IT_TAMP1 TAMP_IER_TAMP1IE
296#define RTC_IT_TAMP2 TAMP_IER_TAMP2IE
297#define RTC_IT_TAMP3 TAMP_IER_TAMP3IE
299#define RTC_IT_TAMP1 RTC_TAMPCR_TAMP1IE
300#define RTC_IT_TAMP2 RTC_TAMPCR_TAMP2IE
301#define RTC_IT_TAMP3 RTC_TAMPCR_TAMP3IE
305#define RTC_IT_TAMP 0x00000000u
306#define RTC_IT_TAMPALL (RTC_IT_TAMP1 | RTC_IT_TAMP2 | RTC_IT_TAMP3)
308#define RTC_IT_TAMP RTC_TAMPCR_TAMPIE
309#define RTC_IT_TAMPALL RTC_IT_TAMP
320#define RTC_INT_TAMPER_1 TAMP_CR1_ITAMP1E
321#define RTC_INT_TAMPER_2 TAMP_CR1_ITAMP2E
322#define RTC_INT_TAMPER_3 TAMP_CR1_ITAMP3E
323#define RTC_INT_TAMPER_4 TAMP_CR1_ITAMP4E
324#define RTC_INT_TAMPER_5 TAMP_CR1_ITAMP5E
325#define RTC_INT_TAMPER_6 TAMP_CR1_ITAMP6E
326#define RTC_INT_TAMPER_8 TAMP_CR1_ITAMP8E
328#define RTC_INT_TAMPER_ALL (RTC_INT_TAMPER_1 | RTC_INT_TAMPER_2 |\
329 RTC_INT_TAMPER_3 | RTC_INT_TAMPER_4 |\
330 RTC_INT_TAMPER_5 | RTC_INT_TAMPER_6 |\
342#define RTC_INTERNAL_TAMPER1_INTERRUPT TAMP_IER_ITAMP1IE
343#define RTC_INTERNAL_TAMPER2_INTERRUPT TAMP_IER_ITAMP2IE
344#define RTC_INTERNAL_TAMPER3_INTERRUPT TAMP_IER_ITAMP3IE
345#define RTC_INTERNAL_TAMPER4_INTERRUPT TAMP_IER_ITAMP4IE
346#define RTC_INTERNAL_TAMPER5_INTERRUPT TAMP_IER_ITAMP5IE
347#define RTC_INTERNAL_TAMPER6_INTERRUPT TAMP_IER_ITAMP6IE
348#define RTC_INTERNAL_TAMPER8_INTERRUPT TAMP_IER_ITAMP8IE
358#define RTC_TAMPERTRIGGER_RISINGEDGE 0x01u
359#define RTC_TAMPERTRIGGER_FALLINGEDGE 0x02u
360#define RTC_TAMPERTRIGGER_LOWLEVEL 0x04u
361#define RTC_TAMPERTRIGGER_HIGHLEVEL 0x08u
364#define RTC_TAMPER_1_TRIGGER TAMP_CR2_TAMP1TRG
365#define RTC_TAMPER_2_TRIGGER TAMP_CR2_TAMP2TRG
366#define RTC_TAMPER_3_TRIGGER TAMP_CR2_TAMP3TRG
368#define RTC_TAMPER_1_TRIGGER RTC_TAMPCR_TAMP1TRG
369#define RTC_TAMPER_2_TRIGGER RTC_TAMPCR_TAMP2TRG
370#define RTC_TAMPER_3_TRIGGER RTC_TAMPCR_TAMP3TRG
373#define RTC_TAMPER_X_TRIGGER (RTC_TAMPER_1_TRIGGER |\
374 RTC_TAMPER_2_TRIGGER |\
375 RTC_TAMPER_3_TRIGGER)
385#define RTC_TAMPER_ERASE_BACKUP_ENABLE 0x00u
386#define RTC_TAMPER_ERASE_BACKUP_DISABLE 0x01u
388#define RTC_TAMPER_ERASE_BACKUP_ENABLE 0x00000000u
389#define RTC_TAMPER_ERASE_BACKUP_DISABLE RTC_TAMPCR_TAMP1NOERASE
393#define RTC_DISABLE_BKP_ERASE_ON_TAMPER_1 TAMP_CR2_TAMP1NOERASE
394#define RTC_DISABLE_BKP_ERASE_ON_TAMPER_2 TAMP_CR2_TAMP2NOERASE
395#define RTC_DISABLE_BKP_ERASE_ON_TAMPER_3 TAMP_CR2_TAMP3NOERASE
397#define RTC_DISABLE_BKP_ERASE_ON_TAMPER_1 RTC_TAMPCR_TAMP1NOERASE
398#define RTC_DISABLE_BKP_ERASE_ON_TAMPER_2 RTC_TAMPCR_TAMP2NOERASE
399#define RTC_DISABLE_BKP_ERASE_ON_TAMPER_3 RTC_TAMPCR_TAMP3NOERASE
402#define RTC_DISABLE_BKP_ERASE_ON_TAMPER_MASK (RTC_DISABLE_BKP_ERASE_ON_TAMPER_1 |\
403 RTC_DISABLE_BKP_ERASE_ON_TAMPER_2 |\
404 RTC_DISABLE_BKP_ERASE_ON_TAMPER_3)
414#define RTC_TAMPERMASK_FLAG_DISABLE 0x00u
415#define RTC_TAMPERMASK_FLAG_ENABLE 0x01u
417#define RTC_TAMPERMASK_FLAG_DISABLE 0x00000000u
418#define RTC_TAMPERMASK_FLAG_ENABLE RTC_TAMPCR_TAMP1MF
422#define RTC_TAMPER_1_MASK_FLAG TAMP_CR2_TAMP1MSK
423#define RTC_TAMPER_2_MASK_FLAG TAMP_CR2_TAMP2MSK
424#define RTC_TAMPER_3_MASK_FLAG TAMP_CR2_TAMP3MSK
426#define RTC_TAMPER_1_MASK_FLAG RTC_TAMPCR_TAMP1MF
427#define RTC_TAMPER_2_MASK_FLAG RTC_TAMPCR_TAMP2MF
428#define RTC_TAMPER_3_MASK_FLAG RTC_TAMPCR_TAMP3MF
431#define RTC_TAMPER_X_MASK_FLAG (RTC_TAMPER_1_MASK_FLAG |\
432 RTC_TAMPER_2_MASK_FLAG |\
433 RTC_TAMPER_3_MASK_FLAG)
443#define RTC_TAMPERFILTER_DISABLE 0x00000000U
445#define RTC_TAMPERFILTER_2SAMPLE TAMP_FLTCR_TAMPFLT_0
447#define RTC_TAMPERFILTER_4SAMPLE TAMP_FLTCR_TAMPFLT_1
449#define RTC_TAMPERFILTER_8SAMPLE TAMP_FLTCR_TAMPFLT
451#define RTC_TAMPERFILTER_MASK TAMP_FLTCR_TAMPFLT
454#define RTC_TAMPERFILTER_DISABLE 0x00000000u
456#define RTC_TAMPERFILTER_2SAMPLE RTC_TAMPCR_TAMPFLT_0
458#define RTC_TAMPERFILTER_4SAMPLE RTC_TAMPCR_TAMPFLT_1
460#define RTC_TAMPERFILTER_8SAMPLE RTC_TAMPCR_TAMPFLT
462#define RTC_TAMPERFILTER_MASK RTC_TAMPCR_TAMPFLT
474#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768 0x00000000U
476#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384 TAMP_FLTCR_TAMPFREQ_0
478#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192 TAMP_FLTCR_TAMPFREQ_1
480#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096 (TAMP_FLTCR_TAMPFREQ_0 | TAMP_FLTCR_TAMPFREQ_1)
482#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048 TAMP_FLTCR_TAMPFREQ_2
484#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024 (TAMP_FLTCR_TAMPFREQ_0 | TAMP_FLTCR_TAMPFREQ_2)
486#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512 (TAMP_FLTCR_TAMPFREQ_1 | TAMP_FLTCR_TAMPFREQ_2)
488#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256 TAMP_FLTCR_TAMPFREQ
490#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_MASK TAMP_FLTCR_TAMPFREQ
493#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768 0x00000000u
495#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384 RTC_TAMPCR_TAMPFREQ_0
497#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192 RTC_TAMPCR_TAMPFREQ_1
499#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096 (RTC_TAMPCR_TAMPFREQ_0 | RTC_TAMPCR_TAMPFREQ_1)
501#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048 RTC_TAMPCR_TAMPFREQ_2
503#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024 (RTC_TAMPCR_TAMPFREQ_0 | RTC_TAMPCR_TAMPFREQ_2)
505#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512 (RTC_TAMPCR_TAMPFREQ_1 | RTC_TAMPCR_TAMPFREQ_2)
507#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256 RTC_TAMPCR_TAMPFREQ
509#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_MASK RTC_TAMPCR_TAMPFREQ
521#define RTC_TAMPERPRECHARGEDURATION_1RTCCLK 0x00000000U
523#define RTC_TAMPERPRECHARGEDURATION_2RTCCLK TAMP_FLTCR_TAMPPRCH_0
525#define RTC_TAMPERPRECHARGEDURATION_4RTCCLK TAMP_FLTCR_TAMPPRCH_1
527#define RTC_TAMPERPRECHARGEDURATION_8RTCCLK TAMP_FLTCR_TAMPPRCH
529#define RTC_TAMPERPRECHARGEDURATION_MASK TAMP_FLTCR_TAMPPRCH
532#define RTC_TAMPERPRECHARGEDURATION_1RTCCLK 0x00000000u
534#define RTC_TAMPERPRECHARGEDURATION_2RTCCLK RTC_TAMPCR_TAMPPRCH_0
536#define RTC_TAMPERPRECHARGEDURATION_4RTCCLK RTC_TAMPCR_TAMPPRCH_1
538#define RTC_TAMPERPRECHARGEDURATION_8RTCCLK RTC_TAMPCR_TAMPPRCH
540#define RTC_TAMPERPRECHARGEDURATION_MASK RTC_TAMPCR_TAMPPRCH
552#define RTC_TIMESTAMPONTAMPERDETECTION_DISABLE 0x00000000u
553#define RTC_TIMESTAMPONTAMPERDETECTION_ENABLE RTC_CR_TAMPTS
554#define RTC_TIMESTAMPONTAMPERDETECTION_MASK RTC_CR_TAMPTS
556#define RTC_TIMESTAMPONTAMPERDETECTION_DISABLE 0x00000000u
557#define RTC_TIMESTAMPONTAMPERDETECTION_ENABLE RTC_TAMPCR_TAMPTS
558#define RTC_TIMESTAMPONTAMPERDETECTION_MASK RTC_TAMPCR_TAMPTS
569#define RTC_TAMPER_PULLUP_ENABLE 0x00000000u
570#define RTC_TAMPER_PULLUP_DISABLE TAMP_FLTCR_TAMPPUDIS
571#define RTC_TAMPER_PULLUP_MASK TAMP_FLTCR_TAMPPUDIS
573#define RTC_TAMPER_PULLUP_ENABLE 0x00000000u
574#define RTC_TAMPER_PULLUP_DISABLE RTC_TAMPCR_TAMPPUDIS
575#define RTC_TAMPER_PULLUP_MASK RTC_TAMPCR_TAMPPUDIS
586#define RTC_TAMPERDETECTIONOUTPUT_DISABLE 0x00000000u
587#define RTC_TAMPERDETECTIONOUTPUT_ENABLE RTC_CR_TAMPOE
599#define RTC_FLAG_TAMP1F TAMP_SR_TAMP1F
600#define RTC_FLAG_TAMP2F TAMP_SR_TAMP2F
601#define RTC_FLAG_TAMP3F TAMP_SR_TAMP3F
603#define RTC_FLAG_TAMP1F RTC_ISR_TAMP1F
604#define RTC_FLAG_TAMP2F RTC_ISR_TAMP2F
605#define RTC_FLAG_TAMP3F RTC_ISR_TAMP3F
615#define RTC_ATAMP_ENABLE 1u
616#define RTC_ATAMP_DISABLE 0u
625#define RTC_ATAMP_INTERRUPT_ENABLE 1u
626#define RTC_ATAMP_INTERRUPT_DISABLE 0u
635#define RTC_ATAMP_FILTER_ENABLE TAMP_ATCR1_FLTEN
636#define RTC_ATAMP_FILTER_DISABLE 0u
645#define RTC_ATAMP_ASYNCPRES_RTCCLK 0u
646#define RTC_ATAMP_ASYNCPRES_RTCCLK_2 TAMP_ATCR1_ATCKSEL_0
647#define RTC_ATAMP_ASYNCPRES_RTCCLK_4 TAMP_ATCR1_ATCKSEL_1
648#define RTC_ATAMP_ASYNCPRES_RTCCLK_8 (TAMP_ATCR1_ATCKSEL_1 | TAMP_ATCR1_ATCKSEL_0)
649#define RTC_ATAMP_ASYNCPRES_RTCCLK_16 TAMP_ATCR1_ATCKSEL_2
650#define RTC_ATAMP_ASYNCPRES_RTCCLK_32 (TAMP_ATCR1_ATCKSEL_2 | TAMP_ATCR1_ATCKSEL_0)
651#define RTC_ATAMP_ASYNCPRES_RTCCLK_64 (TAMP_ATCR1_ATCKSEL_2 | TAMP_ATCR1_ATCKSEL_1)
652#define RTC_ATAMP_ASYNCPRES_RTCCLK_128 (TAMP_ATCR1_ATCKSEL_2 | TAMP_ATCR1_ATCKSEL_1 | TAMP_ATCR1_ATCKSEL_0)
661#define RTC_ATAMP_1 0u
662#define RTC_ATAMP_2 1u
663#define RTC_ATAMP_3 2u
664#define RTC_ATAMP_4 3u
665#define RTC_ATAMP_5 4u
666#define RTC_ATAMP_6 5u
667#define RTC_ATAMP_7 6u
668#define RTC_ATAMP_8 7u
677#define RTC_MONOTONIC_COUNTER_1 0u
688#define TAMP_OFFSET (TAMP_BASE - RTC_BASE)
702#define RTC_WAKEUPCLOCK_RTCCLK_DIV16 0x00000000u
703#define RTC_WAKEUPCLOCK_RTCCLK_DIV8 RTC_CR_WUCKSEL_0
704#define RTC_WAKEUPCLOCK_RTCCLK_DIV4 RTC_CR_WUCKSEL_1
705#define RTC_WAKEUPCLOCK_RTCCLK_DIV2 (RTC_CR_WUCKSEL_0 | RTC_CR_WUCKSEL_1)
706#define RTC_WAKEUPCLOCK_CK_SPRE_16BITS RTC_CR_WUCKSEL_2
707#define RTC_WAKEUPCLOCK_CK_SPRE_17BITS (RTC_CR_WUCKSEL_1 | RTC_CR_WUCKSEL_2)
720#define RTC_SMOOTHCALIB_PERIOD_32SEC 0x00000000u
722#define RTC_SMOOTHCALIB_PERIOD_16SEC RTC_CALR_CALW16
724#define RTC_SMOOTHCALIB_PERIOD_8SEC RTC_CALR_CALW8
734#define RTC_SMOOTHCALIB_PLUSPULSES_SET RTC_CALR_CALP
737#define RTC_SMOOTHCALIB_PLUSPULSES_RESET 0x00000000u
747#define RTC_CALIBOUTPUT_512HZ 0x00000000u
748#define RTC_CALIBOUTPUT_1HZ RTC_CR_COSEL
757#define RTC_SHIFTADD1S_RESET 0x00000000u
758#define RTC_SHIFTADD1S_SET RTC_SHIFTR_ADD1S
783#define __HAL_RTC_WAKEUPTIMER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_WUTE))
790#define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_WUTE))
800#define __HAL_RTC_WAKEUPTIMER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
810#define __HAL_RTC_WAKEUPTIMER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
821#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->SR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
823#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
834#define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
845#define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR) & (__FLAG__)) != 0U) ? 1U : 0U)
856#define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
868#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SCR |= __FLAG__)
870#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
883#define __HAL_RTC_TAMPER1_ENABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->CR1 |= (TAMP_CR1_TAMP1E))
885#define __HAL_RTC_TAMPER1_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP1E))
894#define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->CR1 &= ~(RTC_TAMPCR_TAMP1E))
896#define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP1E))
905#define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->CR1 |= (TAMP_CR1_TAMP2E))
907#define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP2E))
916#define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + (TAMP_OFFSET))->CR1 &= ~(RTC_TAMPCR_TAMP2E))
918#define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP2E))
927#define __HAL_RTC_TAMPER3_ENABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->CR1 |= (TAMP_CR1_TAMP3E))
929#define __HAL_RTC_TAMPER3_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP3E))
938#define __HAL_RTC_TAMPER3_DISABLE(__HANDLE__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->CR1 &= ~(RTC_TAMPCR_TAMP3E))
940#define __HAL_RTC_TAMPER3_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP3E))
955#define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->IER |= (__INTERRUPT__))
957#define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAMPCR |= (__INTERRUPT__))
972#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->IER &= ~(__INTERRUPT__))
974#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAMPCR &= ~(__INTERRUPT__))
989#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->IER) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
991#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->TAMPCR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
1005#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) ((((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->SR) & (__FLAG__)) != 0U) ? 1U : 0U)
1007#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
1021#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->SCR) |= (__FLAG__))
1023#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT))
1040#define __HAL_RTC_TAMPER_GET_SAMPLING_FREQ(__HANDLE__) ((uint32_t)((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->FLTCR) & (RTC_TAMPERSAMPLINGFREQ_RTCCLK_MASK)))
1042#define __HAL_RTC_TAMPER_GET_SAMPLING_FREQ(__HANDLE__) ((uint32_t)(((__HANDLE__)->Instance->TAMPCR) & (RTC_TAMPERSAMPLINGFREQ_RTCCLK_MASK)))
1057#define __HAL_RTC_TAMPER_GET_SAMPLES_COUNT(__HANDLE__) ((uint32_t)((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->FLTCR) & (RTC_TAMPERFILTER_MASK)))
1059#define __HAL_RTC_TAMPER_GET_SAMPLES_COUNT(__HANDLE__) ((uint32_t)(((__HANDLE__)->Instance->TAMPCR) & (RTC_TAMPERFILTER_MASK)))
1073#define __HAL_RTC_TAMPER_GET_PRCHRG_DURATION(__HANDLE__) ((uint32_t)((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->FLTCR) & (RTC_TAMPERPRECHARGEDURATION_MASK)))
1075#define __HAL_RTC_TAMPER_GET_PRCHRG_DURATION(__HANDLE__) ((uint32_t)(((__HANDLE__)->Instance->TAMPCR) & (RTC_TAMPERPRECHARGEDURATION_MASK)))
1087#define __HAL_RTC_TAMPER_GET_PULLUP_STATUS(__HANDLE__) ((uint32_t)((((TAMP_TypeDef *)((uint32_t)((__HANDLE__)->Instance) + TAMP_OFFSET))->FLTCR) & (RTC_TAMPER_PULLUP_MASK)))
1089#define __HAL_RTC_TAMPER_GET_PULLUP_STATUS(__HANDLE__) ((uint32_t)(((__HANDLE__)->Instance->TAMPCR) & (RTC_TAMPER_PULLUP_MASK)))
1101#define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TSE))
1108#define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TSE))
1118#define __HAL_RTC_TIMESTAMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
1128#define __HAL_RTC_TIMESTAMP_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
1139#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->MISR) & ((__INTERRUPT__) >> 12)) != 0U) ? 1U : 0U)
1141#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
1151#define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
1163#define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR) & (__FLAG__)) != 0U) ? 1U : 0U)
1165#define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
1178#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SCR |= __FLAG__)
1180#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)))
1188#define __HAL_RTC_INTERNAL_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ITSE))
1195#define __HAL_RTC_INTERNAL_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ITSE))
1206#define __HAL_RTC_INTERNAL_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR) & (__FLAG__)) != 0U) ? 1U : 0U)
1208#define __HAL_RTC_INTERNAL_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
1221#define __HAL_RTC_INTERNAL_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SCR |= __FLAG__)
1223#define __HAL_RTC_INTERNAL_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)))
1232#define __HAL_RTC_TAMPTS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_TIMESTAMPONTAMPERDETECTION_MASK))
1234#define __HAL_RTC_TAMPTS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TIMESTAMPONTAMPERDETECTION_MASK))
1243#define __HAL_RTC_TAMPTS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_TIMESTAMPONTAMPERDETECTION_MASK))
1245#define __HAL_RTC_TAMPTS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TIMESTAMPONTAMPERDETECTION_MASK))
1257#define __HAL_RTC_TAMPTS_GET_STATUS(__HANDLE__) ((__HANDLE__)->Instance->CR &= RTC_TIMESTAMPONTAMPERDETECTION_MASK)
1259#define __HAL_RTC_TAMPTS_GET_STATUS(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= RTC_TIMESTAMPONTAMPERDETECTION_MASK)
1268#define __HAL_RTC_TAMPOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TAMPOE))
1275#define __HAL_RTC_TAMPOE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TAMPOE))
1287#define __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_COE))
1294#define __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_COE))
1301#define __HAL_RTC_CLOCKREF_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_REFCKON))
1308#define __HAL_RTC_CLOCKREF_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_REFCKON))
1319#define __HAL_RTC_SHIFT_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ICSR) & (__FLAG__)) != 0U) ? 1U : 0U)
1321#define __HAL_RTC_SHIFT_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U) ? 1U : 0U)
1333#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI_D1->IMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1335#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1342#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI_D1->IMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1344#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1352#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI_D1->EMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1354#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1362#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI_D1->EMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1364#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1371#define __HAL_RTC_WAKEUPTIMER_EXTID3_ENABLE_EVENT() (EXTI->D3PMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1377#define __HAL_RTC_WAKEUPTIMER_EXTID3_DISABLE_EVENT() (EXTI->D3PMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1379#if defined(DUAL_CORE)
1384#define __HAL_RTC_WAKEUPTIMER_EXTID2_ENABLE_IT() (EXTI_D2->IMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1390#define __HAL_RTC_WAKEUPTIMER_EXTID2_DISABLE_IT() (EXTI_D2->IMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1396#define __HAL_RTC_WAKEUPTIMER_EXTID2_ENABLE_EVENT() (EXTI_D2->EMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1402#define __HAL_RTC_WAKEUPTIMER_EXTID2_DISABLE_EVENT() (EXTI_D2->EMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1410#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1416#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1422#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1428#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT))
1434#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
1435 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); \
1436 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE(); \
1444#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
1445 __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE(); \
1446 __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE(); \
1454#define __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI_D1->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1456#define __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1464#define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI_D1->PR1 = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1466#define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR1 = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1473#define __HAL_RTC_WAKEUPTIMER_EXTID3_GET_FLAG() (EXTI_D3->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1479#define __HAL_RTC_WAKEUPTIMER_EXTID3_CLEAR_FLAG() (EXTI_D3->PR1 = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1485#define __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1487#if defined(DUAL_CORE)
1493#define __HAL_RTC_WAKEUPTIMER_EXTID2_GET_FLAG() (EXTI_D2->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1499#define __HAL_RTC_WAKEUPTIMER_EXTID2_CLEAR_FLAG() (EXTI_D2->PR1 = RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1512#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT() (EXTI_D1->IMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1514#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT() (EXTI->IMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1522#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT() (EXTI_D1->IMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1524#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT() (EXTI->IMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1532#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI_D1->EMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1534#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1542#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI_D1->EMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1544#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1547#if defined(DUAL_CORE)
1552#define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_ENABLE_IT() (EXTI_D2->IMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1558#define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_DISABLE_IT() (EXTI_D2->IMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1565#define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_ENABLE_EVENT() (EXTI_D2->EMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1572#define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_DISABLE_EVENT() (EXTI_D2->EMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1580#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1586#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1592#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1598#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT))
1604#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
1605 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); \
1606 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE(); \
1613#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
1614 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE(); \
1615 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE(); \
1623#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI_D1->PR1 & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1625#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI->PR1 & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1633#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG() (EXTI_D1->PR1 = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1635#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG() (EXTI->PR1 = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1638#if defined(DUAL_CORE)
1643#define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_GET_FLAG() (EXTI_D2->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
1649#define __HAL_RTC_TAMPER_TIMESTAMP_EXTID2_CLEAR_FLAG() (EXTI_D2->PR1 = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1657#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)
1764void HAL_RTCEx_BKUPWrite(
RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data);
1780HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(
RTC_HandleTypeDef *hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue);
1820#define RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT EXTI_IMR1_IM18
1821#define RTC_EXTI_LINE_WAKEUPTIMER_EVENT EXTI_IMR1_IM19
1824#define RTC_TAMPER_X ((uint32_t) (RTC_TAMPER_1 | RTC_TAMPER_2 | RTC_TAMPER_3))
1825#define RTC_TAMPER_X_INTERRUPT ((uint32_t) (RTC_IT_TAMP1 | RTC_IT_TAMP2 | RTC_IT_TAMP3))
1846#define IS_RTC_BKP(__BKP__) ((__BKP__) < BKP_REG_NUMBER)
1852#define IS_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TIMESTAMPEDGE_RISING) || \
1853 ((EDGE) == RTC_TIMESTAMPEDGE_FALLING))
1855#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TIMESTAMPPIN_DEFAULT))
1861#define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV16) || \
1862 ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV8) || \
1863 ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV4) || \
1864 ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV2) || \
1865 ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_16BITS) || \
1866 ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_17BITS))
1868#define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= RTC_WUTR_WUT)
1874#define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SMOOTHCALIB_PERIOD_32SEC) || \
1875 ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_16SEC) || \
1876 ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_8SEC))
1878#define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_SET) || \
1879 ((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_RESET))
1881#define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= RTC_CALR_CALM)
1887#define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_SHIFTADD1S_RESET) || \
1888 ((SEL) == RTC_SHIFTADD1S_SET))
1890#define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= RTC_SHIFTR_SUBFS)
1892#define IS_RTC_CALIB_OUTPUT(OUTPUT) (((OUTPUT) == RTC_CALIBOUTPUT_512HZ) || \
1893 ((OUTPUT) == RTC_CALIBOUTPUT_1HZ))
1899#define IS_RTC_TAMPER(__TAMPER__) ((((__TAMPER__) & RTC_TAMPER_X) != 0x00U) && \
1900 (((__TAMPER__) & ~RTC_TAMPER_X) == 0x00U))
1902#define IS_RTC_TAMPER_INTERRUPT(__INTERRUPT__) \
1903 ((((__INTERRUPT__) & ( RTC_TAMPER_X_INTERRUPT | RTC_IT_TAMPALL )) != 0x00U) && \
1904 (((__INTERRUPT__) & (~(RTC_TAMPER_X_INTERRUPT | RTC_IT_TAMPALL))) == 0x00U))
1906#define IS_RTC_TAMPER_TRIGGER(__TRIGGER__) (((__TRIGGER__) == RTC_TAMPERTRIGGER_RISINGEDGE) || \
1907 ((__TRIGGER__) == RTC_TAMPERTRIGGER_FALLINGEDGE) || \
1908 ((__TRIGGER__) == RTC_TAMPERTRIGGER_LOWLEVEL) || \
1909 ((__TRIGGER__) == RTC_TAMPERTRIGGER_HIGHLEVEL))
1911#define IS_RTC_TAMPER_ERASE_MODE(__MODE__) (((__MODE__) == RTC_TAMPER_ERASE_BACKUP_ENABLE) || \
1912 ((__MODE__) == RTC_TAMPER_ERASE_BACKUP_DISABLE))
1914#define IS_RTC_TAMPER_MASKFLAG_STATE(__STATE__) (((__STATE__) == RTC_TAMPERMASK_FLAG_ENABLE) || \
1915 ((__STATE__) == RTC_TAMPERMASK_FLAG_DISABLE))
1917#define IS_RTC_TAMPER_FILTER(__FILTER__) (((__FILTER__) == RTC_TAMPERFILTER_DISABLE) || \
1918 ((__FILTER__) == RTC_TAMPERFILTER_2SAMPLE) || \
1919 ((__FILTER__) == RTC_TAMPERFILTER_4SAMPLE) || \
1920 ((__FILTER__) == RTC_TAMPERFILTER_8SAMPLE))
1922#define IS_RTC_TAMPER_SAMPLING_FREQ(__FREQ__) (((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768)|| \
1923 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384)|| \
1924 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192) || \
1925 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096) || \
1926 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048) || \
1927 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024) || \
1928 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512) || \
1929 ((__FREQ__) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256))
1931#define IS_RTC_TAMPER_PRECHARGE_DURATION(__DURATION__) (((__DURATION__) == RTC_TAMPERPRECHARGEDURATION_1RTCCLK) || \
1932 ((__DURATION__) == RTC_TAMPERPRECHARGEDURATION_2RTCCLK) || \
1933 ((__DURATION__) == RTC_TAMPERPRECHARGEDURATION_4RTCCLK) || \
1934 ((__DURATION__) == RTC_TAMPERPRECHARGEDURATION_8RTCCLK))
1936#define IS_RTC_TAMPER_PULLUP_STATE(__STATE__) (((__STATE__) == RTC_TAMPER_PULLUP_ENABLE) || \
1937 ((__STATE__) == RTC_TAMPER_PULLUP_DISABLE))
1939#define IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(__DETECTION__) (((__DETECTION__) == RTC_TIMESTAMPONTAMPERDETECTION_ENABLE) || \
1940 ((__DETECTION__) == RTC_TIMESTAMPONTAMPERDETECTION_DISABLE))
1943#define IS_RTC_TAMPER_TAMPERDETECTIONOUTPUT(__MODE__) (((__MODE__) == RTC_TAMPERDETECTIONOUTPUT_ENABLE) || \
1944 ((__MODE__) == RTC_TAMPERDETECTIONOUTPUT_DISABLE))
1947#define IS_RTC_TAMPER_FILTER_CONFIG_CORRECT(FILTER, TRIGGER) \
1948 ( ( ((FILTER) != RTC_TAMPERFILTER_DISABLE) \
1949 && ( ((TRIGGER) == RTC_TAMPERTRIGGER_LOWLEVEL) \
1950 || ((TRIGGER) == RTC_TAMPERTRIGGER_HIGHLEVEL))) \
1951 || ( ((FILTER) == RTC_TAMPERFILTER_DISABLE) \
1952 && ( ((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) \
1953 || ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE))))
1955#define IS_RTC_INTERNAL_TAMPER(__INT_TAMPER__) ((((__INT_TAMPER__) & RTC_INT_TAMPER_ALL) != 0x00U) && \
1956 (((__INT_TAMPER__) & ~RTC_INT_TAMPER_ALL) == 0x00U))
void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc)
Wake Up Timer Event Callback in non blocking mode.
Definition: stm32h7xx_hal_timebase_rtc_wakeup_template.c:276
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
RTC Date structure definition.
Definition: stm32h7xx_hal_rtc.h:129
RTC Handle Structure definition.
Definition: stm32h7xx_hal_rtc.h:176
Definition: stm32h7xx_hal_rtc_ex.h:51
uint32_t Trigger
Definition: stm32h7xx_hal_rtc_ex.h:58
uint32_t SamplingFrequency
Definition: stm32h7xx_hal_rtc_ex.h:70
uint32_t Filter
Definition: stm32h7xx_hal_rtc_ex.h:67
uint32_t TamperPullUp
Definition: stm32h7xx_hal_rtc_ex.h:76
uint32_t Tamper
Definition: stm32h7xx_hal_rtc_ex.h:52
uint32_t NoErase
Definition: stm32h7xx_hal_rtc_ex.h:61
uint32_t PrechargeDuration
Definition: stm32h7xx_hal_rtc_ex.h:73
uint32_t Interrupt
Definition: stm32h7xx_hal_rtc_ex.h:55
uint32_t TimeStampOnTamperDetection
Definition: stm32h7xx_hal_rtc_ex.h:79
uint32_t MaskFlag
Definition: stm32h7xx_hal_rtc_ex.h:64
RTC Time structure definition.
Definition: stm32h7xx_hal_rtc.h:93