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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_MASK (0x1U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_MASK (0x2U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_SHIFT (1U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_MASK (0x10U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_SHIFT (4U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_MASK (0xF00U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_SHIFT (8U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_MASK (0x1000U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_SHIFT (12U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_MASK (0x100000U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_SHIFT (20U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_MASK (0xFU) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_MASK (0xF0U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_SHIFT (4U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_MASK (0xF00U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_SHIFT (8U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_MASK (0xF000U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_SHIFT (12U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_MASK (0xF0000U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_SHIFT (16U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_MASK (0xF00000U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_SHIFT (20U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_MASK (0xF000000U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_SHIFT (24U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_MASK (0xF0000000U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_MASK (0xF0000U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_SHIFT (16U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_MASK (0xF00000U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_SHIFT (20U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_MASK (0xF000000U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_SHIFT (24U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_MASK (0xFU) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_MASK (0xF0U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_SHIFT (4U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_MASK (0xF00U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_SHIFT (8U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_MASK (0xF000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_SHIFT (12U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_MASK (0xF0000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_SHIFT (16U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_MASK (0xF00000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_SHIFT (20U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_MASK (0xF000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_SHIFT (24U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_MASK (0xF0000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_MASK (0xFU) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_MASK (0xF0U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_SHIFT (4U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_MASK (0xF00U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_SHIFT (8U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_MASK (0xF000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_SHIFT (12U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_MASK (0xF0000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_SHIFT (16U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_MASK (0xF00000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_SHIFT (20U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_MASK (0xF000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_SHIFT (24U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_MASK (0xF0000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_MASK (0x1U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_USER_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_MASK (0x2U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_SHIFT (1U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_NONSECURE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_MASK (0x10U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_SHIFT (4U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_SETTING_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_MASK (0xF00U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_SHIFT (8U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_WHITE_LIST_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_MASK (0x1000U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_SHIFT (12U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_LIST_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_MASK (0x100000U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_SHIFT (20U) |
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#define | GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_SHIFT)) & GPC_SET_POINT_CTRL_SP_AUTHEN_CTRL_LOCK_CFG_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_MASK (0xFU) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU0_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_MASK (0xF0U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_SHIFT (4U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU1_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_MASK (0xF00U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_SHIFT (8U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU2_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_MASK (0xF000U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_SHIFT (12U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_REQ_CPU3_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_MASK (0xF0000U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_SHIFT (16U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU0_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_MASK (0xF00000U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_SHIFT (20U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU1_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_MASK (0xF000000U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_SHIFT (24U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU2_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_MASK (0xF0000000U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_SHIFT)) & GPC_SET_POINT_CTRL_SP_CPU_REQ_SP_ACCEPTED_CPU3_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_ALLOWED_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_MASK (0xF0000U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_SHIFT (16U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_TARGET_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_MASK (0xF00000U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_SHIFT (20U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_CURRENT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_MASK (0xF000000U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_SHIFT (24U) |
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#define | GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_SHIFT)) & GPC_SET_POINT_CTRL_SP_SYS_STAT_SYS_SP_PREVIOUS_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_MASK (0xFU) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP0_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_MASK (0xF0U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_SHIFT (4U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP1_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_MASK (0xF00U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_SHIFT (8U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP2_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_MASK (0xF000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_SHIFT (12U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP3_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_MASK (0xF0000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_SHIFT (16U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP4_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_MASK (0xF00000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_SHIFT (20U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP5_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_MASK (0xF000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_SHIFT (24U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP6_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_MASK (0xF0000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_0_7_SYS_SP7_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_MASK (0xFU) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP8_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_MASK (0xF0U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_SHIFT (4U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP9_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_MASK (0xF00U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_SHIFT (8U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP10_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_MASK (0xF000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_SHIFT (12U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP11_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_MASK (0xF0000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_SHIFT (16U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP12_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_MASK (0xF00000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_SHIFT (20U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP13_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_MASK (0xF000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_SHIFT (24U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP14_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_MASK (0xF0000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_SHIFT)) & GPC_SET_POINT_CTRL_SP_PRIORITY_8_15_SYS_SP15_PRIORITY_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_DISABLE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_MASK (0xFFFFU) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_SHIFT (0U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_STEP_CNT_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_MASK (0x30000000U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_SHIFT (28U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_MASK) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_MASK (0x80000000U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_SHIFT (31U) |
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#define | GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE(x) (((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_DISABLE_MASK) |
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#define GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE |
( |
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x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE |
( |
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x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE |
( |
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x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE |
( |
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x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BG_PLDO_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE |
( |
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x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE |
( |
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x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE |
( |
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x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE |
( |
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x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_BIAS_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE |
( |
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x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE |
( |
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x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_DOWN_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE |
( |
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x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_DCDC_UP_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_DOWN_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_GROUP_UP_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ISO_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_POST_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LDO_PRE_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_LPCG_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_PLL_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_OFF_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_POWER_ON_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_EARLY_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_RESET_LATE_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_DOWN_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_ROOT_UP_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_RESTORE_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value
#define GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE |
( |
|
x | ) |
(((uint32_t)(((uint32_t)(x)) << GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_SHIFT)) & GPC_SET_POINT_CTRL_SP_SSAR_SAVE_CTRL_CNT_MODE_MASK) |
CNT_MODE - Count mode 0b00..Counter disable mode: not use step counter, step completes once receiving step_done 0b01..Counter delay mode: delay after receiving step_done, delay cycle number is STEP_CNT 0b10..Ignore step_done response, the counter starts to count once step begins, when counter reaches STEP_CNT value, the step completes 0b11..Time out mode, the counter starts to count once step begins, the step completes when either step_done received or counting to STEP_CNT value