RTEMS 6.1-rc7
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i2c.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * Copyright (c) 2010 embedded brains GmbH & Co. KG
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#ifndef LIBBSP_ARM_LPC32XX_I2C_H
37#define LIBBSP_ARM_LPC32XX_I2C_H
38
39#include <rtems.h>
40
41#include <bsp/lpc32xx.h>
42
43#ifdef __cplusplus
44extern "C" {
45#endif /* __cplusplus */
46
66#define I2CCLK_1_EN BSP_BIT32(0)
67#define I2CCLK_2_EN BSP_BIT32(1)
68#define I2CCLK_1_HIGH_DRIVE BSP_BIT32(2)
69#define I2CCLK_2_HIGH_DRIVE BSP_BIT32(3)
70#define I2CCLK_USB_HIGH_DRIVE BSP_BIT32(4)
71
80#define I2C_TX_READ BSP_BIT32(0)
81#define I2C_TX_ADDR(val) BSP_FLD32(val, 1, 7)
82#define I2C_TX_START BSP_BIT32(8)
83#define I2C_TX_STOP BSP_BIT32(9)
84
93#define I2C_STAT_TDI BSP_BIT32(0)
94#define I2C_STAT_AFI BSP_BIT32(1)
95#define I2C_STAT_NAI BSP_BIT32(2)
96#define I2C_STAT_DRMI BSP_BIT32(3)
97#define I2C_STAT_DRSI BSP_BIT32(4)
98#define I2C_STAT_ACTIVE BSP_BIT32(5)
99#define I2C_STAT_SCL BSP_BIT32(6)
100#define I2C_STAT_SDA BSP_BIT32(7)
101#define I2C_STAT_RFF BSP_BIT32(8)
102#define I2C_STAT_RFE BSP_BIT32(9)
103#define I2C_STAT_TFF BSP_BIT32(10)
104#define I2C_STAT_TFE BSP_BIT32(11)
105#define I2C_STAT_TFFS BSP_BIT32(12)
106#define I2C_STAT_TFES BSP_BIT32(13)
107
116#define I2C_CTRL_TDIE BSP_BIT32(0)
117#define I2C_CTRL_AFIE BSP_BIT32(1)
118#define I2C_CTRL_NAIE BSP_BIT32(2)
119#define I2C_CTRL_DRMIE BSP_BIT32(3)
120#define I2C_CTRL_DRSIE BSP_BIT32(4)
121#define I2C_CTRL_RFFIE BSP_BIT32(5)
122#define I2C_CTRL_RFDAIE BSP_BIT32(6)
123#define I2C_CTRL_TFFIO BSP_BIT32(7)
124#define I2C_CTRL_RESET BSP_BIT32(8)
125#define I2C_CTRL_SEVEN BSP_BIT32(9)
126#define I2C_CTRL_TFFSIE BSP_BIT32(10)
127
140 volatile lpc32xx_i2c *i2c,
141 unsigned clock_in_hz
142);
143
147void lpc32xx_i2c_reset(volatile lpc32xx_i2c *i2c);
148
158 volatile lpc32xx_i2c *i2c,
159 unsigned clock_in_hz
160);
161
174 volatile lpc32xx_i2c *i2c,
175 unsigned addr
176);
177
188 volatile lpc32xx_i2c *i2c,
189 const uint8_t *out,
190 size_t n,
191 bool stop
192);
193
206 volatile lpc32xx_i2c *i2c,
207 unsigned addr
208);
209
218 volatile lpc32xx_i2c *i2c,
219 uint8_t *in,
220 size_t n,
221 bool stop
222);
223
233 volatile lpc32xx_i2c *i2c,
234 unsigned addr,
235 const uint8_t *out,
236 size_t out_size,
237 uint8_t *in,
238 size_t in_size
239);
240
249static inline rtems_status_code lpc32xx_i2c_write(
250 volatile lpc32xx_i2c *i2c,
251 unsigned addr,
252 const uint8_t *out,
253 size_t out_size
254)
255{
256 return lpc32xx_i2c_write_and_read(i2c, addr, out, out_size, NULL, 0);
257}
258
267static inline rtems_status_code lpc32xx_i2c_read(
268 volatile lpc32xx_i2c *i2c,
269 unsigned addr,
270 uint8_t *in,
271 size_t in_size
272)
273{
274 return lpc32xx_i2c_write_and_read(i2c, addr, NULL, 0, in, in_size);
275}
276
279#ifdef __cplusplus
280}
281#endif /* __cplusplus */
282
283#endif /* LIBBSP_ARM_LPC32XX_I2C_H */
rtems_status_code
This enumeration provides status codes for directives of the Classic API.
Definition: status.h:85
rtems_status_code lpc32xx_i2c_init(volatile lpc32xx_i2c *i2c, unsigned clock_in_hz)
Initializes the I2C module i2c.
Definition: i2c.c:46
rtems_status_code lpc32xx_i2c_read_start(volatile lpc32xx_i2c *i2c, unsigned addr)
Starts a read transaction on the I2C module i2c.
Definition: i2c.c:142
rtems_status_code lpc32xx_i2c_read_with_optional_stop(volatile lpc32xx_i2c *i2c, uint8_t *in, size_t n, bool stop)
Reads data via the I2C module i2c with optional stop.
Definition: i2c.c:187
rtems_status_code lpc32xx_i2c_write_start(volatile lpc32xx_i2c *i2c, unsigned addr)
Starts a write transaction on the I2C module i2c.
Definition: i2c.c:134
void lpc32xx_i2c_reset(volatile lpc32xx_i2c *i2c)
Resets the I2C module i2c.
Definition: i2c.c:41
rtems_status_code lpc32xx_i2c_write_with_optional_stop(volatile lpc32xx_i2c *i2c, const uint8_t *out, size_t n, bool stop)
Writes data via the I2C module i2c with optional stop.
Definition: i2c.c:150
rtems_status_code lpc32xx_i2c_clock(volatile lpc32xx_i2c *i2c, unsigned clock_in_hz)
Sets the I2C module i2c clock.
Definition: i2c.c:68
rtems_status_code lpc32xx_i2c_write_and_read(volatile lpc32xx_i2c *i2c, unsigned addr, const uint8_t *out, size_t out_size, uint8_t *in, size_t in_size)
Writes and reads data via the I2C module i2c.
Definition: i2c.c:229
Register base addresses.
This header file defines the RTEMS Classic API.
Definition: 8xx_immap.h:210
Definition: lpc32xx.h:470