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RTEMS 6.1-rc7
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This file discusses SPARC specific issues which are important to this port. The primary topics in this file are:
This information on register usage is based heavily on a comment in the file gcc-2.7.0/config/sparc/sparc.h in the the gcc 2.7.0 source.
NOTE: As of gcc 2.7.0 register g1 was used in the following scenarios:
+ as a temporary by the 64 bit sethi pattern + when restoring call-preserved registers in large stack frames
RTEMS places no constraints on the usage of the global registers. Although gcc assumes that either g5-g7 (non-V9) or g6-g7 (V9) are reserved for the operating system, RTEMS does not assume any special use for them.
The stack grows downward (i.e. to lower addresses) on the SPARC architecture.
The following is the organization of the stack frame:
x = optional components
The EF (enable floating point unit) in the PSR is utilized in this port to prevent non-floating point tasks from performing floating point operations. This bit is maintained as part of the integer context. However, the floating point context is switched BEFORE the integer context. Thus the EF bit in place at the time of the FP switch may indicate that FP operations are disabled. This occurs on certain task switches, when the EF bit will be 0 for the outgoing task and thus a fault will be generated on the first FP operation of the FP context save.
The remedy for this is to enable FP access as the first step in both the save and restore of the FP context area. This bit will be subsequently reloaded by the integer context switch.
Two of the scenarios which demonstrate this problem are outlined below: