38#ifndef _RTEMS_SCORE_CPU_H
39#define _RTEMS_SCORE_CPU_H
61#define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE
63#define CPU_HARDWARE_FP FALSE
65#define CPU_SOFTWARE_FP FALSE
67#define CPU_ALL_TASKS_ARE_FP FALSE
69#define CPU_IDLE_TASK_IS_FP FALSE
71#define CPU_USE_DEFERRED_FP_SWITCH FALSE
73#define CPU_ENABLE_ROBUST_THREAD_DISPATCH FALSE
86#define CPU_STACK_GROWS_UP FALSE
89#define CPU_CACHE_LINE_BYTES 32
91#define CPU_STRUCTURE_ALIGNMENT
103#define CPU_MODES_INTERRUPT_MASK 0x00000001
105#define CPU_MAXIMUM_PROCESSORS 32
183#define _CPU_Context_Get_SP( _context ) \
184 (_context)->r3_stack_pointer
196 uint32_t special_interrupt_register;
218#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
224#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
237#define CPU_STACK_MINIMUM_SIZE (1024*4)
239#define CPU_SIZEOF_POINTER 4
249#define CPU_ALIGNMENT 8
274#define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT
280#define CPU_STACK_ALIGNMENT 8
282#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
303#define _CPU_ISR_Disable( _isr_cookie ) \
307 v850_get_psw( _psw ); \
308 __asm__ __volatile__( "di" ); \
309 _isr_cookie = _psw; \
323#define _CPU_ISR_Enable( _isr_cookie ) \
325 unsigned int _psw = (_isr_cookie); \
327 v850_set_psw( _psw ); \
342#define _CPU_ISR_Flash( _isr_cookie ) \
344 unsigned int _psw = (_isr_cookie); \
345 v850_set_psw( _psw ); \
346 __asm__ __volatile__( "di" ); \
349static inline bool _CPU_ISR_Is_enabled( uint32_t level )
351 return ( level & V850_PSW_INTERRUPT_DISABLE_MASK )
352 != V850_PSW_INTERRUPT_DISABLE;
370#define _CPU_ISR_Set_level( new_level ) \
373 __asm__ __volatile__( "di" ); \
375 __asm__ __volatile__( "ei" ); \
428void _CPU_Context_Initialize(
430 uint32_t *stack_base,
453#define _CPU_Context_Restart_self( _the_context ) \
454 _CPU_Context_restore( (_the_context) );
476#define _CPU_Context_Initialize_fp( _destination ) \
483#define CPU_USE_GENERIC_BITFIELD_CODE TRUE
485#define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE
620static inline uint32_t CPU_swap_u32(
624 unsigned int swapped;
626 #if (V850_HAS_BYTE_SWAP_INSTRUCTION == 1)
630 __asm__ __volatile__ (
"bsw %0, %1" :
"=r" (v),
"=&r" (swapped) );
632 uint32_t byte1, byte2, byte3, byte4;
634 byte4 = (value >> 24) & 0xff;
635 byte3 = (value >> 16) & 0xff;
636 byte2 = (value >> 8) & 0xff;
637 byte1 = value & 0xff;
639 swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4;
656 unsigned int swapped;
658 #if (V850_HAS_BYTE_SWAP_INSTRUCTION == 1)
662 __asm__ __volatile__ (
"bsh %0, %1" :
"=r" (v),
"=&r" (swapped) );
664 swapped = ((value & 0xff) << 8) | ((value >> 8) & 0xff);
671typedef uint32_t CPU_Counter_ticks;
This header file provides basic definitions used by the API and the implementation.
#define RTEMS_NO_RETURN
Tells the compiler in a function declaration that this function does not return.
Definition: basedefs.h:386
uint32_t _CPU_ISR_Get_level(void)
Returns the interrupt level of the executing thread.
Definition: cpu.c:166
void * _CPU_Thread_Idle_body(uintptr_t ignored)
Definition: idle-mcf5272.c:39
void _CPU_Initialize(void)
CPU initialization.
Definition: cpu.c:45
uintptr_t CPU_Uint32ptr
Definition: cpu.h:557
void _CPU_Exception_frame_print(const CPU_Exception_frame *frame)
Prints the exception frame via printk().
Definition: vectorexceptions.c:64
uint32_t _CPU_Counter_frequency(void)
Gets the current CPU counter frequency in Hz.
Definition: system-clocks.c:125
void _CPU_Context_switch(Context_Control *run, Context_Control *heir)
CPU switch context.
Definition: cpu_asm.c:110
CPU_Counter_ticks _CPU_Counter_read(void)
Gets the current CPU counter value.
Definition: system-clocks.c:130
#define CPU_swap_u16(value)
Definition: cpu.h:597
#define _CPU_Context_restore_fp(_fp_context_ptr)
Nothing to do due to the synchronous or lazy floating point switch.
Definition: cpu.h:901
#define _CPU_Context_save_fp(_fp_context_ptr)
Nothing to do due to the synchronous or lazy floating point switch.
Definition: cpu.h:895
The set of registers that specifies the complete processor state.
Definition: cpu.h:446
Interrupt stack frame (ISF).
Definition: cpuimpl.h:64
SPARC basic context.
Definition: cpu.h:213
Thread register context.
Definition: cpu.h:173
uint32_t r3_stack_pointer
Definition: cpu.h:161
V850 Set up Basic CPU Dependency Settings Based on Compiler Settings.