36#ifndef LIBBSP_ARM_LPC32XX_BSP_H
37#define LIBBSP_ARM_LPC32XX_BSP_H
51#define BSP_FEATURE_IRQ_EXTENSION
64struct rtems_bsdnet_ifconfig;
70 struct rtems_bsdnet_ifconfig *
config,
77#define RTEMS_BSP_NETWORK_DRIVER_ATTACH lpc_eth_attach_detach
82#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
106#define LPC32XX_STANDARD_TIMER (&lpc32xx.timer_1)
108static inline unsigned lpc32xx_timer(
void)
110 volatile lpc_timer *timer = LPC32XX_STANDARD_TIMER;
115static inline void lpc32xx_micro_seconds_delay(
unsigned us)
117 unsigned start = lpc32xx_timer();
118 unsigned delay = us * (LPC32XX_PERIPH_CLK / 1000000);
119 unsigned elapsed = 0;
122 elapsed = lpc32xx_timer() - start;
123 }
while (elapsed < delay);
126#if LPC32XX_OSCILLATOR_MAIN == 13000000U
127 #define LPC32XX_HCLKPLL_CTRL_INIT_VALUE \
128 (HCLK_PLL_POWER | HCLK_PLL_DIRECT | HCLK_PLL_M(16 - 1))
129 #define LPC32XX_HCLKDIV_CTRL_INIT_VALUE \
130 (HCLK_DIV_HCLK(2 - 1) | HCLK_DIV_PERIPH_CLK(16 - 1) | HCLK_DIV_DDRAM_CLK(0))
132 #error "unexpected main oscillator frequency"
135bool lpc32xx_start_pll_setup(
136 uint32_t hclkpll_ctrl,
137 uint32_t hclkdiv_ctrl,
141uint32_t lpc32xx_sysclk(
void);
143uint32_t lpc32xx_hclkpll_clk(
void);
145uint32_t lpc32xx_periph_clk(
void);
147uint32_t lpc32xx_hclk(
void);
149uint32_t lpc32xx_arm_clk(
void);
151uint32_t lpc32xx_ddram_clk(
void);
154 LPC32XX_NAND_CONTROLLER_NONE,
155 LPC32XX_NAND_CONTROLLER_MLC,
156 LPC32XX_NAND_CONTROLLER_SLC
157} lpc32xx_nand_controller;
159void lpc32xx_select_nand_controller(lpc32xx_nand_controller nand_controller);
161void bsp_restart(
void *addr);
165#define BSP_IDLE_TASK_BODY bsp_idle_thread
167#define BSP_CONSOLE_UART_BASE LPC32XX_BASE_UART_5
190#ifdef LPC32XX_SCRATCH_AREA_SIZE
196 extern uint8_t lpc32xx_scratch_area [LPC32XX_SCRATCH_AREA_SIZE]
200#define LPC32XX_DO_STOP_GPDMA \
202 if ((LPC32XX_DMACLK_CTRL & 0x1) != 0) { \
203 if ((lpc32xx.dma.cfg & DMA_CFG_E) != 0) { \
205 for (i = 0; i < 8; ++i) { \
206 lpc32xx.dma.channels [i].cfg = 0; \
208 lpc32xx.dma.cfg &= ~DMA_CFG_E; \
210 LPC32XX_DMACLK_CTRL = 0; \
214#define LPC32XX_DO_STOP_ETHERNET \
216 if ((LPC32XX_MAC_CLK_CTRL & 0x7) == 0x7) { \
217 lpc32xx.eth.command = 0x38; \
218 lpc32xx.eth.mac1 = 0xcf00; \
219 lpc32xx.eth.mac1 = 0; \
220 LPC32XX_MAC_CLK_CTRL = 0; \
224#define LPC32XX_DO_STOP_USB \
226 if ((LPC32XX_USB_CTRL & 0x010e8000) != 0) { \
227 LPC32XX_OTG_CLK_CTRL = 0; \
228 LPC32XX_USB_CTRL = 0x80000; \
232#define LPC32XX_DO_RESTART(addr) \
234 ARM_SWITCH_REGISTERS; \
235 rtems_interrupt_level level; \
238 rtems_interrupt_disable(level); \
241 arm_cp15_data_cache_test_and_clean(); \
242 arm_cp15_instruction_cache_invalidate(); \
244 ctrl = arm_cp15_get_control(); \
245 ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M); \
246 arm_cp15_set_control(ctrl); \
250 "mov pc, %[addr]\n" \
252 : ARM_SWITCH_OUTPUT \
253 : [addr] "r" (addr) \
This header file provides the default definition of BSP_INITIAL_EXTENSION.
void * bsp_idle_thread(uintptr_t ignored)
Optimized idle task.
Definition: bspidle.c:39
int lpc_eth_attach_detach(struct rtems_bsdnet_ifconfig *config, int attaching)
Network driver attach and detach function.
uint32_t lpc32xx_magic_zero_begin[]
Begin of magic zero area.
void * lpc32xx_idle(uintptr_t ignored)
Optimized idle task.
uint32_t lpc32xx_magic_zero_end[]
End of magic zero area.
uint32_t lpc32xx_magic_zero_size[]
Size of magic zero area.
This header file defines the RTEMS Classic API.
Definition: xnandpsu_onfi.h:185
Definition: deflate.c:114
Timer control block.
Definition: lpc-timer.h:147