37#ifndef _RTEMS_SCORE_CPUIMPL_H
38#define _RTEMS_SCORE_CPUIMPL_H
40#include <rtems/score/cpu.h>
52#define CPU_PER_CPU_CONTROL_SIZE 0
54#ifdef ARM_MULTILIB_ARCH_V4
56#if defined(ARM_MULTILIB_VFP_D32)
57#define CPU_INTERRUPT_FRAME_SIZE 240
58#elif defined(ARM_MULTILIB_VFP)
59#define CPU_INTERRUPT_FRAME_SIZE 112
61#define CPU_INTERRUPT_FRAME_SIZE 40
66#define CPU_THREAD_LOCAL_STORAGE_VARIANT 11
74#ifdef ARM_MULTILIB_ARCH_V4
77#ifdef ARM_MULTILIB_VFP
79#ifdef ARM_MULTILIB_VFP_D32
106#ifdef ARM_MULTILIB_HAS_STORE_RETURN_STATE
116 uint32_t return_cpsr;
125 uint32_t return_cpsr;
133static inline struct Per_CPU_Control *_ARM_Get_current_per_CPU_control(
void )
139 "mrc p15, 0, %0, c13, c0, 4"
146#define _CPU_Get_current_per_CPU_control() _ARM_Get_current_per_CPU_control()
152void _CPU_Context_volatile_clobber( uintptr_t pattern );
154void _CPU_Context_validate( uintptr_t pattern );
156static inline void _CPU_Instruction_illegal(
void )
158 __asm__
volatile (
"udf" );
161static inline void _CPU_Instruction_no_operation(
void )
163 __asm__
volatile (
"nop" );
166static inline void _CPU_Use_thread_local_storage(
170#ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
172 "mcr p15, 0, %0, c13, c0, 3" : :
"r" (
context->thread_id ) :
"memory"
179static inline void *_CPU_Get_TLS_thread_pointer(
183 return (
void *)
context->thread_id;
#define RTEMS_NO_RETURN
Tells the compiler in a function declaration that this function does not return.
Definition: basedefs.h:386
rtems_termios_device_context * context
Definition: console-config.c:62
The set of registers that specifies the complete processor state.
Definition: cpu.h:446
Interrupt stack frame (ISF).
Definition: cpuimpl.h:64
Thread register context.
Definition: cpu.h:173
Per CPU Core Structure.
Definition: percpu.h:384