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RTEMS 6.1-rc7
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#include <MIMXRT1166_cm4.h>
Data Fields | |
uint8_t | RESERVED_0 [4] |
__IO uint32_t | MCFGR |
__IO uint32_t | PAGE0_SDID |
__IO uint32_t | SCFGR |
struct { | |
__IO uint32_t CAAM_Type::JRDID_MS | |
__IO uint32_t CAAM_Type::JRDID_LS | |
} | JRADID [4] |
uint8_t | RESERVED_1 [40] |
__IO uint32_t | DEBUGCTL |
__IO uint32_t | JRSTARTR |
__IO uint32_t | RTIC_OWN |
struct { | |
__IO uint32_t CAAM_Type::RTIC_DID | |
uint8_t RESERVED_0 [4] | |
} | RTICADID [4] |
uint8_t | RESERVED_2 [16] |
__IO uint32_t | DECORSR |
uint8_t | RESERVED_3 [4] |
__IO uint32_t | DECORR |
struct { | |
__IO uint32_t CAAM_Type::DECODID_MS | |
__IO uint32_t CAAM_Type::DECODID_LS | |
} | DECONDID [1] |
uint8_t | RESERVED_4 [120] |
__IO uint32_t | DAR |
__O uint32_t | DRR |
uint8_t | RESERVED_5 [92] |
struct { | |
__IO uint32_t CAAM_Type::JRSMVBAR | |
uint8_t RESERVED_0 [4] | |
} | JRNSMVBAR [4] |
uint8_t | RESERVED_6 [124] |
__IO uint32_t | PBSL |
uint8_t | RESERVED_7 [28] |
struct { | |
__I uint32_t CAAM_Type::DMA_AIDL_MAP_MS | |
__I uint32_t CAAM_Type::DMA_AIDL_MAP_LS | |
__I uint32_t CAAM_Type::DMA_AIDM_MAP_MS | |
__I uint32_t CAAM_Type::DMA_AIDM_MAP_LS | |
} | AID_CNTS [1] |
__I uint32_t | DMA0_AID_ENB |
uint8_t | RESERVED_8 [12] |
__IO uint64_t | DMA0_ARD_TC |
uint8_t | RESERVED_9 [4] |
__IO uint32_t | DMA0_ARD_LAT |
__IO uint64_t | DMA0_AWR_TC |
uint8_t | RESERVED_10 [4] |
__IO uint32_t | DMA0_AWR_LAT |
uint8_t | RESERVED_11 [128] |
__IO uint8_t | MPPKR [64] |
uint8_t | RESERVED_12 [64] |
__IO uint8_t | MPMR [32] |
uint8_t | RESERVED_13 [32] |
__I uint8_t | MPTESTR [32] |
uint8_t | RESERVED_14 [24] |
__I uint32_t | MPECC |
uint8_t | RESERVED_15 [4] |
__IO uint32_t | JDKEKR [8] |
__IO uint32_t | TDKEKR [8] |
__IO uint32_t | TDSKR [8] |
uint8_t | RESERVED_16 [128] |
__IO uint64_t | SKNR |
uint8_t | RESERVED_17 [36] |
__I uint32_t | DMA_STA |
__I uint32_t | DMA_X_AID_7_4_MAP |
__I uint32_t | DMA_X_AID_3_0_MAP |
__I uint32_t | DMA_X_AID_15_12_MAP |
__I uint32_t | DMA_X_AID_11_8_MAP |
uint8_t | RESERVED_18 [4] |
__I uint32_t | DMA_X_AID_15_0_EN |
uint8_t | RESERVED_19 [8] |
__IO uint32_t | DMA_X_ARTC_CTL |
__IO uint32_t | DMA_X_ARTC_LC |
__IO uint32_t | DMA_X_ARTC_SC |
__IO uint32_t | DMA_X_ARTC_LAT |
__IO uint32_t | DMA_X_AWTC_CTL |
__IO uint32_t | DMA_X_AWTC_LC |
__IO uint32_t | DMA_X_AWTC_SC |
__IO uint32_t | DMA_X_AWTC_LAT |
uint8_t | RESERVED_20 [176] |
__IO uint32_t | RTMCTL |
__IO uint32_t | RTSCMISC |
__IO uint32_t | RTPKRRNG |
union { | |
__IO uint32_t CAAM_Type::RTPKRMAX | |
__I uint32_t CAAM_Type::RTPKRSQ | |
}; | |
__IO uint32_t | RTSDCTL |
union { | |
__IO uint32_t CAAM_Type::RTSBLIM | |
__I uint32_t CAAM_Type::RTTOTSAM | |
}; | |
__IO uint32_t | RTFRQMIN |
union { | |
struct { | |
__I uint32_t CAAM_Type::RTFRQCNT | |
__I uint32_t CAAM_Type::RTSCMC | |
__I uint32_t CAAM_Type::RTSCR1C | |
__I uint32_t CAAM_Type::RTSCR2C | |
__I uint32_t CAAM_Type::RTSCR3C | |
__I uint32_t CAAM_Type::RTSCR4C | |
__I uint32_t CAAM_Type::RTSCR5C | |
__I uint32_t CAAM_Type::RTSCR6PC | |
} COUNT | |
struct { | |
__IO uint32_t CAAM_Type::RTFRQMAX | |
__IO uint32_t CAAM_Type::RTSCML | |
__IO uint32_t CAAM_Type::RTSCR1L | |
__IO uint32_t CAAM_Type::RTSCR2L | |
__IO uint32_t CAAM_Type::RTSCR3L | |
__IO uint32_t CAAM_Type::RTSCR4L | |
__IO uint32_t CAAM_Type::RTSCR5L | |
__IO uint32_t CAAM_Type::RTSCR6PL | |
} LIMIT | |
}; | |
__I uint32_t | RTSTATUS |
__I uint32_t | RTENT [16] |
__I uint32_t | RTPKRCNT10 |
__I uint32_t | RTPKRCNT32 |
__I uint32_t | RTPKRCNT54 |
__I uint32_t | RTPKRCNT76 |
__I uint32_t | RTPKRCNT98 |
__I uint32_t | RTPKRCNTBA |
__I uint32_t | RTPKRCNTDC |
__I uint32_t | RTPKRCNTFE |
uint8_t | RESERVED_21 [32] |
__I uint32_t | RDSTA |
uint8_t | RESERVED_22 [12] |
__I uint32_t | RDINT0 |
__I uint32_t | RDINT1 |
uint8_t | RESERVED_23 [8] |
__IO uint32_t | RDHCNTL |
__I uint32_t | RDHDIG |
__O uint32_t | RDHBUF |
uint8_t | RESERVED_24 [788] |
struct { | |
__I uint32_t CAAM_Type::PX_SDID_PG0 | |
__IO uint32_t CAAM_Type::PX_SMAPR_PG0 | |
__IO uint32_t CAAM_Type::PX_SMAG2_PG0 | |
__IO uint32_t CAAM_Type::PX_SMAG1_PG0 | |
} | PX_PG0 [16] |
__IO uint32_t | REIS |
__IO uint32_t | REIE |
__I uint32_t | REIF |
__IO uint32_t | REIH |
uint8_t | RESERVED_25 [192] |
__IO uint32_t | SMWPJRR [4] |
uint8_t | RESERVED_26 [4] |
__O uint32_t | SMCR_PG0 |
uint8_t | RESERVED_27 [4] |
__I uint32_t | SMCSR_PG0 |
uint8_t | RESERVED_28 [8] |
__I uint32_t | CAAMVID_MS_TRAD |
__I uint32_t | CAAMVID_LS_TRAD |
struct { | |
__I uint64_t CAAM_Type::HT_JD_ADDR | |
__I uint64_t CAAM_Type::HT_SD_ADDR | |
__I uint32_t CAAM_Type::HT_JQ_CTRL_MS | |
__I uint32_t CAAM_Type::HT_JQ_CTRL_LS | |
uint8_t RESERVED_0 [4] | |
__I uint32_t CAAM_Type::HT_STATUS | |
} | HTA [1] |
uint8_t | RESERVED_29 [4] |
__IO uint32_t | JQ_DEBUG_SEL |
uint8_t | RESERVED_30 [404] |
__I uint32_t | JRJIDU_LS |
__I uint32_t | JRJDJIFBC |
__I uint32_t | JRJDJIF |
uint8_t | RESERVED_31 [28] |
__I uint32_t | JRJDS1 |
uint8_t | RESERVED_32 [24] |
__I uint64_t | JRJDDA [1] |
uint8_t | RESERVED_33 [408] |
__I uint32_t | CRNR_MS |
__I uint32_t | CRNR_LS |
__I uint32_t | CTPR_MS |
__I uint32_t | CTPR_LS |
uint8_t | RESERVED_34 [4] |
__I uint32_t | SMSTA |
uint8_t | RESERVED_35 [4] |
__I uint32_t | SMPO |
__I uint64_t | FAR |
__I uint32_t | FADID |
__I uint32_t | FADR |
uint8_t | RESERVED_36 [4] |
__I uint32_t | CSTA |
__I uint32_t | SMVID_MS |
__I uint32_t | SMVID_LS |
__I uint32_t | RVID |
__I uint32_t | CCBVID |
__I uint32_t | CHAVID_MS |
__I uint32_t | CHAVID_LS |
__I uint32_t | CHANUM_MS |
__I uint32_t | CHANUM_LS |
__I uint32_t | CAAMVID_MS |
__I uint32_t | CAAMVID_LS |
uint8_t | RESERVED_37 [61440] |
struct { | |
__IO uint64_t CAAM_Type::IRBAR_JR | |
uint8_t RESERVED_0 [4] | |
__IO uint32_t CAAM_Type::IRSR_JR | |
uint8_t RESERVED_1 [4] | |
__IO uint32_t CAAM_Type::IRSAR_JR | |
uint8_t RESERVED_2 [4] | |
__IO uint32_t CAAM_Type::IRJAR_JR | |
__IO uint64_t CAAM_Type::ORBAR_JR | |
uint8_t RESERVED_3 [4] | |
__IO uint32_t CAAM_Type::ORSR_JR | |
uint8_t RESERVED_4 [4] | |
__IO uint32_t CAAM_Type::ORJRR_JR | |
uint8_t RESERVED_5 [4] | |
__IO uint32_t CAAM_Type::ORSFR_JR | |
uint8_t RESERVED_6 [4] | |
__I uint32_t CAAM_Type::JRSTAR_JR | |
uint8_t RESERVED_7 [4] | |
__IO uint32_t CAAM_Type::JRINTR_JR | |
__IO uint32_t CAAM_Type::JRCFGR_JR_MS | |
__IO uint32_t CAAM_Type::JRCFGR_JR_LS | |
uint8_t RESERVED_8 [4] | |
__IO uint32_t CAAM_Type::IRRIR_JR | |
uint8_t RESERVED_9 [4] | |
__IO uint32_t CAAM_Type::ORWIR_JR | |
uint8_t RESERVED_10 [4] | |
__O uint32_t CAAM_Type::JRCR_JR | |
uint8_t RESERVED_11 [1684] | |
__I uint32_t CAAM_Type::JRAAV | |
uint8_t RESERVED_12 [248] | |
__I uint64_t CAAM_Type::JRAAA [4] | |
uint8_t RESERVED_13 [480] | |
struct { | |
__I uint32_t CAAM_Type::PX_SDID_JR | |
__IO uint32_t CAAM_Type::PX_SMAPR_JR | |
__IO uint32_t CAAM_Type::PX_SMAG2_JR | |
__IO uint32_t CAAM_Type::PX_SMAG1_JR | |
} PX_JR [16] | |
uint8_t RESERVED_14 [228] | |
__O uint32_t CAAM_Type::SMCR_JR | |
uint8_t RESERVED_15 [4] | |
__I uint32_t CAAM_Type::SMCSR_JR | |
uint8_t RESERVED_16 [528] | |
__I uint32_t CAAM_Type::REIR0JR | |
uint8_t RESERVED_17 [4] | |
__I uint64_t CAAM_Type::REIR2JR | |
__I uint32_t CAAM_Type::REIR4JR | |
__I uint32_t CAAM_Type::REIR5JR | |
uint8_t RESERVED_18 [392] | |
__I uint32_t CAAM_Type::CRNR_MS_JR | |
__I uint32_t CAAM_Type::CRNR_LS_JR | |
__I uint32_t CAAM_Type::CTPR_MS_JR | |
__I uint32_t CAAM_Type::CTPR_LS_JR | |
uint8_t RESERVED_19 [4] | |
__I uint32_t CAAM_Type::SMSTA_JR | |
uint8_t RESERVED_20 [4] | |
__I uint32_t CAAM_Type::SMPO_JR | |
__I uint64_t CAAM_Type::FAR_JR | |
__I uint32_t CAAM_Type::FADID_JR | |
__I uint32_t CAAM_Type::FADR_JR | |
uint8_t RESERVED_21 [4] | |
__I uint32_t CAAM_Type::CSTA_JR | |
__I uint32_t CAAM_Type::SMVID_MS_JR | |
__I uint32_t CAAM_Type::SMVID_LS_JR | |
__I uint32_t CAAM_Type::RVID_JR | |
__I uint32_t CAAM_Type::CCBVID_JR | |
__I uint32_t CAAM_Type::CHAVID_MS_JR | |
__I uint32_t CAAM_Type::CHAVID_LS_JR | |
__I uint32_t CAAM_Type::CHANUM_MS_JR | |
__I uint32_t CAAM_Type::CHANUM_LS_JR | |
__I uint32_t CAAM_Type::CAAMVID_MS_JR | |
__I uint32_t CAAM_Type::CAAMVID_LS_JR | |
uint8_t RESERVED_22 [61440] | |
} | JOBRING [4] |
uint8_t | RESERVED_38 [65540] |
__I uint32_t | RSTA |
uint8_t | RESERVED_39 [4] |
__IO uint32_t | RCMD |
uint8_t | RESERVED_40 [4] |
__IO uint32_t | RCTL |
uint8_t | RESERVED_41 [4] |
__IO uint32_t | RTHR |
uint8_t | RESERVED_42 [8] |
__IO uint64_t | RWDOG |
uint8_t | RESERVED_43 [4] |
__IO uint32_t | REND |
uint8_t | RESERVED_44 [200] |
struct { | |
__IO uint64_t CAAM_Type::RMA | |
uint8_t RESERVED_0 [4] | |
__IO uint32_t CAAM_Type::RML | |
} | RM [4][2] |
uint8_t | RESERVED_45 [128] |
__IO uint32_t | RMD [4][2][32] |
uint8_t | RESERVED_46 [2048] |
__I uint32_t | REIR0RTIC |
uint8_t | RESERVED_47 [4] |
__I uint64_t | REIR2RTIC |
__I uint32_t | REIR4RTIC |
__I uint32_t | REIR5RTIC |
uint8_t | RESERVED_48 [392] |
__I uint32_t | CRNR_MS_RTIC |
__I uint32_t | CRNR_LS_RTIC |
__I uint32_t | CTPR_MS_RTIC |
__I uint32_t | CTPR_LS_RTIC |
uint8_t | RESERVED_49 [4] |
__I uint32_t | SMSTA_RTIC |
uint8_t | RESERVED_50 [8] |
__I uint64_t | FAR_RTIC |
__I uint32_t | FADID_RTIC |
__I uint32_t | FADR_RTIC |
uint8_t | RESERVED_51 [4] |
__I uint32_t | CSTA_RTIC |
__I uint32_t | SMVID_MS_RTIC |
__I uint32_t | SMVID_LS_RTIC |
__I uint32_t | RVID_RTIC |
__I uint32_t | CCBVID_RTIC |
__I uint32_t | CHAVID_MS_RTIC |
__I uint32_t | CHAVID_LS_RTIC |
__I uint32_t | CHANUM_MS_RTIC |
__I uint32_t | CHANUM_LS_RTIC |
__I uint32_t | CAAMVID_MS_RTIC |
__I uint32_t | CAAMVID_LS_RTIC |
uint8_t | RESERVED_52 [126976] |
struct { | |
uint8_t RESERVED_0 [4] | |
union { | |
__IO uint32_t CAAM_Type::CC1MR | |
__IO uint32_t CAAM_Type::CC1MR_PK | |
__IO uint32_t CAAM_Type::CC1MR_RNG | |
} | |
uint8_t RESERVED_1 [4] | |
__IO uint32_t CAAM_Type::CC1KSR | |
__IO uint64_t CAAM_Type::CC1DSR | |
uint8_t RESERVED_2 [4] | |
__IO uint32_t CAAM_Type::CC1ICVSR | |
uint8_t RESERVED_3 [20] | |
__O uint32_t CAAM_Type::CCCTRL | |
uint8_t RESERVED_4 [4] | |
__IO uint32_t CAAM_Type::CICTL | |
uint8_t RESERVED_5 [4] | |
__O uint32_t CAAM_Type::CCWR | |
__I uint32_t CAAM_Type::CCSTA_MS | |
__I uint32_t CAAM_Type::CCSTA_LS | |
uint8_t RESERVED_6 [12] | |
__IO uint32_t CAAM_Type::CC1AADSZR | |
uint8_t RESERVED_7 [4] | |
__IO uint32_t CAAM_Type::CC1IVSZR | |
uint8_t RESERVED_8 [28] | |
__IO uint32_t CAAM_Type::CPKASZR | |
uint8_t RESERVED_9 [4] | |
__IO uint32_t CAAM_Type::CPKBSZR | |
uint8_t RESERVED_10 [4] | |
__IO uint32_t CAAM_Type::CPKNSZR | |
uint8_t RESERVED_11 [4] | |
__IO uint32_t CAAM_Type::CPKESZR | |
uint8_t RESERVED_12 [96] | |
__IO uint32_t CAAM_Type::CC1CTXR [16] | |
uint8_t RESERVED_13 [192] | |
__IO uint32_t CAAM_Type::CC1KR [8] | |
uint8_t RESERVED_14 [484] | |
__IO uint32_t CAAM_Type::CC2MR | |
uint8_t RESERVED_15 [4] | |
__IO uint32_t CAAM_Type::CC2KSR | |
__IO uint64_t CAAM_Type::CC2DSR | |
uint8_t RESERVED_16 [4] | |
__IO uint32_t CAAM_Type::CC2ICVSZR | |
uint8_t RESERVED_17 [224] | |
__IO uint32_t CAAM_Type::CC2CTXR [18] | |
uint8_t RESERVED_18 [184] | |
__IO uint32_t CAAM_Type::CC2KEYR [32] | |
uint8_t RESERVED_19 [320] | |
__I uint32_t CAAM_Type::CFIFOSTA | |
uint8_t RESERVED_20 [12] | |
union { | |
__O uint32_t CAAM_Type::CNFIFO | |
__O uint32_t CAAM_Type::CNFIFO_2 | |
} | |
uint8_t RESERVED_21 [12] | |
__O uint32_t CAAM_Type::CIFIFO | |
uint8_t RESERVED_22 [12] | |
__I uint64_t CAAM_Type::COFIFO | |
uint8_t RESERVED_23 [8] | |
__IO uint32_t CAAM_Type::DJQCR_MS | |
__I uint32_t CAAM_Type::DJQCR_LS | |
__I uint64_t CAAM_Type::DDAR | |
__I uint32_t CAAM_Type::DOPSTA_MS | |
__I uint32_t CAAM_Type::DOPSTA_LS | |
uint8_t RESERVED_24 [8] | |
__I uint32_t CAAM_Type::DPDIDSR | |
__I uint32_t CAAM_Type::DODIDSR | |
uint8_t RESERVED_25 [24] | |
struct { | |
__IO uint32_t CAAM_Type::DMTH_MS | |
__IO uint32_t CAAM_Type::DMTH_LS | |
} DDMTHB [4] | |
uint8_t RESERVED_26 [32] | |
struct { | |
__IO uint32_t CAAM_Type::DGTR_0 | |
__IO uint32_t CAAM_Type::DGTR_1 | |
__IO uint32_t CAAM_Type::DGTR_2 | |
__IO uint32_t CAAM_Type::DGTR_3 | |
} DDGTR [1] | |
uint8_t RESERVED_27 [112] | |
struct { | |
__IO uint32_t CAAM_Type::DSTR_0 | |
__IO uint32_t CAAM_Type::DSTR_1 | |
__IO uint32_t CAAM_Type::DSTR_2 | |
__IO uint32_t CAAM_Type::DSTR_3 | |
} DDSTR [1] | |
uint8_t RESERVED_28 [240] | |
__IO uint32_t CAAM_Type::DDESB [64] | |
uint8_t RESERVED_29 [768] | |
__I uint32_t CAAM_Type::DDJR | |
__I uint32_t CAAM_Type::DDDR | |
__I uint64_t CAAM_Type::DDJP | |
__I uint64_t CAAM_Type::DSDP | |
__I uint32_t CAAM_Type::DDDR_MS | |
__I uint32_t CAAM_Type::DDDR_LS | |
__IO uint32_t CAAM_Type::SOL | |
__IO uint32_t CAAM_Type::VSOL | |
__IO uint32_t CAAM_Type::SIL | |
__IO uint32_t CAAM_Type::VSIL | |
__IO uint32_t CAAM_Type::DPOVRD | |
__IO uint32_t CAAM_Type::UVSOL | |
__IO uint32_t CAAM_Type::UVSIL | |
} | DC [1] |
uint8_t | RESERVED_53 [356] |
__I uint32_t | CRNR_MS_DC01 |
__I uint32_t | CRNR_LS_DC01 |
__I uint32_t | CTPR_MS_DC01 |
__I uint32_t | CTPR_LS_DC01 |
uint8_t | RESERVED_54 [4] |
__I uint32_t | SMSTA_DC01 |
uint8_t | RESERVED_55 [8] |
__I uint64_t | FAR_DC01 |
__I uint32_t | FADID_DC01 |
__I uint32_t | FADR_DC01 |
uint8_t | RESERVED_56 [4] |
__I uint32_t | CSTA_DC01 |
__I uint32_t | SMVID_MS_DC01 |
__I uint32_t | SMVID_LS_DC01 |
__I uint32_t | RVID_DC01 |
__I uint32_t | CCBVID_DC01 |
__I uint32_t | CHAVID_MS_DC01 |
__I uint32_t | CHAVID_LS_DC01 |
__I uint32_t | CHANUM_MS_DC01 |
__I uint32_t | CHANUM_LS_DC01 |
__I uint32_t | CAAMVID_MS_DC01 |
__I uint32_t | CAAMVID_LS_DC01 |
struct { | |
__IO uint32_t CAAM_Type::JRDID_MS | |
__IO uint32_t CAAM_Type::JRDID_LS | |
} | JRADID [4] |
struct { | |
__IO uint32_t CAAM_Type::RTIC_DID | |
uint8_t RESERVED_0 [4] | |
} | RTICADID [4] |
struct { | |
__IO uint32_t CAAM_Type::DECODID_MS | |
__IO uint32_t CAAM_Type::DECODID_LS | |
} | DECONDID [1] |
struct { | |
__IO uint32_t CAAM_Type::JRSMVBAR | |
uint8_t RESERVED_0 [4] | |
} | JRNSMVBAR [4] |
struct { | |
__I uint32_t CAAM_Type::DMA_AIDL_MAP_MS | |
__I uint32_t CAAM_Type::DMA_AIDL_MAP_LS | |
__I uint32_t CAAM_Type::DMA_AIDM_MAP_MS | |
__I uint32_t CAAM_Type::DMA_AIDM_MAP_LS | |
} | AID_CNTS [1] |
union { | |
__IO uint32_t CAAM_Type::RTPKRMAX | |
__I uint32_t CAAM_Type::RTPKRSQ | |
}; | |
union { | |
__IO uint32_t CAAM_Type::RTSBLIM | |
__I uint32_t CAAM_Type::RTTOTSAM | |
}; | |
union { | |
struct { | |
__I uint32_t CAAM_Type::RTFRQCNT | |
__I uint32_t CAAM_Type::RTSCMC | |
__I uint32_t CAAM_Type::RTSCR1C | |
__I uint32_t CAAM_Type::RTSCR2C | |
__I uint32_t CAAM_Type::RTSCR3C | |
__I uint32_t CAAM_Type::RTSCR4C | |
__I uint32_t CAAM_Type::RTSCR5C | |
__I uint32_t CAAM_Type::RTSCR6PC | |
} COUNT | |
struct { | |
__IO uint32_t CAAM_Type::RTFRQMAX | |
__IO uint32_t CAAM_Type::RTSCML | |
__IO uint32_t CAAM_Type::RTSCR1L | |
__IO uint32_t CAAM_Type::RTSCR2L | |
__IO uint32_t CAAM_Type::RTSCR3L | |
__IO uint32_t CAAM_Type::RTSCR4L | |
__IO uint32_t CAAM_Type::RTSCR5L | |
__IO uint32_t CAAM_Type::RTSCR6PL | |
} LIMIT | |
}; | |
struct { | |
__I uint32_t CAAM_Type::PX_SDID_PG0 | |
__IO uint32_t CAAM_Type::PX_SMAPR_PG0 | |
__IO uint32_t CAAM_Type::PX_SMAG2_PG0 | |
__IO uint32_t CAAM_Type::PX_SMAG1_PG0 | |
} | PX_PG0 [16] |
struct { | |
__I uint64_t CAAM_Type::HT_JD_ADDR | |
__I uint64_t CAAM_Type::HT_SD_ADDR | |
__I uint32_t CAAM_Type::HT_JQ_CTRL_MS | |
__I uint32_t CAAM_Type::HT_JQ_CTRL_LS | |
uint8_t RESERVED_0 [4] | |
__I uint32_t CAAM_Type::HT_STATUS | |
} | HTA [1] |
struct { | |
__IO uint64_t CAAM_Type::IRBAR_JR | |
uint8_t RESERVED_0 [4] | |
__IO uint32_t CAAM_Type::IRSR_JR | |
uint8_t RESERVED_1 [4] | |
__IO uint32_t CAAM_Type::IRSAR_JR | |
uint8_t RESERVED_2 [4] | |
__IO uint32_t CAAM_Type::IRJAR_JR | |
__IO uint64_t CAAM_Type::ORBAR_JR | |
uint8_t RESERVED_3 [4] | |
__IO uint32_t CAAM_Type::ORSR_JR | |
uint8_t RESERVED_4 [4] | |
__IO uint32_t CAAM_Type::ORJRR_JR | |
uint8_t RESERVED_5 [4] | |
__IO uint32_t CAAM_Type::ORSFR_JR | |
uint8_t RESERVED_6 [4] | |
__I uint32_t CAAM_Type::JRSTAR_JR | |
uint8_t RESERVED_7 [4] | |
__IO uint32_t CAAM_Type::JRINTR_JR | |
__IO uint32_t CAAM_Type::JRCFGR_JR_MS | |
__IO uint32_t CAAM_Type::JRCFGR_JR_LS | |
uint8_t RESERVED_8 [4] | |
__IO uint32_t CAAM_Type::IRRIR_JR | |
uint8_t RESERVED_9 [4] | |
__IO uint32_t CAAM_Type::ORWIR_JR | |
uint8_t RESERVED_10 [4] | |
__O uint32_t CAAM_Type::JRCR_JR | |
uint8_t RESERVED_11 [1684] | |
__I uint32_t CAAM_Type::JRAAV | |
uint8_t RESERVED_12 [248] | |
__I uint64_t CAAM_Type::JRAAA [4] | |
uint8_t RESERVED_13 [480] | |
struct { | |
__I uint32_t CAAM_Type::PX_SDID_JR | |
__IO uint32_t CAAM_Type::PX_SMAPR_JR | |
__IO uint32_t CAAM_Type::PX_SMAG2_JR | |
__IO uint32_t CAAM_Type::PX_SMAG1_JR | |
} PX_JR [16] | |
uint8_t RESERVED_14 [228] | |
__O uint32_t CAAM_Type::SMCR_JR | |
uint8_t RESERVED_15 [4] | |
__I uint32_t CAAM_Type::SMCSR_JR | |
uint8_t RESERVED_16 [528] | |
__I uint32_t CAAM_Type::REIR0JR | |
uint8_t RESERVED_17 [4] | |
__I uint64_t CAAM_Type::REIR2JR | |
__I uint32_t CAAM_Type::REIR4JR | |
__I uint32_t CAAM_Type::REIR5JR | |
uint8_t RESERVED_18 [392] | |
__I uint32_t CAAM_Type::CRNR_MS_JR | |
__I uint32_t CAAM_Type::CRNR_LS_JR | |
__I uint32_t CAAM_Type::CTPR_MS_JR | |
__I uint32_t CAAM_Type::CTPR_LS_JR | |
uint8_t RESERVED_19 [4] | |
__I uint32_t CAAM_Type::SMSTA_JR | |
uint8_t RESERVED_20 [4] | |
__I uint32_t CAAM_Type::SMPO_JR | |
__I uint64_t CAAM_Type::FAR_JR | |
__I uint32_t CAAM_Type::FADID_JR | |
__I uint32_t CAAM_Type::FADR_JR | |
uint8_t RESERVED_21 [4] | |
__I uint32_t CAAM_Type::CSTA_JR | |
__I uint32_t CAAM_Type::SMVID_MS_JR | |
__I uint32_t CAAM_Type::SMVID_LS_JR | |
__I uint32_t CAAM_Type::RVID_JR | |
__I uint32_t CAAM_Type::CCBVID_JR | |
__I uint32_t CAAM_Type::CHAVID_MS_JR | |
__I uint32_t CAAM_Type::CHAVID_LS_JR | |
__I uint32_t CAAM_Type::CHANUM_MS_JR | |
__I uint32_t CAAM_Type::CHANUM_LS_JR | |
__I uint32_t CAAM_Type::CAAMVID_MS_JR | |
__I uint32_t CAAM_Type::CAAMVID_LS_JR | |
uint8_t RESERVED_22 [61440] | |
} | JOBRING [4] |
struct { | |
__IO uint64_t CAAM_Type::RMA | |
uint8_t RESERVED_0 [4] | |
__IO uint32_t CAAM_Type::RML | |
} | RM [4][2] |
struct { | |
uint8_t RESERVED_0 [4] | |
union { | |
__IO uint32_t CAAM_Type::CC1MR | |
__IO uint32_t CAAM_Type::CC1MR_PK | |
__IO uint32_t CAAM_Type::CC1MR_RNG | |
} | |
uint8_t RESERVED_1 [4] | |
__IO uint32_t CAAM_Type::CC1KSR | |
__IO uint64_t CAAM_Type::CC1DSR | |
uint8_t RESERVED_2 [4] | |
__IO uint32_t CAAM_Type::CC1ICVSR | |
uint8_t RESERVED_3 [20] | |
__O uint32_t CAAM_Type::CCCTRL | |
uint8_t RESERVED_4 [4] | |
__IO uint32_t CAAM_Type::CICTL | |
uint8_t RESERVED_5 [4] | |
__O uint32_t CAAM_Type::CCWR | |
__I uint32_t CAAM_Type::CCSTA_MS | |
__I uint32_t CAAM_Type::CCSTA_LS | |
uint8_t RESERVED_6 [12] | |
__IO uint32_t CAAM_Type::CC1AADSZR | |
uint8_t RESERVED_7 [4] | |
__IO uint32_t CAAM_Type::CC1IVSZR | |
uint8_t RESERVED_8 [28] | |
__IO uint32_t CAAM_Type::CPKASZR | |
uint8_t RESERVED_9 [4] | |
__IO uint32_t CAAM_Type::CPKBSZR | |
uint8_t RESERVED_10 [4] | |
__IO uint32_t CAAM_Type::CPKNSZR | |
uint8_t RESERVED_11 [4] | |
__IO uint32_t CAAM_Type::CPKESZR | |
uint8_t RESERVED_12 [96] | |
__IO uint32_t CAAM_Type::CC1CTXR [16] | |
uint8_t RESERVED_13 [192] | |
__IO uint32_t CAAM_Type::CC1KR [8] | |
uint8_t RESERVED_14 [484] | |
__IO uint32_t CAAM_Type::CC2MR | |
uint8_t RESERVED_15 [4] | |
__IO uint32_t CAAM_Type::CC2KSR | |
__IO uint64_t CAAM_Type::CC2DSR | |
uint8_t RESERVED_16 [4] | |
__IO uint32_t CAAM_Type::CC2ICVSZR | |
uint8_t RESERVED_17 [224] | |
__IO uint32_t CAAM_Type::CC2CTXR [18] | |
uint8_t RESERVED_18 [184] | |
__IO uint32_t CAAM_Type::CC2KEYR [32] | |
uint8_t RESERVED_19 [320] | |
__I uint32_t CAAM_Type::CFIFOSTA | |
uint8_t RESERVED_20 [12] | |
union { | |
__O uint32_t CAAM_Type::CNFIFO | |
__O uint32_t CAAM_Type::CNFIFO_2 | |
} | |
uint8_t RESERVED_21 [12] | |
__O uint32_t CAAM_Type::CIFIFO | |
uint8_t RESERVED_22 [12] | |
__I uint64_t CAAM_Type::COFIFO | |
uint8_t RESERVED_23 [8] | |
__IO uint32_t CAAM_Type::DJQCR_MS | |
__I uint32_t CAAM_Type::DJQCR_LS | |
__I uint64_t CAAM_Type::DDAR | |
__I uint32_t CAAM_Type::DOPSTA_MS | |
__I uint32_t CAAM_Type::DOPSTA_LS | |
uint8_t RESERVED_24 [8] | |
__I uint32_t CAAM_Type::DPDIDSR | |
__I uint32_t CAAM_Type::DODIDSR | |
uint8_t RESERVED_25 [24] | |
struct { | |
__IO uint32_t CAAM_Type::DMTH_MS | |
__IO uint32_t CAAM_Type::DMTH_LS | |
} DDMTHB [4] | |
uint8_t RESERVED_26 [32] | |
struct { | |
__IO uint32_t CAAM_Type::DGTR_0 | |
__IO uint32_t CAAM_Type::DGTR_1 | |
__IO uint32_t CAAM_Type::DGTR_2 | |
__IO uint32_t CAAM_Type::DGTR_3 | |
} DDGTR [1] | |
uint8_t RESERVED_27 [112] | |
struct { | |
__IO uint32_t CAAM_Type::DSTR_0 | |
__IO uint32_t CAAM_Type::DSTR_1 | |
__IO uint32_t CAAM_Type::DSTR_2 | |
__IO uint32_t CAAM_Type::DSTR_3 | |
} DDSTR [1] | |
uint8_t RESERVED_28 [240] | |
__IO uint32_t CAAM_Type::DDESB [64] | |
uint8_t RESERVED_29 [768] | |
__I uint32_t CAAM_Type::DDJR | |
__I uint32_t CAAM_Type::DDDR | |
__I uint64_t CAAM_Type::DDJP | |
__I uint64_t CAAM_Type::DSDP | |
__I uint32_t CAAM_Type::DDDR_MS | |
__I uint32_t CAAM_Type::DDDR_LS | |
__IO uint32_t CAAM_Type::SOL | |
__IO uint32_t CAAM_Type::VSOL | |
__IO uint32_t CAAM_Type::SIL | |
__IO uint32_t CAAM_Type::VSIL | |
__IO uint32_t CAAM_Type::DPOVRD | |
__IO uint32_t CAAM_Type::UVSOL | |
__IO uint32_t CAAM_Type::UVSIL | |
} | DC [1] |
CAAM - Register Layout Typedef