RTEMS
6.1-rc7
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bsps
powerpc
qoriq
include
bsp
VMEConfig.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* Copyright (C) 2023 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef RTEMS_BSP_VME_CONFIG_H
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#define RTEMS_BSP_VME_CONFIG_H
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#ifdef __cplusplus
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extern
"C"
{
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#endif
/* __cplusplus */
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#define _VME_DRIVER_TSI148
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/*
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* Base address of the PCI that is used for the VME bridge. Value is set in
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* libbsd during device discovery.
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*/
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extern
uintptr_t bsp_vme_pcie_base_address;
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#define PCI_MEM_BASE 0
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#define PCI_DRAM_OFFSET 0
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/*
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* NOTE: shared vmeconfig.c uses hardcoded window lengths that match this layout
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*
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* The memory length of the PCIe controllers on the P2020 processor is
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* 0x20000000. The Tsi148 registers are mapped at the bsp_vme_pcie_base_address
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* with a size of 0x1000. Therefore the VME windows are arranged a bit different
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* then on other BSPs.
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*/
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#define _VME_A32_WIN0_ON_PCI (bsp_vme_pcie_base_address + 0x10000000)
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#define _VME_A24_ON_PCI (bsp_vme_pcie_base_address + 0x03000000)
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#define _VME_A16_ON_PCI (bsp_vme_pcie_base_address + 0x02000000)
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#define _VME_CSR_ON_PCI (bsp_vme_pcie_base_address + 0x01000000)
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/* FIXME: Make this a BSP config option */
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#define _VME_A32_WIN0_ON_VME 0x20000000
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/*
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* FIXME: The fixed QORIQ_IRQ_EXT_0 is valid for the MVME2500 board. In theory
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* there should be some possibility to get that information from the device tree
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* or from PCI config space. But I didn't find it anywhere.
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*/
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#define BSP_VME_INSTALL_IRQ_MGR(err) \
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do { \
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err = qoriq_pic_set_sense_and_polarity(\
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QORIQ_IRQ_EXT_0, \
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QORIQ_EIRQ_TRIGGER_LEVEL_LOW, \
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NULL \
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); \
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if (err == 0) { \
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err = vmeTsi148InstallIrqMgrAlt(0, 0, QORIQ_IRQ_EXT_0, -1); \
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} \
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} while (0)
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/* Add prototypes that are in all VMEConfig.h files */
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extern
int
BSP_VMEInit(
void
);
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extern
int
BSP_VMEIrqMgrInstall(
void
);
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extern
unsigned
short (*_BSP_clear_vmebridge_errors)(int);
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#ifdef __cplusplus
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}
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#endif
/* __cplusplus */
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#endif
/* RTEMS_BSP_VME_CONFIG_H */
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