RTEMS 6.1-rc7
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bsp.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/* bsp.h
12 *
13 * This include file contains all board IO definitions.
14 *
15 * XXX : put yours in here
16 *
17 * COPYRIGHT (c) 1989-1999.
18 * On-Line Applications Research Corporation (OAR).
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 * 1. Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * 2. Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
33 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
36 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
37 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 * POSSIBILITY OF SUCH DAMAGE.
40 */
41
42#ifndef LIBBSP_NIOS2_NIOS2_ISS_BSP_H
43#define LIBBSP_NIOS2_NIOS2_ISS_BSP_H
44
55#include <stdint.h>
56#include <bspopts.h>
58
59#include <rtems.h>
60
61#ifdef __cplusplus
62extern "C" {
63#endif
64
65/* ============================================ */
66
67/* SOPC-specific Constants */
68
69#define SYSTEM_BUS_WIDTH 32
70
71#define JTAG_UART_BASE 0x08000000
72#define JTAG_UART_IRQ 2
73
74#define CLOCK_BASE 0x08001000
75#define CLOCK_FREQ 50000000
76#define CLOCK_VECTOR 1
77
78#define TIMER_BASE 0x08002000
79#define TIMER_FREQ 50000000
80#define TIMER_VECTOR 3
81
82/* ============================================ */
83
84#define NIOS2_BYPASS_CACHE ((uint32_t)0x80000000ul)
85#define NIOS2_IO_BASE(x) ( (void*) ((uint32_t)x | NIOS2_BYPASS_CACHE ) )
86#define NIOS2_IENABLE(x) do{ __builtin_wrctl(3,__builtin_rdctl(3)|x);}while(0)
87#define NIOS2_IRQ_ENABLE(x) do {__builtin_wrctl(3,__builtin_rdctl(3)|x);} while(0)
88
89/* ============================================ */
90/* TODO: Put this in an external header file */
91
92#ifndef SYSTEM_BUS_WIDTH
93#error SYSTEM_BUS_WIDTH is undefined
94#endif
95
96#if SYSTEM_BUS_WIDTH != 32
97#error Only SYSTEM_BUS_WIDTH 32 is supported
98#endif
99
100typedef struct
101{
102 volatile uint32_t status;
103 volatile uint32_t control;
104 volatile uint32_t period_lo;
105 volatile uint32_t period_hi;
106 volatile uint32_t snap_lo;
107 volatile uint32_t snap_hi;
108}
110
111#define ALTERA_AVALON_TIMER_STATUS_TO_MSK (0x1)
112#define ALTERA_AVALON_TIMER_STATUS_TO_OFST (0)
113#define ALTERA_AVALON_TIMER_STATUS_RUN_MSK (0x2)
114#define ALTERA_AVALON_TIMER_STATUS_RUN_OFST (1)
115
116#define ALTERA_AVALON_TIMER_CONTROL_ITO_MSK (0x1)
117#define ALTERA_AVALON_TIMER_CONTROL_ITO_OFST (0)
118#define ALTERA_AVALON_TIMER_CONTROL_CONT_MSK (0x2)
119#define ALTERA_AVALON_TIMER_CONTROL_CONT_OFST (1)
120#define ALTERA_AVALON_TIMER_CONTROL_START_MSK (0x4)
121#define ALTERA_AVALON_TIMER_CONTROL_START_OFST (2)
122#define ALTERA_AVALON_TIMER_CONTROL_STOP_MSK (0x8)
123#define ALTERA_AVALON_TIMER_CONTROL_STOP_OFST (3)
124
125typedef struct
126{
127 volatile uint32_t data;
128 volatile uint32_t control;
129}
131
132#define ALTERA_AVALON_JTAG_UART_DATA_DATA_MSK (0x000000FFu)
133#define ALTERA_AVALON_JTAG_UART_DATA_DATA_OFST (0)
134#define ALTERA_AVALON_JTAG_UART_DATA_RVALID_MSK (0x00008000u)
135#define ALTERA_AVALON_JTAG_UART_DATA_RVALID_OFST (15)
136#define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_MSK (0xFFFF0000u)
137#define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_OFST (16)
138
139#define ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK (0x00000001u)
140#define ALTERA_AVALON_JTAG_UART_CONTROL_RE_OFST (0)
141#define ALTERA_AVALON_JTAG_UART_CONTROL_WE_MSK (0x00000002u)
142#define ALTERA_AVALON_JTAG_UART_CONTROL_WE_OFST (1)
143#define ALTERA_AVALON_JTAG_UART_CONTROL_RI_MSK (0x00000100u)
144#define ALTERA_AVALON_JTAG_UART_CONTROL_RI_OFST (8)
145#define ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK (0x00000200u)
146#define ALTERA_AVALON_JTAG_UART_CONTROL_WI_OFST (9)
147#define ALTERA_AVALON_JTAG_UART_CONTROL_AC_MSK (0x00000400u)
148#define ALTERA_AVALON_JTAG_UART_CONTROL_AC_OFST (10)
149#define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK (0xFFFF0000u)
150#define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_OFST (16)
151
152/* ============================================ */
153
154/* functions */
155
156rtems_isr_entry set_vector( /* returns old vector */
157 rtems_isr_entry handler, /* isr routine */
158 rtems_vector_number vector, /* vector number */
159 int type /* RTEMS or RAW intr */
160);
161
162#ifdef __cplusplus
163}
164#endif
165
168#endif
169/* end of include file */
This header file provides the default definition of BSP_INITIAL_EXTENSION.
ISR_Handler_entry rtems_isr_entry
Interrupt service routines installed by rtems_interrupt_catch() shall have this type.
Definition: intr.h:134
ISR_Vector_number rtems_vector_number
This integer type represents interrupt vector numbers.
Definition: intr.h:102
This header file defines the RTEMS Classic API.
Definition: bsp.h:126
Definition: bsp.h:101
Definition: intercom.c:87