42#ifndef LIBBSP_NIOS2_NIOS2_ISS_BSP_H
43#define LIBBSP_NIOS2_NIOS2_ISS_BSP_H
69#define SYSTEM_BUS_WIDTH 32
71#define JTAG_UART_BASE 0x08000000
72#define JTAG_UART_IRQ 2
74#define CLOCK_BASE 0x08001000
75#define CLOCK_FREQ 50000000
78#define TIMER_BASE 0x08002000
79#define TIMER_FREQ 50000000
84#define NIOS2_BYPASS_CACHE ((uint32_t)0x80000000ul)
85#define NIOS2_IO_BASE(x) ( (void*) ((uint32_t)x | NIOS2_BYPASS_CACHE ) )
86#define NIOS2_IENABLE(x) do{ __builtin_wrctl(3,__builtin_rdctl(3)|x);}while(0)
87#define NIOS2_IRQ_ENABLE(x) do {__builtin_wrctl(3,__builtin_rdctl(3)|x);} while(0)
92#ifndef SYSTEM_BUS_WIDTH
93#error SYSTEM_BUS_WIDTH is undefined
96#if SYSTEM_BUS_WIDTH != 32
97#error Only SYSTEM_BUS_WIDTH 32 is supported
102 volatile uint32_t status;
104 volatile uint32_t period_lo;
105 volatile uint32_t period_hi;
106 volatile uint32_t snap_lo;
107 volatile uint32_t snap_hi;
111#define ALTERA_AVALON_TIMER_STATUS_TO_MSK (0x1)
112#define ALTERA_AVALON_TIMER_STATUS_TO_OFST (0)
113#define ALTERA_AVALON_TIMER_STATUS_RUN_MSK (0x2)
114#define ALTERA_AVALON_TIMER_STATUS_RUN_OFST (1)
116#define ALTERA_AVALON_TIMER_CONTROL_ITO_MSK (0x1)
117#define ALTERA_AVALON_TIMER_CONTROL_ITO_OFST (0)
118#define ALTERA_AVALON_TIMER_CONTROL_CONT_MSK (0x2)
119#define ALTERA_AVALON_TIMER_CONTROL_CONT_OFST (1)
120#define ALTERA_AVALON_TIMER_CONTROL_START_MSK (0x4)
121#define ALTERA_AVALON_TIMER_CONTROL_START_OFST (2)
122#define ALTERA_AVALON_TIMER_CONTROL_STOP_MSK (0x8)
123#define ALTERA_AVALON_TIMER_CONTROL_STOP_OFST (3)
127 volatile uint32_t data;
132#define ALTERA_AVALON_JTAG_UART_DATA_DATA_MSK (0x000000FFu)
133#define ALTERA_AVALON_JTAG_UART_DATA_DATA_OFST (0)
134#define ALTERA_AVALON_JTAG_UART_DATA_RVALID_MSK (0x00008000u)
135#define ALTERA_AVALON_JTAG_UART_DATA_RVALID_OFST (15)
136#define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_MSK (0xFFFF0000u)
137#define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_OFST (16)
139#define ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK (0x00000001u)
140#define ALTERA_AVALON_JTAG_UART_CONTROL_RE_OFST (0)
141#define ALTERA_AVALON_JTAG_UART_CONTROL_WE_MSK (0x00000002u)
142#define ALTERA_AVALON_JTAG_UART_CONTROL_WE_OFST (1)
143#define ALTERA_AVALON_JTAG_UART_CONTROL_RI_MSK (0x00000100u)
144#define ALTERA_AVALON_JTAG_UART_CONTROL_RI_OFST (8)
145#define ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK (0x00000200u)
146#define ALTERA_AVALON_JTAG_UART_CONTROL_WI_OFST (9)
147#define ALTERA_AVALON_JTAG_UART_CONTROL_AC_MSK (0x00000400u)
148#define ALTERA_AVALON_JTAG_UART_CONTROL_AC_OFST (10)
149#define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK (0xFFFF0000u)
150#define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_OFST (16)
This header file provides the default definition of BSP_INITIAL_EXTENSION.
ISR_Handler_entry rtems_isr_entry
Interrupt service routines installed by rtems_interrupt_catch() shall have this type.
Definition: intr.h:134
ISR_Vector_number rtems_vector_number
This integer type represents interrupt vector numbers.
Definition: intr.h:102
This header file defines the RTEMS Classic API.
Definition: intercom.c:87