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RTEMS 6.1-rc7
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Modules | |
PGMC_CPC Register Masks | |
Data Structures | |
struct | PGMC_CPC_Type |
Macros | |
#define | PGMC_CPC0_BASE (0x40C89000u) |
#define | PGMC_CPC0 ((PGMC_CPC_Type *)PGMC_CPC0_BASE) |
#define | PGMC_CPC1_BASE (0x40C89400u) |
#define | PGMC_CPC1 ((PGMC_CPC_Type *)PGMC_CPC1_BASE) |
#define | PGMC_CPC_BASE_ADDRS { PGMC_CPC0_BASE, PGMC_CPC1_BASE } |
#define | PGMC_CPC_BASE_PTRS { PGMC_CPC0, PGMC_CPC1 } |
#define | PGMC_CPC0_BASE (0x40C89000u) |
#define | PGMC_CPC0 ((PGMC_CPC_Type *)PGMC_CPC0_BASE) |
#define | PGMC_CPC1_BASE (0x40C89400u) |
#define | PGMC_CPC1 ((PGMC_CPC_Type *)PGMC_CPC1_BASE) |
#define | PGMC_CPC_BASE_ADDRS { PGMC_CPC0_BASE, PGMC_CPC1_BASE } |
#define | PGMC_CPC_BASE_PTRS { PGMC_CPC0, PGMC_CPC1 } |
#define PGMC_CPC0 ((PGMC_CPC_Type *)PGMC_CPC0_BASE) |
Peripheral PGMC_CPC0 base pointer
#define PGMC_CPC0 ((PGMC_CPC_Type *)PGMC_CPC0_BASE) |
Peripheral PGMC_CPC0 base pointer
#define PGMC_CPC0_BASE (0x40C89000u) |
Peripheral PGMC_CPC0 base address
#define PGMC_CPC0_BASE (0x40C89000u) |
Peripheral PGMC_CPC0 base address
#define PGMC_CPC1 ((PGMC_CPC_Type *)PGMC_CPC1_BASE) |
Peripheral PGMC_CPC1 base pointer
#define PGMC_CPC1 ((PGMC_CPC_Type *)PGMC_CPC1_BASE) |
Peripheral PGMC_CPC1 base pointer
#define PGMC_CPC1_BASE (0x40C89400u) |
Peripheral PGMC_CPC1 base address
#define PGMC_CPC1_BASE (0x40C89400u) |
Peripheral PGMC_CPC1 base address
#define PGMC_CPC_BASE_ADDRS { PGMC_CPC0_BASE, PGMC_CPC1_BASE } |
Array initializer of PGMC_CPC peripheral base addresses
#define PGMC_CPC_BASE_ADDRS { PGMC_CPC0_BASE, PGMC_CPC1_BASE } |
Array initializer of PGMC_CPC peripheral base addresses
Array initializer of PGMC_CPC peripheral base pointers