27#ifndef _RTEMS_SCORE_CPU_H
28#define _RTEMS_SCORE_CPU_H
50#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
58#define CPU_ISR_PASSES_FRAME_POINTER FALSE
76#define CPU_HARDWARE_FP TRUE
77#define CPU_SOFTWARE_FP FALSE
79#define CPU_SOFTWARE_FP FALSE
80#define CPU_HARDWARE_FP FALSE
93#define CPU_ALL_TASKS_ARE_FP TRUE
95#define CPU_ALL_TASKS_ARE_FP FALSE
111#define CPU_IDLE_TASK_IS_FP TRUE
113#define CPU_IDLE_TASK_IS_FP FALSE
143#define CPU_USE_DEFERRED_FP_SWITCH FALSE
145#define CPU_USE_DEFERRED_FP_SWITCH TRUE
148#define CPU_ENABLE_ROBUST_THREAD_DISPATCH FALSE
158#define CPU_STACK_GROWS_UP FALSE
161#define CPU_CACHE_LINE_BYTES 16
163#define CPU_STRUCTURE_ALIGNMENT RTEMS_ALIGNED( CPU_CACHE_LINE_BYTES )
171#define CPU_MODES_INTERRUPT_MASK 0x0000000f
173#define CPU_MAXIMUM_PROCESSORS 32
251#define _CPU_Context_Get_SP( _context ) \
256#ifdef SH4_USE_X_REGISTERS
290void CPU_delay( uint32_t microseconds );
299#define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp )
307#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
314#define CPU_INTERRUPT_NUMBER_OF_VECTORS 256
315#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
322#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
332#define CPU_STACK_MINIMUM_SIZE 4096
334#define CPU_SIZEOF_POINTER 4
342#define CPU_ALIGNMENT 8
344#define CPU_ALIGNMENT 4
359#define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT
361#define CPU_STACK_ALIGNMENT CPU_ALIGNMENT
363#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
374#define _CPU_ISR_Disable( _level) \
375 sh_disable_interrupts( _level )
383#define _CPU_ISR_Enable( _level) \
384 sh_enable_interrupts( _level)
393#define _CPU_ISR_Flash( _level) \
394 sh_flash_interrupts( _level)
396static inline bool _CPU_ISR_Is_enabled( uint32_t level )
398 sh_get_interrupt_level( level );
413#define _CPU_ISR_Set_level( _newlevel) \
414 sh_set_interrupt_level(_newlevel)
446void _CPU_Context_Initialize(
451 void (*_entry_point)(
void),
465#define _CPU_Context_Restart_self( _the_context ) \
466 _CPU_Context_restore( (_the_context) );
482#define _CPU_Context_Initialize_fp( _destination ) \
484 *(*(_destination)) = _CPU_Null_fp_context;\
487#define _CPU_Context_Initialize_fp( _destination ) \
493#define CPU_USE_GENERIC_BITFIELD_CODE TRUE
495#define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE
508typedef void ( *CPU_ISR_raw_handler )( void );
510extern CPU_ISR_raw_handler _Hardware_isr_Table[];
514 CPU_ISR_raw_handler new_handler,
515 CPU_ISR_raw_handler *old_handler
518typedef void ( *CPU_ISR_handler )( uint32_t );
522 CPU_ISR_handler new_handler,
523 CPU_ISR_handler *old_handler
573typedef uint32_t CPU_Counter_ticks;
584typedef void ( *sh_isr_entry )( void );
This header file provides basic definitions used by the API and the implementation.
void _CPU_ISR_install_raw_handler(uint32_t vector, CPU_ISR_raw_handler new_handler, CPU_ISR_raw_handler *old_handler)
SPARC specific raw ISR installer.
Definition: cpu.c:100
#define RTEMS_NO_RETURN
Tells the compiler in a function declaration that this function does not return.
Definition: basedefs.h:386
uint32_t _CPU_ISR_Get_level(void)
Returns the interrupt level of the executing thread.
Definition: cpu.c:166
void * _CPU_Thread_Idle_body(uintptr_t ignored)
Definition: idle-mcf5272.c:39
void _CPU_Initialize(void)
CPU initialization.
Definition: cpu.c:45
uintptr_t CPU_Uint32ptr
Definition: cpu.h:557
void _CPU_Exception_frame_print(const CPU_Exception_frame *frame)
Prints the exception frame via printk().
Definition: vectorexceptions.c:64
uint32_t _CPU_Counter_frequency(void)
Gets the current CPU counter frequency in Hz.
Definition: system-clocks.c:125
void _CPU_Context_switch(Context_Control *run, Context_Control *heir)
CPU switch context.
Definition: cpu_asm.c:110
CPU_Counter_ticks _CPU_Counter_read(void)
Gets the current CPU counter value.
Definition: system-clocks.c:130
void _CPU_ISR_install_vector(uint32_t vector, CPU_ISR_handler hdl, CPU_ISR_handler *oldHdl)
SPARC specific RTEMS ISR installer.
Definition: idt.c:106
void sh_isr
Definition: cpu.h:583
Hitachi SH CPU Department Source.
#define _CPU_Context_restore_fp(_fp_context_ptr)
Nothing to do due to the synchronous or lazy floating point switch.
Definition: cpu.h:901
#define _CPU_Context_save_fp(_fp_context_ptr)
Nothing to do due to the synchronous or lazy floating point switch.
Definition: cpu.h:895
The set of registers that specifies the complete processor state.
Definition: cpu.h:446
Interrupt stack frame (ISF).
Definition: cpuimpl.h:64
SPARC basic context.
Definition: cpu.h:213
Thread register context.
Definition: cpu.h:173