RTEMS 6.1-rc7
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VMEConfig.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
15/*
16 * Copyright (C) 2023 embedded brains GmbH & Co. KG
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions
20 * are met:
21 * 1. Redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer.
23 * 2. Redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
28 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
31 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40#ifndef RTEMS_BSP_VME_CONFIG_H
41#define RTEMS_BSP_VME_CONFIG_H
42
43#ifdef __cplusplus
44extern "C" {
45#endif /* __cplusplus */
46
47#define _VME_DRIVER_TSI148
48
49/*
50 * Base address of the PCI that is used for the VME bridge. Value is set in
51 * libbsd during device discovery.
52 */
53extern uintptr_t bsp_vme_pcie_base_address;
54
55#define PCI_MEM_BASE 0
56#define PCI_DRAM_OFFSET 0
57
58/*
59 * NOTE: shared vmeconfig.c uses hardcoded window lengths that match this layout
60 *
61 * The memory length of the PCIe controllers on the P2020 processor is
62 * 0x20000000. The Tsi148 registers are mapped at the bsp_vme_pcie_base_address
63 * with a size of 0x1000. Therefore the VME windows are arranged a bit different
64 * then on other BSPs.
65 */
66#define _VME_A32_WIN0_ON_PCI (bsp_vme_pcie_base_address + 0x10000000)
67#define _VME_A24_ON_PCI (bsp_vme_pcie_base_address + 0x03000000)
68#define _VME_A16_ON_PCI (bsp_vme_pcie_base_address + 0x02000000)
69#define _VME_CSR_ON_PCI (bsp_vme_pcie_base_address + 0x01000000)
70
71/* FIXME: Make this a BSP config option */
72#define _VME_A32_WIN0_ON_VME 0x20000000
73
74/*
75 * FIXME: The fixed QORIQ_IRQ_EXT_0 is valid for the MVME2500 board. In theory
76 * there should be some possibility to get that information from the device tree
77 * or from PCI config space. But I didn't find it anywhere.
78 */
79#define BSP_VME_INSTALL_IRQ_MGR(err) \
80 do { \
81 err = qoriq_pic_set_sense_and_polarity(\
82 QORIQ_IRQ_EXT_0, \
83 QORIQ_EIRQ_TRIGGER_LEVEL_LOW, \
84 NULL \
85 ); \
86 if (err == 0) { \
87 err = vmeTsi148InstallIrqMgrAlt(0, 0, QORIQ_IRQ_EXT_0, -1); \
88 } \
89 } while (0)
90
91/* Add prototypes that are in all VMEConfig.h files */
92extern int BSP_VMEInit(void);
93extern int BSP_VMEIrqMgrInstall(void);
94extern unsigned short (*_BSP_clear_vmebridge_errors)(int);
95
96#ifdef __cplusplus
97}
98#endif /* __cplusplus */
99
100#endif /* RTEMS_BSP_VME_CONFIG_H */