37#ifndef LIBBSP_AARCH64_XILINX_ZYNQMP_BSP_H
38#define LIBBSP_AARCH64_XILINX_ZYNQMP_BSP_H
42#define BSP_FEATURE_IRQ_EXTENSION
46#define BSP_CPU_ON_USES_SMC
78LINKER_SYMBOL(bsp_r0_ram_base)
79LINKER_SYMBOL(bsp_r0_ram_end)
80LINKER_SYMBOL(bsp_r1_ram_base)
81LINKER_SYMBOL(bsp_r1_ram_end)
83#define BSP_ARM_GIC_CPUIF_BASE 0xf9020000
84#define BSP_ARM_GIC_DIST_BASE 0xf9010000
86#define BSP_FDT_IS_SUPPORTED
87extern unsigned int zynqmp_dtb_len;
88extern unsigned char zynqmp_dtb[];
90#define NANDPSU_BASEADDR 0xFF100000
107void zynqmp_management_console_termios_init(
void);
109void zynqmp_debug_console_flush(
void);
111uint32_t zynqmp_clock_i2c0(
void);
113uint32_t zynqmp_clock_i2c1(
void);
This header file provides the default definition of BSP_INITIAL_EXTENSION.
void zynqmp_configure_management_console(struct rtems_termios_device_context *base)
Zynq UltraScale+ MPSoC specific set up of a management console.
BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache(void)
Zynq UltraScale+ MPSoC specific set up of the MMU for non-primary cores.
Definition: bspstartmmu.c:88
BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void)
Zynq UltraScale+ MPSoC specific set up of the MMU.
Definition: bspstartmmu.c:67
This header file defines the RTEMS Classic API.
Termios device context.
Definition: termiosdevice.h:68
This header file provides interfaces with respect to the Zynq UltraScale+ MPSoC and RFSoC platforms.