RTEMS 6.1-rc7
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irq.h
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 * RTEMS TQM8xx BSP
5 *
6 * This file contains the console driver.
7 *
8 * Derived from: generic MPC83xx BSP
9 */
10
11/*
12 * Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH & Co. KG
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#ifndef TQM8xx_IRQ_IRQ_H
38#define TQM8xx_IRQ_IRQ_H
39
40#include <stdbool.h>
41
42#include <rtems.h>
43#include <rtems/irq.h>
44#include <rtems/irq-extension.h>
45
46/*
47 * the following definitions specify the indices used
48 * to interface the interrupt handler API
49 */
50
51/*
52 * Peripheral IRQ handlers related definitions
53 */
54#define BSP_SIU_PER_IRQ_NUMBER 16
55#define BSP_SIU_IRQ_LOWEST_OFFSET 0
56#define BSP_SIU_IRQ_MAX_OFFSET (BSP_SIU_IRQ_LOWEST_OFFSET\
57 +BSP_SIU_PER_IRQ_NUMBER-1)
58
59#define BSP_IS_SIU_IRQ(irqnum) \
60 (((irqnum) >= BSP_SIU_IRQ_LOWEST_OFFSET) && \
61 ((irqnum) <= BSP_SIU_IRQ_MAX_OFFSET))
62
63#define BSP_CPM_PER_IRQ_NUMBER 32
64#define BSP_CPM_IRQ_LOWEST_OFFSET (BSP_SIU_IRQ_MAX_OFFSET+1)
65#define BSP_CPM_IRQ_MAX_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET\
66 +BSP_CPM_PER_IRQ_NUMBER-1)
67
68#define BSP_IS_CPM_IRQ(irqnum) \
69 (((irqnum) >= BSP_CPM_IRQ_LOWEST_OFFSET) && \
70 ((irqnum) <= BSP_CPM_IRQ_MAX_OFFSET))
71/*
72 * Processor IRQ handlers related definitions
73 */
74#define BSP_PROCESSOR_IRQ_NUMBER 1
75#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET+1)
76#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\
77 +BSP_PROCESSOR_IRQ_NUMBER-1)
78
79#define BSP_IS_PROCESSOR_IRQ(irqnum) \
80 (((irqnum) >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET) && \
81 ((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET))
82/*
83 * Summary
84 */
85#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1)
86#define BSP_LOWEST_OFFSET BSP_SIU_IRQ_LOWEST_OFFSET
87#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET
88
89#define BSP_IS_VALID_IRQ(irqnum) \
90 (BSP_IS_PROCESSOR_IRQ(irqnum) \
91 || BSP_IS_SIU_IRQ(irqnum) \
92 || BSP_IS_CPM_IRQ(irqnum))
93
94#ifndef ASM
95#ifdef __cplusplus
96extern "C" {
97#endif
98
99/*
100 * index table for the module specific handlers, a few entries are only placeholders
101 */
102 typedef enum {
103 BSP_SIU_EXT_IRQ_0 = BSP_SIU_IRQ_LOWEST_OFFSET + 0,
104 BSP_SIU_INT_IRQ_0 = BSP_SIU_IRQ_LOWEST_OFFSET + 1,
105 BSP_SIU_EXT_IRQ_1 = BSP_SIU_IRQ_LOWEST_OFFSET + 2,
106 BSP_SIU_INT_IRQ_1 = BSP_SIU_IRQ_LOWEST_OFFSET + 3,
107 BSP_SIU_EXT_IRQ_2 = BSP_SIU_IRQ_LOWEST_OFFSET + 4,
108 BSP_SIU_INT_IRQ_2 = BSP_SIU_IRQ_LOWEST_OFFSET + 5,
109 BSP_SIU_EXT_IRQ_3 = BSP_SIU_IRQ_LOWEST_OFFSET + 6,
110 BSP_SIU_INT_IRQ_3 = BSP_SIU_IRQ_LOWEST_OFFSET + 7,
111 BSP_SIU_EXT_IRQ_4 = BSP_SIU_IRQ_LOWEST_OFFSET + 8,
112 BSP_SIU_INT_IRQ_4 = BSP_SIU_IRQ_LOWEST_OFFSET + 9,
113 BSP_SIU_EXT_IRQ_5 = BSP_SIU_IRQ_LOWEST_OFFSET + 10,
114 BSP_SIU_INT_IRQ_5 = BSP_SIU_IRQ_LOWEST_OFFSET + 11,
115 BSP_SIU_EXT_IRQ_6 = BSP_SIU_IRQ_LOWEST_OFFSET + 12,
116 BSP_SIU_INT_IRQ_6 = BSP_SIU_IRQ_LOWEST_OFFSET + 13,
117 BSP_SIU_EXT_IRQ_7 = BSP_SIU_IRQ_LOWEST_OFFSET + 14,
118 BSP_SIU_INT_IRQ_7 = BSP_SIU_IRQ_LOWEST_OFFSET + 15,
119 BSP_SIU_IRQ_LAST = BSP_SIU_IRQ_MAX_OFFSET,
120 /*
121 * Some CPM IRQ symbolic name definition
122 */
123 BSP_CPM_IRQ_ERROR = (BSP_CPM_IRQ_LOWEST_OFFSET),
124 BSP_CPM_IRQ_PARALLEL_IO_PC4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 1),
125 BSP_CPM_IRQ_PARALLEL_IO_PC5 = (BSP_CPM_IRQ_LOWEST_OFFSET + 2),
126 BSP_CPM_IRQ_SMC2_OR_PIP = (BSP_CPM_IRQ_LOWEST_OFFSET + 3),
127 BSP_CPM_IRQ_SMC1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 4),
128 BSP_CPM_IRQ_SPI = (BSP_CPM_IRQ_LOWEST_OFFSET + 5),
129 BSP_CPM_IRQ_PARALLEL_IO_PC6 = (BSP_CPM_IRQ_LOWEST_OFFSET + 6),
130 BSP_CPM_IRQ_TIMER_4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 7),
131 BSP_CPM_IRQ_PARALLEL_IO_PC7 = (BSP_CPM_IRQ_LOWEST_OFFSET + 9),
132 BSP_CPM_IRQ_PARALLEL_IO_PC8 = (BSP_CPM_IRQ_LOWEST_OFFSET + 10),
133 BSP_CPM_IRQ_PARALLEL_IO_PC9 = (BSP_CPM_IRQ_LOWEST_OFFSET + 11),
134 BSP_CPM_IRQ_TIMER_3 = (BSP_CPM_IRQ_LOWEST_OFFSET + 12),
135 BSP_CPM_IRQ_PARALLEL_IO_PC10= (BSP_CPM_IRQ_LOWEST_OFFSET + 14),
136 BSP_CPM_IRQ_PARALLEL_IO_PC11= (BSP_CPM_IRQ_LOWEST_OFFSET + 15),
137 BSP_CPM_I2C = (BSP_CPM_IRQ_LOWEST_OFFSET + 16),
138 BSP_CPM_RISC_TIMER_TABLE = (BSP_CPM_IRQ_LOWEST_OFFSET + 17),
139 BSP_CPM_IRQ_TIMER_2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 18),
140 BSP_CPM_IDMA2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 20),
141 BSP_CPM_IDMA1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 21),
142 BSP_CPM_SDMA_CHANNEL_BUS_ERR= (BSP_CPM_IRQ_LOWEST_OFFSET + 22),
143 BSP_CPM_IRQ_PARALLEL_IO_PC12= (BSP_CPM_IRQ_LOWEST_OFFSET + 23),
144 BSP_CPM_IRQ_PARALLEL_IO_PC13= (BSP_CPM_IRQ_LOWEST_OFFSET + 24),
145 BSP_CPM_IRQ_TIMER_1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 25),
146 BSP_CPM_IRQ_PARALLEL_IO_PC14= (BSP_CPM_IRQ_LOWEST_OFFSET + 26),
147 BSP_CPM_IRQ_SCC4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 27),
148 BSP_CPM_IRQ_SCC3 = (BSP_CPM_IRQ_LOWEST_OFFSET + 28),
149 BSP_CPM_IRQ_SCC2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 29),
150 BSP_CPM_IRQ_SCC1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 30),
151 BSP_CPM_IRQ_PARALLEL_IO_PC15= (BSP_CPM_IRQ_LOWEST_OFFSET + 31),
152 BSP_CPM_IRQ_LAST = BSP_CPM_IRQ_MAX_OFFSET,
153 } rtems_irq_symbolic_name;
154
155 /*
156 * Symbolic name for CPM interrupt on SIU Internal level 2
157 */
158#define BSP_CPM_INTERRUPT BSP_SIU_INT_IRQ_2
159#define BSP_PERIODIC_TIMER BSP_SIU_INT_IRQ_6
160#define BSP_FAST_ETHERNET_CTRL BSP_SIU_INT_IRQ_3
161
162#define BSP_INTERRUPT_VECTOR_COUNT (BSP_MAX_OFFSET + 1)
163
164extern int BSP_irq_enabled_at_cpm(const rtems_irq_number irqLine);
165
166#ifdef __cplusplus
167}
168#endif
169#endif /* ASM */
170
171#endif /* TQM8XX_IRQ_IRQ_H */
This header file is provided for backward compatiblility.
This header file defines the RTEMS Classic API.