RTEMS 6.1-rc7
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fsl_flexio_i2c_master.h
1/*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8#ifndef _FSL_FLEXIO_I2C_MASTER_H_
9#define _FSL_FLEXIO_I2C_MASTER_H_
10
11#include "fsl_common.h"
12#include "fsl_flexio.h"
13
19/*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22
25#define FSL_FLEXIO_I2C_MASTER_DRIVER_VERSION (MAKE_VERSION(2, 5, 0))
29#ifndef I2C_RETRY_TIMES
30#define I2C_RETRY_TIMES 0U /* Define to zero means keep waiting until the flag is assert/deassert. */
31#endif
32
34enum
35{
40};
41
44{
47};
48
51{
55};
56
59{
63
65typedef struct _flexio_i2c_type
66{
68 uint8_t SDAPinIndex;
69 uint8_t SCLPinIndex;
70 uint8_t shifterIndex[2];
71 uint8_t timerIndex[3];
72 uint32_t baudrate;
74
77{
83 uint32_t baudRate_Bps;
85
88{
89 uint32_t flags;
90 uint8_t slaveAddress;
92 uint32_t subaddress;
94 uint8_t volatile *data;
95 volatile size_t dataSize;
97
100
104 status_t status,
105 void *userData);
106
109{
112 uint8_t state;
115 void *userData;
117};
118
119/*******************************************************************************
120 * API
121 ******************************************************************************/
122
123#if defined(__cplusplus)
124extern "C" {
125#endif /*_cplusplus*/
126
132#if defined(FSL_FEATURE_FLEXIO_HAS_PIN_STATUS) && FSL_FEATURE_FLEXIO_HAS_PIN_STATUS
142status_t FLEXIO_I2C_CheckForBusyBus(FLEXIO_I2C_Type *base);
143#endif /*FSL_FEATURE_FLEXIO_HAS_PIN_STATUS*/
144
173status_t FLEXIO_I2C_MasterInit(FLEXIO_I2C_Type *base, flexio_i2c_master_config_t *masterConfig, uint32_t srcClock_Hz);
174
182
195
202static inline void FLEXIO_I2C_MasterEnable(FLEXIO_I2C_Type *base, bool enable)
203{
204 if (enable)
205 {
206 base->flexioBase->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
207 }
208}
209
210/* @} */
211
225
236void FLEXIO_I2C_MasterClearStatusFlags(FLEXIO_I2C_Type *base, uint32_t mask);
237
253void FLEXIO_I2C_MasterEnableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask);
254
261void FLEXIO_I2C_MasterDisableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask);
262
277void FLEXIO_I2C_MasterSetBaudRate(FLEXIO_I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
278
294void FLEXIO_I2C_MasterStart(FLEXIO_I2C_Type *base, uint8_t address, flexio_i2c_direction_t direction);
295
302
309
316
323void FLEXIO_I2C_MasterEnableAck(FLEXIO_I2C_Type *base, bool enable);
324
337
348static inline void FLEXIO_I2C_MasterWriteByte(FLEXIO_I2C_Type *base, uint32_t data)
349{
350 base->flexioBase->SHIFTBUFBBS[base->shifterIndex[0]] = data;
351}
352
362static inline uint8_t FLEXIO_I2C_MasterReadByte(FLEXIO_I2C_Type *base)
363{
364 return (uint8_t)(base->flexioBase->SHIFTBUFBIS[base->shifterIndex[1]]);
365}
366
379status_t FLEXIO_I2C_MasterWriteBlocking(FLEXIO_I2C_Type *base, const uint8_t *txBuff, uint8_t txSize);
380
392status_t FLEXIO_I2C_MasterReadBlocking(FLEXIO_I2C_Type *base, uint8_t *rxBuff, uint8_t rxSize);
393
407/*Transactional APIs*/
408
427 void *userData);
428
446
458
469
476void FLEXIO_I2C_MasterTransferHandleIRQ(void *i2cType, void *i2cHandle);
477
480#if defined(__cplusplus)
481}
482#endif /*_cplusplus*/
485#endif /*_FSL_FLEXIO_I2C_MASTER_H_*/
uint8_t timerIndex[3]
Definition: fsl_flexio_i2c_master.h:71
uint8_t volatile * data
Definition: fsl_flexio_i2c_master.h:94
void FLEXIO_I2C_MasterEnableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask)
Enables the FlexIO i2c master interrupt requests.
Definition: fsl_flexio_i2c_master.c:875
uint8_t SDAPinIndex
Definition: fsl_flexio_i2c_master.h:68
status_t FLEXIO_I2C_MasterWriteBlocking(FLEXIO_I2C_Type *base, const uint8_t *txBuff, uint8_t txSize)
Sends a buffer of data in bytes.
Definition: fsl_flexio_i2c_master.c:1062
void FLEXIO_I2C_MasterAbortStop(FLEXIO_I2C_Type *base)
Sends the stop signal when transfer is still on-going.
Definition: fsl_flexio_i2c_master.c:1009
void FLEXIO_I2C_MasterTransferHandleIRQ(void *i2cType, void *i2cHandle)
Master interrupt handler.
Definition: fsl_flexio_i2c_master.c:1362
status_t FLEXIO_I2C_MasterTransferCreateHandle(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, flexio_i2c_master_transfer_callback_t callback, void *userData)
Initializes the I2C handle which is used in transactional functions.
Definition: fsl_flexio_i2c_master.c:1229
void FLEXIO_I2C_MasterDeinit(FLEXIO_I2C_Type *base)
De-initializes the FlexIO I2C master peripheral. Calling this API Resets the FlexIO I2C master shifer...
Definition: fsl_flexio_i2c_master.c:765
uint32_t subaddress
Definition: fsl_flexio_i2c_master.h:92
flexio_i2c_direction_t direction
Definition: fsl_flexio_i2c_master.h:91
struct _flexio_i2c_master_config flexio_i2c_master_config_t
Define FlexIO I2C master user configuration structure.
uint8_t state
Definition: fsl_flexio_i2c_master.h:112
void FLEXIO_I2C_MasterDisableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask)
Disables the FlexIO I2C master interrupt requests.
Definition: fsl_flexio_i2c_master.c:893
flexio_i2c_master_transfer_callback_t completionCallback
Definition: fsl_flexio_i2c_master.h:113
status_t FLEXIO_I2C_MasterTransferNonBlocking(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, flexio_i2c_master_transfer_t *xfer)
Performs a master interrupt non-blocking transfer on the I2C bus.
Definition: fsl_flexio_i2c_master.c:1267
flexio_i2c_master_transfer_t transfer
Definition: fsl_flexio_i2c_master.h:110
status_t FLEXIO_I2C_MasterReadBlocking(FLEXIO_I2C_Type *base, uint8_t *rxBuff, uint8_t rxSize)
Receives a buffer of bytes.
Definition: fsl_flexio_i2c_master.c:1113
uint32_t FLEXIO_I2C_MasterGetStatusFlags(FLEXIO_I2C_Type *base)
Gets the FlexIO I2C master status flags.
Definition: fsl_flexio_i2c_master.c:823
status_t FLEXIO_I2C_MasterSetTransferCount(FLEXIO_I2C_Type *base, uint16_t count)
Sets the number of bytes to be transferred from a start signal to a stop signal.
Definition: fsl_flexio_i2c_master.c:937
bool enableFastAccess
Definition: fsl_flexio_i2c_master.h:81
void FLEXIO_I2C_MasterStop(FLEXIO_I2C_Type *base)
Sends the stop signal on the bus.
Definition: fsl_flexio_i2c_master.c:997
enum _flexio_i2c_direction flexio_i2c_direction_t
Direction of master transfer.
void FLEXIO_I2C_MasterStart(FLEXIO_I2C_Type *base, uint8_t address, flexio_i2c_direction_t direction)
Sends START + 7-bit address to the bus.
Definition: fsl_flexio_i2c_master.c:972
void FLEXIO_I2C_MasterTransferAbort(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle)
Aborts an interrupt non-blocking transfer early.
Definition: fsl_flexio_i2c_master.c:1315
void * userData
Definition: fsl_flexio_i2c_master.h:115
status_t FLEXIO_I2C_MasterTransferGetCount(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, size_t *count)
Gets the master transfer status during a interrupt non-blocking transfer.
Definition: fsl_flexio_i2c_master.c:1337
status_t FLEXIO_I2C_MasterTransferBlocking(FLEXIO_I2C_Type *base, flexio_i2c_master_transfer_t *xfer)
Performs a master polling transfer on the I2C bus.
Definition: fsl_flexio_i2c_master.c:1155
bool enableInDebug
Definition: fsl_flexio_i2c_master.h:80
volatile size_t dataSize
Definition: fsl_flexio_i2c_master.h:95
void FLEXIO_I2C_MasterRepeatedStart(FLEXIO_I2C_Type *base)
Sends the repeated start signal on the bus.
Definition: fsl_flexio_i2c_master.c:986
FLEXIO_Type * flexioBase
Definition: fsl_flexio_i2c_master.h:67
uint8_t SCLPinIndex
Definition: fsl_flexio_i2c_master.h:69
bool enableMaster
Definition: fsl_flexio_i2c_master.h:78
_flexio_i2c_master_interrupt
Define FlexIO I2C master interrupt mask.
Definition: fsl_flexio_i2c_master.h:44
uint32_t flags
Definition: fsl_flexio_i2c_master.h:89
size_t transferSize
Definition: fsl_flexio_i2c_master.h:111
void FLEXIO_I2C_MasterGetDefaultConfig(flexio_i2c_master_config_t *masterConfig)
Gets the default configuration to configure the FlexIO module. The configuration can be used directly...
Definition: fsl_flexio_i2c_master.c:800
status_t FLEXIO_I2C_MasterInit(FLEXIO_I2C_Type *base, flexio_i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)
Ungates the FlexIO clock, resets the FlexIO module, and configures the FlexIO I2C hardware configurat...
Definition: fsl_flexio_i2c_master.c:630
_flexio_i2c_direction
Direction of master transfer.
Definition: fsl_flexio_i2c_master.h:59
uint32_t baudRate_Bps
Definition: fsl_flexio_i2c_master.h:83
struct _flexio_i2c_master_transfer flexio_i2c_master_transfer_t
Define FlexIO I2C master transfer structure.
void FLEXIO_I2C_MasterSetBaudRate(FLEXIO_I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)
Sets the FlexIO I2C master transfer baudrate.
Definition: fsl_flexio_i2c_master.c:912
void FLEXIO_I2C_MasterEnableAck(FLEXIO_I2C_Type *base, bool enable)
Configures the sent ACK/NAK for the following byte.
Definition: fsl_flexio_i2c_master.c:1033
void(* flexio_i2c_master_transfer_callback_t)(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, status_t status, void *userData)
FlexIO I2C master transfer callback typedef.
Definition: fsl_flexio_i2c_master.h:102
uint8_t slaveAddress
Definition: fsl_flexio_i2c_master.h:90
void FLEXIO_I2C_MasterClearStatusFlags(FLEXIO_I2C_Type *base, uint32_t mask)
Clears the FlexIO I2C master status flags.
Definition: fsl_flexio_i2c_master.c:849
uint8_t shifterIndex[2]
Definition: fsl_flexio_i2c_master.h:70
bool enableInDoze
Definition: fsl_flexio_i2c_master.h:79
uint32_t baudrate
Definition: fsl_flexio_i2c_master.h:72
uint8_t subaddressSize
Definition: fsl_flexio_i2c_master.h:93
bool needRestart
Definition: fsl_flexio_i2c_master.h:116
struct _flexio_i2c_type FLEXIO_I2C_Type
Define FlexIO I2C master access structure typedef.
_flexio_i2c_master_status_flags
Define FlexIO I2C master status mask.
Definition: fsl_flexio_i2c_master.h:51
@ kFLEXIO_I2C_RxFullInterruptEnable
Definition: fsl_flexio_i2c_master.h:46
@ kFLEXIO_I2C_TxEmptyInterruptEnable
Definition: fsl_flexio_i2c_master.h:45
@ kFLEXIO_I2C_Write
Definition: fsl_flexio_i2c_master.h:60
@ kFLEXIO_I2C_Read
Definition: fsl_flexio_i2c_master.h:61
@ kStatus_FLEXIO_I2C_Idle
Definition: fsl_flexio_i2c_master.h:37
@ kStatus_FLEXIO_I2C_Timeout
Definition: fsl_flexio_i2c_master.h:39
@ kStatus_FLEXIO_I2C_Busy
Definition: fsl_flexio_i2c_master.h:36
@ kStatus_FLEXIO_I2C_Nak
Definition: fsl_flexio_i2c_master.h:38
@ kFLEXIO_I2C_RxFullFlag
Definition: fsl_flexio_i2c_master.h:53
@ kFLEXIO_I2C_TxEmptyFlag
Definition: fsl_flexio_i2c_master.h:52
@ kFLEXIO_I2C_ReceiveNakFlag
Definition: fsl_flexio_i2c_master.h:54
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:225
#define MAKE_STATUS(group, code)
Construct a status code value from a group and code number.
Definition: fsl_common.h:47
@ kStatusGroup_FLEXIO_I2C
Definition: fsl_common.h:91
Definition: MIMXRT1052.h:20511
Define FlexIO I2C master user configuration structure.
Definition: fsl_flexio_i2c_master.h:77
Define FlexIO I2C master handle structure.
Definition: fsl_flexio_i2c_master.h:109
Define FlexIO I2C master transfer structure.
Definition: fsl_flexio_i2c_master.h:88
Define FlexIO I2C master access structure typedef.
Definition: fsl_flexio_i2c_master.h:66