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RTEMS 6.1-rc7
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DFSDM channel configuration registers. More...
#include <stm32h723xx.h>
Data Fields | |
__IO uint32_t | CHCFGR1 |
__IO uint32_t | CHCFGR2 |
__IO uint32_t | CHAWSCDR |
__IO uint32_t | CHWDATAR |
__IO uint32_t | CHDATINR |
__IO uint32_t | CHDLYR |
DFSDM channel configuration registers.
__IO uint32_t DFSDM_Channel_TypeDef::CHAWSCDR |
DFSDM channel analog watchdog and short circuit detector register, Address offset: 0x08
__IO uint32_t DFSDM_Channel_TypeDef::CHCFGR1 |
DFSDM channel configuration register1, Address offset: 0x00
__IO uint32_t DFSDM_Channel_TypeDef::CHCFGR2 |
DFSDM channel configuration register2, Address offset: 0x04
__IO uint32_t DFSDM_Channel_TypeDef::CHDATINR |
DFSDM channel data input register, Address offset: 0x10
__IO uint32_t DFSDM_Channel_TypeDef::CHDLYR |
DFSDM channel delay register, Address offset: 0x14
__IO uint32_t DFSDM_Channel_TypeDef::CHWDATAR |
DFSDM channel watchdog filter data register, Address offset: 0x0C