RTEMS 6.1-rc7
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fsl_romapi.h
1/*
2 * Copyright 2017-2021 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _FSL_ROMAPI_H_
9#define _FSL_ROMAPI_H_
10
11#include "fsl_common.h"
12
19#define FSL_ROM_ROMAPI_VERSION (MAKE_VERSION(1U, 1U, 1U))
21#define FSL_ROM_FLEXSPINOR_DRIVER_VERSION (MAKE_VERSION(1U, 7U, 0U))
22
28#define FSL_ROM_HAS_FLEXSPINOR_API (1)
30#define FSL_ROM_HAS_RUNBOOTLOADER_API (1)
32#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG (1)
34#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_FLASH_INIT (1)
36#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE (1)
38#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR (1)
40#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK (1)
42#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL (1)
44#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ (1)
46#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT (1)
48#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER (1)
49
52#define kROM_StatusGroup_FLEXSPINOR 201U
54#define FSL_ROM_FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \
55 (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
56 FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
57
59#define FSL_ROM_FLEXSPI_BITMASK(bit_offset) (1U << (bit_offset))
60
62#define FLEXSPI_CFG_BLK_TAG (0x42464346UL)
63#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL)
65#define CMD_SDR 0x01U
66#define CMD_DDR 0x21U
67#define RADDR_SDR 0x02U
68#define RADDR_DDR 0x22U
69#define CADDR_SDR 0x03U
70#define CADDR_DDR 0x23U
71#define MODE1_SDR 0x04U
72#define MODE1_DDR 0x24U
73#define MODE2_SDR 0x05U
74#define MODE2_DDR 0x25U
75#define MODE4_SDR 0x06U
76#define MODE4_DDR 0x26U
77#define MODE8_SDR 0x07U
78#define MODE8_DDR 0x27U
79#define WRITE_SDR 0x08U
80#define WRITE_DDR 0x28U
81#define READ_SDR 0x09U
82#define READ_DDR 0x29U
83#define LEARN_SDR 0x0AU
84#define LEARN_DDR 0x2AU
85#define DATSZ_SDR 0x0BU
86#define DATSZ_DDR 0x2BU
87#define DUMMY_SDR 0x0CU
88#define DUMMY_DDR 0x2CU
89#define DUMMY_RWDS_SDR 0x0DU
90#define DUMMY_RWDS_DDR 0x2DU
91#define JMP_ON_CS 0x1FU
92#define STOP 0U
93
94#define FLEXSPI_1PAD 0U
95#define FLEXSPI_2PAD 1U
96#define FLEXSPI_4PAD 2U
97#define FLEXSPI_8PAD 3U
98
104#define NOR_CMD_LUT_SEQ_IDX_READ 0U
105#define NOR_CMD_LUT_SEQ_IDX_READSTATUS 1U
106#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
107 2U
108#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 3U
109#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
110 4U
111#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5U
112#define NOR_CMD_LUT_SEQ_IDX_READID 7U
113#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8U
114#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM 9U
115#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11U
116#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13U
117#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
118 14U
119#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
120 15U
128{
129 union
130 {
131 struct
132 {
133 uint32_t max_freq : 4;
134 uint32_t misc_mode : 4;
135 uint32_t quad_mode_setting : 4;
136 uint32_t cmd_pads : 4;
137 uint32_t query_pads : 4;
138 uint32_t device_type : 4;
139 uint32_t option_size : 4;
140 uint32_t tag : 4;
141 } B;
142 uint32_t U;
143 } option0;
144
145 union
146 {
147 struct
148 {
149 uint32_t dummy_cycles : 8;
150 uint32_t status_override : 8;
151 uint32_t pinmux_group : 4;
152 uint32_t dqs_pinmux_group : 4;
153 uint32_t drive_strength : 4;
154 uint32_t flash_connection : 4;
156 } B;
157 uint32_t U;
158 } option1;
159
161
169enum
170{
171 kSerialFlash_1Pad = 1U,
172 kSerialFlash_2Pads = 2U,
173 kSerialFlash_4Pads = 4U,
174 kSerialFlash_8Pads = 8U,
175};
176
178enum
179{
182};
183
186{
187 kFLEXSPIReadSampleClk_LoopbackInternally = 0U,
188 kFLEXSPIReadSampleClk_LoopbackFromDqsPad = 1U,
189 kFLEXSPIReadSampleClk_LoopbackFromSckPad = 2U,
190 kFLEXSPIReadSampleClk_ExternalInputFromDqsPad = 3U,
192};
193
195enum
196{
198};
199
201enum
202{
209};
210
213{
214 kFLEXSPISerialClk_NoChange = 0U,
215 kFLEXSPISerialClk_30MHz = 1U,
216 kFLEXSPISerialClk_50MHz = 2U,
217 kFLEXSPISerialClk_60MHz = 3U,
218 kFLEXSPISerialClk_75MHz = 4U,
219 kFLEXSPISerialClk_80MHz = 5U,
220 kFLEXSPISerialClk_100MHz = 6U,
221 kFLEXSPISerialClk_133MHz = 7U,
222 kFLEXSPISerialClk_166MHz = 8U,
223};
224
226enum
227{
236};
237
241enum
242{
247};
248
251{
262};
263
270typedef struct _flexspi_lut_seq
271{
272 uint8_t seqNum;
273 uint8_t seqId;
274 uint16_t reserved;
276
278typedef struct
279{
280 uint8_t time_100ps;
281 uint8_t delay_cells;
283
285typedef struct _flexspi_mem_config
286{
287 uint32_t tag;
288 uint32_t version;
289 uint32_t reserved0;
290 uint8_t readSampleClkSrc;
291 uint8_t csHoldTime;
292 uint8_t csSetupTime;
293 uint8_t columnAddressWidth;
295 uint8_t deviceModeCfgEnable;
296 uint8_t deviceModeType;
298 uint16_t waitTimeCfgCommands;
302 uint32_t deviceModeArg;
303 uint8_t configCmdEnable;
304 uint8_t configModeType[3];
306 configCmdSeqs[3];
307 uint32_t reserved1;
308 uint32_t configCmdArgs[3];
309 uint32_t reserved2;
310 uint32_t controllerMiscOption;
312 uint8_t deviceType;
313 uint8_t sflashPadType;
314 uint8_t serialClkFreq;
316 uint8_t
319 uint32_t reserved3[2];
320 uint32_t sflashA1Size;
321 uint32_t sflashA2Size;
322 uint32_t sflashB1Size;
323 uint32_t sflashB2Size;
324 uint32_t csPadSettingOverride;
325 uint32_t sclkPadSettingOverride;
326 uint32_t dataPadSettingOverride;
327 uint32_t dqsPadSettingOverride;
328 uint32_t timeoutInMs;
329 uint32_t commandInterval;
331 uint16_t busyOffset;
332 uint16_t busyBitPolarity;
334 uint32_t lookupTable[64];
336 uint32_t reserved4[4];
338
340typedef struct _flexspi_nor_config
341{
343 uint32_t pageSize;
344 uint32_t sectorSize;
345 uint8_t ipcmdSerialClkFreq;
346 uint8_t isUniformBlockSize;
347 uint8_t isDataOrderSwapped;
348 uint8_t reserved0[1];
349 uint8_t serialNorType;
350 uint8_t needExitNoCmdMode;
351 uint8_t halfClkForNonReadCmd;
352 uint8_t needRestoreNoCmdMode;
353 uint32_t blockSize;
354 uint32_t reserve2[11];
356
361{
366} flexspi_operation_t;
367
368#define kFLEXSPIOperation_End kFLEXSPIOperation_Read
369
371typedef struct _flexspi_xfer
372{
373 flexspi_operation_t operation;
374 uint32_t baseAddress;
375 uint32_t seqId;
376 uint32_t seqNum;
378 uint32_t *txBuffer;
379 uint32_t txSize;
380 uint32_t *rxBuffer;
381 uint32_t rxSize;
383
385#define MISRA_CAST(to_type, to_var, from_type, from_var) \
386 do \
387 { \
388 union \
389 { \
390 to_type to_var_tmp; \
391 from_type from_var_tmp; \
392 } type_converter_var = {.from_var_tmp = (from_var)}; \
393 (to_var) = type_converter_var.to_var_tmp; \
394 } while (false)
395
396#ifdef __cplusplus
397extern "C" {
398#endif
399
400#if defined(FSL_FEATURE_BOOT_ROM_HAS_ROMAPI) && FSL_FEATURE_BOOT_ROM_HAS_ROMAPI
401
407#if defined(FSL_ROM_HAS_RUNBOOTLOADER_API) && FSL_ROM_HAS_RUNBOOTLOADER_API
414void ROM_RunBootloader(void *arg);
415#endif /* FSL_ROM_HAS_RUNBOOTLOADER_API */
416
423#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG
437status_t ROM_FLEXSPI_NorFlash_GetConfig(uint32_t instance,
440#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG */
441
461status_t ROM_FLEXSPI_NorFlash_Init(uint32_t instance, flexspi_nor_config_t *config);
462
491status_t ROM_FLEXSPI_NorFlash_ProgramPage(uint32_t instance,
493 uint32_t dst_addr,
494 const uint32_t *src);
495
503#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ
525status_t ROM_FLEXSPI_NorFlash_Read(
526 uint32_t instance, flexspi_nor_config_t *config, uint32_t *dst, uint32_t start, uint32_t lengthInBytes);
527#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_READ */
528
558status_t ROM_FLEXSPI_NorFlash_Erase(uint32_t instance, flexspi_nor_config_t *config, uint32_t start, uint32_t length);
559
560#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR
579status_t ROM_FLEXSPI_NorFlash_EraseSector(uint32_t instance, flexspi_nor_config_t *config, uint32_t start);
580#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR */
581
582#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK
601status_t ROM_FLEXSPI_NorFlash_EraseBlock(uint32_t instance, flexspi_nor_config_t *config, uint32_t start);
602#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK */
603
604#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL
617status_t ROM_FLEXSPI_NorFlash_EraseAll(uint32_t instance, flexspi_nor_config_t *config);
618#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL */
619
626#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER
640status_t ROM_FLEXSPI_NorFlash_CommandXfer(uint32_t instance, flexspi_xfer_t *xfer);
641#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER */
648#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT
662status_t ROM_FLEXSPI_NorFlash_UpdateLut(uint32_t instance,
663 uint32_t seqIndex,
664 const uint32_t *lutBase,
665 uint32_t seqNumber);
666#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT */
667
688status_t ROM_FLEXSPI_NorFlash_WaitBusy(uint32_t instance,
690 bool isParallelMode,
691 uint32_t address);
712void ROM_FLEXSPI_NorFlash_ClearCache(uint32_t instance);
713
716#endif /* FSL_FEATURE_BOOT_ROM_HAS_ROMAPI */
717
718#ifdef __cplusplus
719}
720#endif
721
724#endif /* _FSL_ROMAPI_H_ */
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:225
#define MAKE_STATUS(group, code)
Construct a status code value from a group and code number.
Definition: fsl_common.h:47
@ kStatusGroup_FLEXSPI
Definition: fsl_common.h:142
flexspi_mem_config_t memConfig
Common memory configuration info via FlexSPI.
Definition: fsl_flexspi_nor_config.h:276
uint32_t max_freq
Definition: fsl_romapi.h:133
_flexspi_nor_status
ROM FLEXSPI NOR flash status.
Definition: fsl_romapi.h:322
uint32_t pinmux_group
Definition: fsl_romapi.h:151
uint32_t flash_connection
Definition: fsl_romapi.h:154
uint32_t dqs_pinmux_group
Definition: fsl_romapi.h:152
uint32_t commandInterval
Definition: fsl_romapi.h:281
uint8_t readSampleClkSrc
Definition: fsl_romapi.h:242
uint16_t waitTimeCfgCommands
Definition: fsl_romapi.h:250
uint32_t query_pads
Definition: fsl_romapi.h:137
uint32_t reserved0
Definition: fsl_romapi.h:241
uint32_t seqNum
Definition: fsl_romapi.h:350
bool isParallelModeEnable
Definition: fsl_romapi.h:351
uint32_t rxSize
Definition: fsl_romapi.h:355
uint8_t configModeType[3]
Definition: fsl_romapi.h:256
uint32_t sflashB1Size
Definition: fsl_romapi.h:274
uint8_t seqNum
Definition: fsl_romapi.h:225
uint8_t ipcmdSerialClkFreq
Clock frequency for IP command.
Definition: fsl_flexspi_nor_config.h:279
uint32_t drive_strength
Definition: fsl_romapi.h:153
uint32_t dqsPadSettingOverride
Definition: fsl_romapi.h:279
uint32_t quad_mode_setting
Definition: fsl_romapi.h:135
uint32_t blockSize
Block size.
Definition: fsl_flexspi_nor_config.h:287
uint32_t reserved3[2]
Definition: fsl_romapi.h:271
uint8_t halfClkForNonReadCmd
Half the Serial Clock for non-read command: true/false.
Definition: fsl_flexspi_nor_config.h:285
uint16_t busyBitPolarity
Definition: fsl_romapi.h:284
#define kROM_StatusGroup_FLEXSPINOR
Definition: fsl_romapi.h:53
uint8_t deviceModeType
Definition: fsl_romapi.h:248
flexspi_dll_time_t dataValidTime[2]
Definition: fsl_romapi.h:282
uint32_t configCmdArgs[3]
Definition: fsl_romapi.h:260
uint32_t * txBuffer
Definition: fsl_romapi.h:352
uint8_t seqId
Definition: fsl_romapi.h:226
uint32_t deviceModeArg
Definition: fsl_romapi.h:254
uint8_t serialNorType
Serial NOR Flash type: 0/1/2/3.
Definition: fsl_flexspi_nor_config.h:283
uint32_t version
Definition: fsl_romapi.h:240
uint32_t reserve2[10]
Reserved for future use.
Definition: fsl_flexspi_nor_config.h:289
uint8_t lutCustomSeqEnable
Definition: fsl_romapi.h:269
uint32_t option_size
Definition: fsl_romapi.h:139
uint32_t sflashA2Size
Definition: fsl_romapi.h:273
struct _flexspi_nor_config flexspi_nor_config_t
Serial NOR configuration block.
uint32_t device_type
Definition: fsl_romapi.h:138
uint32_t * rxBuffer
Definition: fsl_romapi.h:354
uint8_t serialClkFreq
Definition: fsl_romapi.h:266
_flexspi_serial_clk_freq
Defintions for FLEXSPI Serial Clock Frequency.
Definition: fsl_romapi.h:180
uint32_t sflashB2Size
Definition: fsl_romapi.h:275
uint8_t reserved0
Reserved for future use.
Definition: fsl_flexspi_nor_config.h:282
uint8_t columnAddressWidth
Definition: fsl_romapi.h:245
flexspi_operation_t operation
Definition: fsl_romapi.h:347
uint16_t busyOffset
Definition: fsl_romapi.h:283
_flexspi_operation
Definition: fsl_romapi.h:336
uint32_t status_override
Definition: fsl_romapi.h:150
uint32_t sflashA1Size
Definition: fsl_romapi.h:272
uint8_t isUniformBlockSize
Sector/Block size is the same.
Definition: fsl_flexspi_nor_config.h:280
uint32_t dummy_cycles
Definition: fsl_romapi.h:149
uint32_t dataPadSettingOverride
Definition: fsl_romapi.h:278
struct _serial_nor_config_option serial_nor_config_option_t
Serial NOR Configuration Option.
uint8_t configCmdEnable
Definition: fsl_romapi.h:255
flexspi_lut_seq_t lutCustomSeq[12]
Definition: fsl_romapi.h:287
uint8_t csHoldTime
Definition: fsl_romapi.h:243
uint32_t cmd_pads
Definition: fsl_romapi.h:136
uint32_t tag
Definition: fsl_romapi.h:140
flexspi_lut_seq_t deviceModeSeq
Definition: fsl_romapi.h:252
uint32_t lookupTable[64]
Definition: fsl_romapi.h:286
uint32_t seqId
Definition: fsl_romapi.h:349
uint32_t baseAddress
Definition: fsl_romapi.h:348
uint32_t timeoutInMs
Definition: fsl_romapi.h:280
uint8_t deviceType
Definition: fsl_romapi.h:264
struct _flexspi_xfer flexspi_xfer_t
FLEXSPI Transfer Context.
uint8_t sflashPadType
Definition: fsl_romapi.h:265
struct _flexspi_lut_seq flexspi_lut_seq_t
FLEXSPI LUT Sequence structure.
struct _flexspi_mem_config flexspi_mem_config_t
FLEXSPI Memory Configuration Block.
uint32_t sclkPadSettingOverride
Definition: fsl_romapi.h:277
uint32_t reserved2
Definition: fsl_romapi.h:261
uint32_t pageSize
Page size of Serial NOR.
Definition: fsl_flexspi_nor_config.h:277
uint32_t misc_mode
Definition: fsl_romapi.h:134
uint32_t tag
Definition: fsl_romapi.h:239
flexspi_lut_seq_t configCmdSeqs[3]
Definition: fsl_romapi.h:258
uint8_t deviceModeCfgEnable
Definition: fsl_romapi.h:247
uint8_t needExitNoCmdMode
Need to exit NoCmd mode before other IP command.
Definition: fsl_flexspi_nor_config.h:284
uint32_t csPadSettingOverride
Definition: fsl_romapi.h:276
uint32_t sectorSize
Sector size of Serial NOR.
Definition: fsl_flexspi_nor_config.h:278
uint32_t controllerMiscOption
Definition: fsl_romapi.h:262
uint32_t reserved1
Definition: fsl_romapi.h:259
uint32_t txSize
Definition: fsl_romapi.h:353
uint8_t isDataOrderSwapped
The data order is swapped in OPI DDR mode (only i.MXRT11*)
Definition: fsl_flexspi_nor_config.h:281
uint8_t needRestoreNoCmdMode
Need to Restore NoCmd mode after IP commmand execution.
Definition: fsl_flexspi_nor_config.h:286
uint8_t csSetupTime
Definition: fsl_romapi.h:244
uint32_t reserved4[4]
Definition: fsl_romapi.h:288
_flexspi_read_sample_clk
FLEXSPI Read Sample Clock Source definition.
Definition: fsl_romapi.h:154
@ kStatus_ROM_FLEXSPI_InvalidSequence
Definition: fsl_romapi.h:325
@ kStatus_FLEXSPINOR_DTRRead_DummyProbeFailed
Definition: fsl_romapi.h:327
@ kStatus_ROM_FLEXSPINOR_SFDP_NotFound
Definition: fsl_romapi.h:329
@ kStatus_ROM_FLEXSPI_SequenceExecutionTimeout
Definition: fsl_romapi.h:323
@ kStatus_ROM_FLEXSPI_DeviceTimeout
Definition: fsl_romapi.h:326
@ kStatus_ROM_FLEXSPINOR_Flash_NotFound
Definition: fsl_romapi.h:331
@ kFLEXSPIClk_DDR
Definition: fsl_romapi.h:149
@ kFLEXSPIClk_SDR
Definition: fsl_romapi.h:148
@ kFLEXSPIOperation_Write
Definition: fsl_romapi.h:339
@ kFLEXSPIOperation_Command
Definition: fsl_romapi.h:337
@ kFLEXSPIOperation_Read
Definition: fsl_romapi.h:340
@ kFLEXSPIOperation_Config
Definition: fsl_romapi.h:338
@ kFLEXSPIMiscOffset_WordAddressableEnable
Definition: fsl_romapi.h:199
@ kFLEXSPIMiscOffset_DiffClkEnable
Definition: fsl_romapi.h:196
@ kFLEXSPIMiscOffset_ParallelEnable
Definition: fsl_romapi.h:198
@ kFLEXSPIMiscOffset_DdrModeEnable
Definition: fsl_romapi.h:202
@ kFLEXSPIMiscOffset_PadSettingOverrideEnable
Definition: fsl_romapi.h:201
@ kFLEXSPIMiscOffset_SafeConfigFreqEnable
Definition: fsl_romapi.h:200
@ kFLEXSPIMiscOffset_Ck2Enable
Definition: fsl_romapi.h:197
@ kFLEXSPIMiscOffset_UseValidTimeForAllFreq
Definition: fsl_romapi.h:203
@ kSerialFlash_Cypress_ManufacturerID
Definition: fsl_romapi.h:317
@ kSerialFlash_Adesto_ManufacturerID
Definition: fsl_romapi.h:315
@ kSerialFlash_Winbond_ManufacturerID
Definition: fsl_romapi.h:316
@ kSerialFlash_ISSI_ManufacturerID
Definition: fsl_romapi.h:314
@ kDeviceConfigCmdType_Generic
Definition: fsl_romapi.h:170
@ kDeviceConfigCmdType_QuadEnable
Definition: fsl_romapi.h:171
@ kDeviceConfigCmdType_Reset
Definition: fsl_romapi.h:175
@ kDeviceConfigCmdType_Spi2Xpi
Definition: fsl_romapi.h:172
@ kDeviceConfigCmdType_Spi2NoCmd
Definition: fsl_romapi.h:174
@ kDeviceConfigCmdType_Xpi2Spi
Definition: fsl_romapi.h:173
@ kFLEXSPIDeviceType_SerialNOR
Definition: fsl_romapi.h:164
FlexSPI Memory Configuration Block.
Definition: fsl_flexspi_nor_config.h:189
FLEXSPI LUT Sequence structure.
Definition: fsl_romapi.h:224
FLEXSPI Memory Configuration Block.
Definition: fsl_romapi.h:238
Serial NOR configuration block.
Definition: fsl_flexspi_nor_config.h:275
FLEXSPI Transfer Context.
Definition: fsl_romapi.h:346
FlexSPI LUT Sequence structure.
Definition: fsl_flexspi_nor_config.h:170
Serial NOR Configuration Option.
Definition: fsl_romapi.h:128
Definition: deflate.c:114
FLEXSPI DLL time.
Definition: fsl_romapi.h:231