RTEMS 6.1-rc7
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mmu.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * Copyright (C) 2009, 2011 embedded brains GmbH & Co. KG
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#ifndef LIBBSP_ARM_LPC32XX_MMU_H
37#define LIBBSP_ARM_LPC32XX_MMU_H
38
39#include <libcpu/arm-cp15.h>
40
41#ifdef __cplusplus
42extern "C" {
43#endif /* __cplusplus */
44
55#define LPC32XX_MMU_CLIENT_DOMAIN 15U
56
57#define LPC32XX_MMU_READ_ONLY \
58 ((LPC32XX_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \
59 | ARM_MMU_SECT_DEFAULT)
60
61#define LPC32XX_MMU_READ_ONLY_CACHED \
62 (LPC32XX_MMU_READ_ONLY | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
63
64#define LPC32XX_MMU_READ_WRITE \
65 ((LPC32XX_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \
66 | ARM_MMU_SECT_AP_0 \
67 | ARM_MMU_SECT_DEFAULT)
68
69#define LPC32XX_MMU_READ_WRITE_CACHED \
70 (LPC32XX_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
71
78 const void *begin,
79 const void *end,
80 uint32_t section_flags
81);
82
85#ifdef __cplusplus
86}
87#endif /* __cplusplus */
88
89#endif /* LIBBSP_ARM_LPC32XX_MMU_H */
ARM co-processor 15 (CP15) API.
uint32_t lpc32xx_set_translation_table_entries(const void *begin, const void *end, uint32_t section_flags)
Sets the section_flags for the address range [begin, end).
Definition: mmu.c:66