RTEMS 6.1-rc7
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bsp.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
13 * Written by Kinsey Moore <kinsey.moore@oarcorp.com>
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#ifndef LIBBSP_AARCH64_XILINX_ZYNQMP_BSP_H
38#define LIBBSP_AARCH64_XILINX_ZYNQMP_BSP_H
39
40#include <bspopts.h>
41
42#define BSP_FEATURE_IRQ_EXTENSION
43
44#define BSP_RESET_SMC
45
46#define BSP_CPU_ON_USES_SMC
47
48#ifndef ASM
49
51#include <bsp/start.h>
52
53#include <rtems.h>
54
56
57#ifdef __cplusplus
58extern "C" {
59#endif /* __cplusplus */
60
62
75/*
76 * DDRMC mapping
77 */
78LINKER_SYMBOL(bsp_r0_ram_base)
79LINKER_SYMBOL(bsp_r0_ram_end)
80LINKER_SYMBOL(bsp_r1_ram_base)
81LINKER_SYMBOL(bsp_r1_ram_end)
82
83#define BSP_ARM_GIC_CPUIF_BASE 0xf9020000
84#define BSP_ARM_GIC_DIST_BASE 0xf9010000
85
86#define BSP_FDT_IS_SUPPORTED
87extern unsigned int zynqmp_dtb_len;
88extern unsigned char zynqmp_dtb[];
89
90#define NANDPSU_BASEADDR 0xFF100000
91
97BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void);
98
105BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void );
106
107void zynqmp_management_console_termios_init(void);
108
109void zynqmp_debug_console_flush(void);
110
111uint32_t zynqmp_clock_i2c0(void);
112
113uint32_t zynqmp_clock_i2c1(void);
114
124);
125
128#ifdef __cplusplus
129}
130#endif /* __cplusplus */
131
132#endif /* ASM */
133
134#endif /* LIBBSP_AARCH64_XILINX_ZYNQMP_BSP_H */
This header file provides the default definition of BSP_INITIAL_EXTENSION.
void zynqmp_configure_management_console(struct rtems_termios_device_context *base)
Zynq UltraScale+ MPSoC specific set up of a management console.
BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache(void)
Zynq UltraScale+ MPSoC specific set up of the MMU for non-primary cores.
Definition: bspstartmmu.c:88
BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void)
Zynq UltraScale+ MPSoC specific set up of the MMU.
Definition: bspstartmmu.c:67
This header file defines the RTEMS Classic API.
Termios device context.
Definition: termiosdevice.h:68
This header file provides interfaces with respect to the Zynq UltraScale+ MPSoC and RFSoC platforms.