40#ifndef _RTEMS_PERCPU_H
41#define _RTEMS_PERCPU_H
43#include <rtems/score/cpuimpl.h>
46 #include <rtems/asm.h>
60#if defined( RTEMS_SMP )
61 #if defined( RTEMS_PROFILING )
62 #define PER_CPU_CONTROL_SIZE_PROFILING 332
64 #define PER_CPU_CONTROL_SIZE_PROFILING 0
67 #if defined( RTEMS_DEBUG )
68 #define PER_CPU_CONTROL_SIZE_DEBUG 76
70 #define PER_CPU_CONTROL_SIZE_DEBUG 0
73 #if CPU_SIZEOF_POINTER > 4
74 #define PER_CPU_CONTROL_SIZE_BIG_POINTER 76
76 #define PER_CPU_CONTROL_SIZE_BIG_POINTER 0
79 #define PER_CPU_CONTROL_SIZE_BASE 180
80 #define PER_CPU_CONTROL_SIZE_APPROX \
81 ( PER_CPU_CONTROL_SIZE_BASE + CPU_PER_CPU_CONTROL_SIZE + \
82 CPU_INTERRUPT_FRAME_SIZE + PER_CPU_CONTROL_SIZE_PROFILING + \
83 PER_CPU_CONTROL_SIZE_DEBUG + PER_CPU_CONTROL_SIZE_BIG_POINTER )
91 #if PER_CPU_CONTROL_SIZE_APPROX > 1024
92 #define PER_CPU_CONTROL_SIZE_LOG2 11
93 #elif PER_CPU_CONTROL_SIZE_APPROX > 512
94 #define PER_CPU_CONTROL_SIZE_LOG2 10
95 #elif PER_CPU_CONTROL_SIZE_APPROX > 256
96 #define PER_CPU_CONTROL_SIZE_LOG2 9
97 #elif PER_CPU_CONTROL_SIZE_APPROX > 128
98 #define PER_CPU_CONTROL_SIZE_LOG2 8
100 #define PER_CPU_CONTROL_SIZE_LOG2 7
103 #define PER_CPU_CONTROL_SIZE ( 1 << PER_CPU_CONTROL_SIZE_LOG2 )
129#if defined( RTEMS_SMP )
176 PER_CPU_STATE_INITIAL,
192 PER_CPU_STATE_READY_TO_START_MULTITASKING,
202 PER_CPU_STATE_SHUTDOWN
205typedef void ( *Per_CPU_Job_handler )(
void *arg );
217 Per_CPU_Job_handler handler;
223} Per_CPU_Job_context;
230#define PER_CPU_JOB_DONE 1
238typedef struct Per_CPU_Job {
243 struct Per_CPU_Job *next;
257 const Per_CPU_Job_context *
context;
270#pragma GCC diagnostic push
271#pragma GCC diagnostic ignored "-Wpedantic"
273#if defined( RTEMS_PROFILING )
279 CPU_Counter_ticks thread_dispatch_disabled_instant;
285 CPU_Counter_ticks max_thread_dispatch_disabled_time;
294 CPU_Counter_ticks max_interrupt_time;
300 CPU_Counter_ticks max_interrupt_delay;
308 uint64_t thread_dispatch_disabled_count;
319 uint64_t total_thread_dispatch_disabled_time;
327 uint64_t interrupt_count;
337 uint64_t total_interrupt_time;
340#pragma GCC diagnostic pop
385 #if CPU_PER_CPU_CONTROL_SIZE > 0
444 bool reserved_for_executing_alignment[ 3 ];
475#if defined(RTEMS_SMP)
495#if defined(RTEMS_SMP)
499 ISR_lock_Control Lock;
516 #if defined( RTEMS_SMP )
520 ISR_lock_Control Lock;
604 ISR_lock_Control Lock;
612 struct Per_CPU_Job *head;
622 struct Per_CPU_Job **tail;
643#if defined( RTEMS_SMP )
646 char unused_space_for_cache_line_alignment
662#define _Per_CPU_Acquire( cpu, lock_context ) \
663 _ISR_lock_Acquire( &( cpu )->Lock, lock_context )
665#define _Per_CPU_Release( cpu, lock_context ) \
666 _ISR_lock_Release( &( cpu )->Lock, lock_context )
675#if defined( _CPU_Get_current_per_CPU_control )
676 #define _Per_CPU_Get_snapshot() _CPU_Get_current_per_CPU_control()
678 #define _Per_CPU_Get_snapshot() \
679 ( &_Per_CPU_Information[ _SMP_Get_current_processor() ].per_cpu )
682#if defined( RTEMS_SMP )
694#define _Per_CPU_Get() _Per_CPU_Get_snapshot()
704#if defined(RTEMS_SMP)
722static inline bool _Per_CPU_Is_ISR_in_progress(
const Per_CPU_Control *cpu )
724#if CPU_PROVIDES_ISR_IS_IN_PROGRESS == TRUE
732static inline bool _Per_CPU_Is_processor_online(
736#if defined( RTEMS_SMP )
745static inline bool _Per_CPU_Is_boot_processor(
749#if defined( RTEMS_SMP )
758static inline void _Per_CPU_Acquire_all(
762#if defined(RTEMS_SMP)
767 cpu_max = _SMP_Get_processor_maximum();
768 previous_cpu = _Per_CPU_Get_by_index( 0 );
771 _Per_CPU_Acquire( previous_cpu, lock_context );
773 for ( cpu_index = 1 ; cpu_index < cpu_max ; ++cpu_index ) {
776 cpu = _Per_CPU_Get_by_index( cpu_index );
777 _Per_CPU_Acquire( cpu, &previous_cpu->Lock_context );
785static inline void _Per_CPU_Release_all(
789#if defined(RTEMS_SMP)
794 cpu_max = _SMP_Get_processor_maximum();
795 cpu = _Per_CPU_Get_by_index( cpu_max - 1 );
797 for ( cpu_index = cpu_max - 1 ; cpu_index > 0 ; --cpu_index ) {
800 previous_cpu = _Per_CPU_Get_by_index( cpu_index - 1 );
801 _Per_CPU_Release( cpu, &previous_cpu->Lock_context );
805 _Per_CPU_Release( cpu, lock_context );
812#if defined( RTEMS_SMP )
821static inline Per_CPU_State _Per_CPU_Get_state(
const Per_CPU_Control *cpu )
823 return (Per_CPU_State)
824 _Atomic_Load_uint( &cpu->state, ATOMIC_ORDER_ACQUIRE );
835static inline void _Per_CPU_Set_state(
840 _Assert( cpu_self == _Per_CPU_Get() );
843 (
unsigned int) state,
889void _Per_CPU_Wait_for_job(
891 const Per_CPU_Job *job
900#define _Thread_Dispatch_disable_level \
901 _Per_CPU_Get()->thread_dispatch_disable_level
902#define _Thread_Heir \
905#if defined(_CPU_Get_thread_executing)
906#define _Thread_Executing \
907 _CPU_Get_thread_executing()
909#define _Thread_Executing \
910 _Per_CPU_Get_executing( _Per_CPU_Get() )
913#define _ISR_Nest_level \
914 _Per_CPU_Get()->isr_nest_level
915#define _CPU_Interrupt_stack_low \
916 _Per_CPU_Get()->interrupt_stack_low
917#define _CPU_Interrupt_stack_high \
918 _Per_CPU_Get()->interrupt_stack_high
919#define _Thread_Dispatch_necessary \
920 _Per_CPU_Get()->dispatch_necessary
936 #if defined(RTEMS_SMP) && !defined(_CPU_Get_thread_executing)
942 executing = _Thread_Executing;
944 #if defined(RTEMS_SMP) && !defined(_CPU_Get_thread_executing)
955#if defined( ASM ) || defined( _RTEMS_PERCPU_DEFINE_OFFSETS )
957#define PER_CPU_INTERRUPT_STACK_LOW \
958 CPU_PER_CPU_CONTROL_SIZE
959#define PER_CPU_INTERRUPT_STACK_HIGH \
960 PER_CPU_INTERRUPT_STACK_LOW + CPU_SIZEOF_POINTER
962#define INTERRUPT_STACK_LOW \
963 (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_LOW)
964#define INTERRUPT_STACK_HIGH \
965 (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH)
970#define PER_CPU_ISR_NEST_LEVEL \
971 PER_CPU_INTERRUPT_STACK_HIGH + CPU_SIZEOF_POINTER
972#define PER_CPU_ISR_DISPATCH_DISABLE \
973 PER_CPU_ISR_NEST_LEVEL + 4
974#define PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL \
975 PER_CPU_ISR_DISPATCH_DISABLE + 4
976#define PER_CPU_DISPATCH_NEEDED \
977 PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL + 4
978#define PER_CPU_OFFSET_EXECUTING \
979 PER_CPU_DISPATCH_NEEDED + 4
980#define PER_CPU_OFFSET_HEIR \
981 PER_CPU_OFFSET_EXECUTING + CPU_SIZEOF_POINTER
982#if defined(RTEMS_SMP)
983#define PER_CPU_INTERRUPT_FRAME_AREA \
984 PER_CPU_OFFSET_HEIR + CPU_SIZEOF_POINTER
987#define THREAD_DISPATCH_DISABLE_LEVEL \
988 (SYM(_Per_CPU_Information) + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)
989#define ISR_NEST_LEVEL \
990 (SYM(_Per_CPU_Information) + PER_CPU_ISR_NEST_LEVEL)
991#define DISPATCH_NEEDED \
992 (SYM(_Per_CPU_Information) + PER_CPU_DISPATCH_NEEDED)
This header file provides the interfaces of the Assert Handler.
This header file provides interfaces of the SMP Support which are used by the implementation and the ...
This header file provides interfaces of the Watchdog Handler which are used by the implementation and...
#define _Assert(_e)
Assertion similar to assert() controlled via RTEMS_DEBUG instead of NDEBUG and static analysis runs.
Definition: assert.h:96
#define _ISR_lock_ISR_enable(_context)
Restores the saved interrupt state of the ISR lock context.
Definition: isrlock.h:385
#define _ISR_lock_ISR_disable(_context)
Disables interrupts and saves the previous interrupt state in the ISR lock context.
Definition: isrlock.h:364
#define _ISR_Local_disable(_level)
Disables interrupts on this processor.
Definition: isrlevel.h:76
bool _ISR_Is_in_progress(void)
Checks if an ISR in progress.
Definition: nios2-isr-is-in-progress.c:36
#define _ISR_Local_enable(_level)
Enables interrupts on this processor.
Definition: isrlevel.h:93
#define _ISR_Get_level()
Return current interrupt level.
Definition: isrlevel.h:147
uint32_t ISR_Level
Definition: isrlevel.h:60
Per_CPU_Watchdog_index
Per-CPU watchdog header index.
Definition: percpu.h:345
CPU_STRUCTURE_ALIGNMENT Per_CPU_Control_envelope _Per_CPU_Information[]
Set of Per CPU Core Information.
Definition: asm.h:171
@ PER_CPU_WATCHDOG_MONOTONIC
Index for monotonic clock per-CPU watchdog header.
Definition: percpu.h:371
@ PER_CPU_WATCHDOG_COUNT
Count of per-CPU watchdog headers.
Definition: percpu.h:376
@ PER_CPU_WATCHDOG_REALTIME
Index for realtime clock per-CPU watchdog header.
Definition: percpu.h:362
@ PER_CPU_WATCHDOG_TICKS
Index for tick clock per-CPU watchdog header.
Definition: percpu.h:353
int64_t Timestamp_Control
Definition: timestamp.h:76
This header file provides the interfaces of the ISR Locks.
rtems_termios_device_context * context
Definition: console-config.c:62
This header file provides interfaces of the Chain Handler which are used by the implementation and th...
Interrupt stack frame (ISF).
Definition: cpuimpl.h:64
The CPU specific per-CPU control.
Definition: cpuimpl.h:91
Local ISR lock context for acquire and release pairs.
Definition: isrlock.h:94
Per CPU Core Structure.
Definition: percpu.h:384
struct _Thread_Control * heir
This is the heir thread for this processor.
Definition: percpu.h:473
uint32_t isr_dispatch_disable
Indicates if an ISR thread dispatch is disabled.
Definition: percpu.h:416
void * interrupt_stack_high
The interrupt stack high address for this processor.
Definition: percpu.h:400
volatile uint32_t thread_dispatch_disable_level
The thread dispatch critical section nesting counter which is used to prevent context switches at ino...
Definition: percpu.h:422
volatile bool dispatch_necessary
This is set to true when this processor needs to run the thread dispatcher.
Definition: percpu.h:437
Timestamp_Control cpu_usage_timestamp
The CPU usage timestamp contains the time point of the last heir thread change or last CPU usage upda...
Definition: percpu.h:489
struct _Thread_Control * executing
This is the thread executing on this processor.
Definition: percpu.h:457
uint64_t ticks
Watchdog ticks on this processor used for monotonic clock watchdogs.
Definition: percpu.h:506
struct Per_CPU_Control::@4403 Watchdog
Watchdog state for this processor.
uint32_t isr_nest_level
Definition: percpu.h:406
void * interrupt_stack_low
The interrupt stack low address for this processor.
Definition: percpu.h:395
Per-CPU statistics.
Definition: percpu.h:272
Scheduler context.
Definition: scheduler.h:318
Scheduler control.
Definition: scheduler.h:337
Definition: intercom.c:87
Definition: media-server.c:46
This header file provides interfaces of the Timestamp Handler which are used by the implementation an...
This union represents a chain control block.
Definition: chain.h:96