RTEMS 6.1-rc7
Loading...
Searching...
No Matches
Modules | Data Structures | Macros

Modules

 ADC_ETC Register Masks
 

Data Structures

struct  ADC_ETC_Type
 

Macros

#define ADC_ETC_BASE   (0x403B0000u)
 
#define ADC_ETC   ((ADC_ETC_Type *)ADC_ETC_BASE)
 
#define ADC_ETC_BASE_ADDRS   { ADC_ETC_BASE }
 
#define ADC_ETC_BASE_PTRS   { ADC_ETC }
 
#define ADC_ETC_IRQS   { { ADC_ETC_IRQ0_IRQn, ADC_ETC_IRQ1_IRQn, ADC_ETC_IRQ2_IRQn } }
 
#define ADC_ETC_FAULT_IRQS   { ADC_ETC_ERROR_IRQ_IRQn }
 
#define ADC_ETC_BASE   (0x40048000u)
 
#define ADC_ETC   ((ADC_ETC_Type *)ADC_ETC_BASE)
 
#define ADC_ETC_BASE_ADDRS   { ADC_ETC_BASE }
 
#define ADC_ETC_BASE_PTRS   { ADC_ETC }
 
#define ADC_ETC_IRQS   { { ADC_ETC_IRQ0_IRQn, ADC_ETC_IRQ1_IRQn, ADC_ETC_IRQ2_IRQn, ADC_ETC_IRQ3_IRQn } }
 
#define ADC_ETC_FAULT_IRQS   { ADC_ETC_ERROR_IRQ_IRQn }
 
#define ADC_ETC_BASE   (0x40048000u)
 
#define ADC_ETC   ((ADC_ETC_Type *)ADC_ETC_BASE)
 
#define ADC_ETC_BASE_ADDRS   { ADC_ETC_BASE }
 
#define ADC_ETC_BASE_PTRS   { ADC_ETC }
 
#define ADC_ETC_IRQS   { { ADC_ETC_IRQ0_IRQn, ADC_ETC_IRQ1_IRQn, ADC_ETC_IRQ2_IRQn, ADC_ETC_IRQ3_IRQn } }
 
#define ADC_ETC_FAULT_IRQS   { ADC_ETC_ERROR_IRQ_IRQn }
 

Detailed Description

Macro Definition Documentation

◆ ADC_ETC [1/3]

#define ADC_ETC   ((ADC_ETC_Type *)ADC_ETC_BASE)

Peripheral ADC_ETC base pointer

◆ ADC_ETC [2/3]

#define ADC_ETC   ((ADC_ETC_Type *)ADC_ETC_BASE)

Peripheral ADC_ETC base pointer

◆ ADC_ETC [3/3]

#define ADC_ETC   ((ADC_ETC_Type *)ADC_ETC_BASE)

Peripheral ADC_ETC base pointer

◆ ADC_ETC_BASE [1/3]

#define ADC_ETC_BASE   (0x403B0000u)

Peripheral ADC_ETC base address

◆ ADC_ETC_BASE [2/3]

#define ADC_ETC_BASE   (0x40048000u)

Peripheral ADC_ETC base address

◆ ADC_ETC_BASE [3/3]

#define ADC_ETC_BASE   (0x40048000u)

Peripheral ADC_ETC base address

◆ ADC_ETC_BASE_ADDRS [1/3]

#define ADC_ETC_BASE_ADDRS   { ADC_ETC_BASE }

Array initializer of ADC_ETC peripheral base addresses

◆ ADC_ETC_BASE_ADDRS [2/3]

#define ADC_ETC_BASE_ADDRS   { ADC_ETC_BASE }

Array initializer of ADC_ETC peripheral base addresses

◆ ADC_ETC_BASE_ADDRS [3/3]

#define ADC_ETC_BASE_ADDRS   { ADC_ETC_BASE }

Array initializer of ADC_ETC peripheral base addresses

◆ ADC_ETC_BASE_PTRS [1/3]

#define ADC_ETC_BASE_PTRS   { ADC_ETC }

Array initializer of ADC_ETC peripheral base pointers

◆ ADC_ETC_BASE_PTRS [2/3]

#define ADC_ETC_BASE_PTRS   { ADC_ETC }

Array initializer of ADC_ETC peripheral base pointers

◆ ADC_ETC_BASE_PTRS [3/3]

#define ADC_ETC_BASE_PTRS   { ADC_ETC }

Array initializer of ADC_ETC peripheral base pointers

◆ ADC_ETC_IRQS [1/3]

#define ADC_ETC_IRQS   { { ADC_ETC_IRQ0_IRQn, ADC_ETC_IRQ1_IRQn, ADC_ETC_IRQ2_IRQn } }

Interrupt vectors for the ADC_ETC peripheral type

◆ ADC_ETC_IRQS [2/3]

Interrupt vectors for the ADC_ETC peripheral type

◆ ADC_ETC_IRQS [3/3]

Interrupt vectors for the ADC_ETC peripheral type