10#ifndef __FSL_DEVICE_REGISTERS_H__
11#define __FSL_DEVICE_REGISTERS_H__
21#if (defined(CPU_MIMXRT1166CVM5A_cm7) || defined(CPU_MIMXRT1166DVM6A_cm7) || defined(CPU_MIMXRT1166XVM5A_cm7))
23#define MIMXRT1166_cm7_SERIES
28#include "MIMXRT1166_cm7_features.h"
30#elif (defined(CPU_MIMXRT1166CVM5A_cm4) || defined(CPU_MIMXRT1166DVM6A_cm4) || defined(CPU_MIMXRT1166XVM5A_cm4))
32#define MIMXRT1166_cm4_SERIES
37#include "MIMXRT1166_cm4_features.h"
40 #error "No valid CPU defined!"
CMSIS Peripheral Access Layer for MIMXRT1166_cm4.
CMSIS Peripheral Access Layer for MIMXRT1166_cm7.