RTEMS 6.1-rc7
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Data Fields
RCC_PLL2InitTypeDef Struct Reference

PLL2 Clock structure definition. More...

#include <stm32h7xx_hal_rcc_ex.h>

Data Fields

uint32_t PLL2M
 
uint32_t PLL2N
 
uint32_t PLL2P
 
uint32_t PLL2Q
 
uint32_t PLL2R
 
uint32_t PLL2RGE
 
uint32_t PLL2VCOSEL
 
uint32_t PLL2FRACN
 

Detailed Description

PLL2 Clock structure definition.

Field Documentation

◆ PLL2FRACN

uint32_t RCC_PLL2InitTypeDef::PLL2FRACN

PLL2FRACN: Specifies Fractional Part Of The Multiplication Factor for PLL2 VCO It should be a value between 0 and 8191

◆ PLL2M

uint32_t RCC_PLL2InitTypeDef::PLL2M

PLL2M: Division factor for PLL2 VCO input clock. This parameter must be a number between Min_Data = 1 and Max_Data = 63

◆ PLL2N

uint32_t RCC_PLL2InitTypeDef::PLL2N

PLL2N: Multiplication factor for PLL2 VCO output clock. This parameter must be a number between Min_Data = 4 and Max_Data = 512 or between Min_Data = 8 and Max_Data = 420(*) (*) : For stm32h7a3xx and stm32h7b3xx family lines.

◆ PLL2P

uint32_t RCC_PLL2InitTypeDef::PLL2P

PLL2P: Division factor for system clock. This parameter must be a number between Min_Data = 2 and Max_Data = 128 odd division factors are not allowed

◆ PLL2Q

uint32_t RCC_PLL2InitTypeDef::PLL2Q

PLL2Q: Division factor for peripheral clocks. This parameter must be a number between Min_Data = 1 and Max_Data = 128

◆ PLL2R

uint32_t RCC_PLL2InitTypeDef::PLL2R

PLL2R: Division factor for peripheral clocks. This parameter must be a number between Min_Data = 1 and Max_Data = 128

◆ PLL2RGE

uint32_t RCC_PLL2InitTypeDef::PLL2RGE

PLL2RGE: PLL2 clock Input range This parameter must be a value of RCC PLL2 VCI Range

◆ PLL2VCOSEL

uint32_t RCC_PLL2InitTypeDef::PLL2VCOSEL

PLL2VCOSEL: PLL2 clock Output range This parameter must be a value of RCC PLL2 VCO Range


The documentation for this struct was generated from the following file: