RTEMS 6.1-rc7
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bsp.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/* bsp.h
12 *
13 * This include file contains all MVME147 board IO definitions.
14 *
15 * COPYRIGHT (c) 1989-1999.
16 * On-Line Applications Research Corporation (OAR).
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions
20 * are met:
21 * 1. Redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer.
23 * 2. Redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
28 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
31 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 *
39 * MVME147 port for TNI - Telecom Bretagne
40 * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
41 * May 1996
42 */
43
44#ifndef LIBBSP_M68K_MVME147_BSP_H
45#define LIBBSP_M68K_MVME147_BSP_H
46
57#include <bspopts.h>
59
60#include <rtems.h>
61
62#ifdef __cplusplus
63extern "C" {
64#endif
65
66/* Constants */
67
68#define RAM_START 0x00005000
69#define RAM_END 0x00400000
70
71 /* MVME 147 Peripheral controller chip
72 see MVME147/D1, 3.4 */
73
74struct pcc_map {
75 /* 32 bit registers */
76 uint32_t dma_table_address; /* 0xfffe1000 */
77 uint32_t dma_data_address; /* 0xfffe1004 */
78 uint32_t dma_bytecount; /* 0xfffe1008 */
79 uint32_t dma_data_holding; /* 0xfffe100c */
80
81 /* 16 bit registers */
82 uint16_t timer1_preload; /* 0xfffe1010 */
83 uint16_t timer1_count; /* 0xfffe1012 */
84 uint16_t timer2_preload; /* 0xfffe1014 */
85 uint16_t timer2_count; /* 0xfffe1016 */
86
87 /* 8 bit registers */
88 uint8_t timer1_int_control; /* 0xfffe1018 */
89 uint8_t timer1_control; /* 0xfffe1019 */
90 uint8_t timer2_int_control; /* 0xfffe101a */
91 uint8_t timer2_control; /* 0xfffe101b */
92
93 uint8_t acfail_int_control; /* 0xfffe101c */
94 uint8_t watchdog_control; /* 0xfffe101d */
95
96 uint8_t printer_int_control; /* 0xfffe101e */
97 uint8_t printer_control; /* 0xfffe102f */
98
99 uint8_t dma_int_control; /* 0xfffe1020 */
100 uint8_t dma_control; /* 0xfffe1021 */
101 uint8_t bus_error_int_control; /* 0xfffe1022 */
102 uint8_t dma_status; /* 0xfffe1023 */
103 uint8_t abort_int_control; /* 0xfffe1024 */
104 uint8_t table_address_function_code; /* 0xfffe1025 */
105 uint8_t serial_port_int_control; /* 0xfffe1026 */
106 uint8_t general_purpose_control; /* 0xfffe1027 */
107 uint8_t lan_int_control; /* 0xfffe1028 */
108 uint8_t general_purpose_status; /* 0xfffe1029 */
109 uint8_t scsi_port_int_control; /* 0xfffe102a */
110 uint8_t slave_base_address; /* 0xfffe102b */
111 uint8_t software_int_1_control; /* 0xfffe102c */
112 uint8_t int_base_vector; /* 0xfffe102d */
113 uint8_t software_int_2_control; /* 0xfffe102e */
114 uint8_t revision_level; /* 0xfffe102f */
115};
116
117#define pcc ((volatile struct pcc_map * const) 0xfffe1000)
118
119#define z8530 0xfffe3001
120
121/* interrupt vectors - see MVME146/D1 4.14 */
122#define PCC_BASE_VECTOR 0x40 /* First user int */
123#define SCC_VECTOR PCC_BASE_VECTOR+3
124#define TIMER_1_VECTOR PCC_BASE_VECTOR+8
125#define TIMER_2_VECTOR PCC_BASE_VECTOR+9
126#define SOFT_1_VECTOR PCC_BASE_VECTOR+10
127#define SOFT_2_VECTOR PCC_BASE_VECTOR+11
128
129#define USE_CHANNEL_A 1 /* 1 = use channel A for console */
130#define USE_CHANNEL_B 0 /* 1 = use channel B for console */
131
132#if (USE_CHANNEL_A == 1)
133#define CONSOLE_CONTROL 0xfffe3002
134#define CONSOLE_DATA 0xfffe3003
135#elif (USE_CHANNEL_B == 1)
136#define CONSOLE_CONTROL 0xfffe3000
137#define CONSOLE_DATA 0xfffe3001
138#endif
139
140extern rtems_isr_entry M68Kvec[]; /* vector table address */
141
142/* functions */
143
144rtems_isr_entry set_vector(
145 rtems_isr_entry handler,
146 rtems_vector_number vector,
147 int type
148);
149
150#ifdef __cplusplus
151}
152#endif
153
156#endif
This header file provides the default definition of BSP_INITIAL_EXTENSION.
ISR_Handler_entry rtems_isr_entry
Interrupt service routines installed by rtems_interrupt_catch() shall have this type.
Definition: intr.h:134
ISR_Vector_number rtems_vector_number
This integer type represents interrupt vector numbers.
Definition: intr.h:102
This header file defines the RTEMS Classic API.
Definition: bsp.h:74