SLCR register definitions. More...

#include <bsp/utility.h>

Macros
#define	ZYNQ_SLCR_BASE_ADDR ( 0xF8000000 )

#define	ZYNQ_SLCR_LOCK_OFF ( 0x4 )

#define	ZYNQ_SLCR_UNLOCK_OFF ( 0x8 )

#define	ZYNQ_SLCR_FPGA_RST_CTRL_OFF ( 0x240 )

#define	ZYNQ_SLCR_PSS_IDCODE_OFF ( 0x530 )

#define	ZYNQ_SLCR_LVL_SHFTR_EN_OFF ( 0x900 )

#define	ZYNQ_SLCR_LOCK_KEY ( 0x767b )

#define	ZYNQ_SLCR_UNLOCK_KEY ( 0xdf0d )

#define	ZYNQ_SLCR_FPGA_RST_CTRL_FPGA_OUT_RST_GET(reg) BSP_FLD32GET( reg, 0, 3 )
	Get FPGA0_OUT_RST (bit 0) through FPGA3_OUT_RST fields (bit 3).

#define	ZYNQ_SLCR_FPGA_RST_CTRL_FPGA_OUT_RST(val) BSP_FLD32( val, 0, 3 )

#define	ZYNQ_SLCR_PSS_IDCODE_DEVICE_GET(reg) BSP_FLD32GET( reg, 12, 16 )

#define	ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z007s ( 0x03 )

#define	ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z012s ( 0x1c )

#define	ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z014s ( 0x08 )

#define	ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z010 ( 0x02 )

#define	ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z015 ( 0x1b )

#define	ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z020 ( 0x07 )

#define	ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z030 ( 0x0c )

#define	ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z035 ( 0x12 )

#define	ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z045 ( 0x11 )

#define	ZYNQ_SLCR_PSS_IDCODE_DEVICE_7z100 ( 0x16 )

#define	ZYNQ_SLCR_LVL_SHFTR_EN_DISABLE ( 0 )

#define	ZYNQ_SLCR_LVL_SHFTR_EN_PS_TO_PL ( 0xA )

#define	ZYNQ_SLCR_LVL_SHFTR_EN_ALL ( 0xF )

Detailed Description

SLCR register definitions.

Macros