smpbarrier.h

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/* SPDX-License-Identifier: BSD-2-Clause */
 
/*
 * Copyright (C) 2013, 2024 embedded brains GmbH & Co. KG
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef _RTEMS_SCORE_SMPBARRIER_H
#define _RTEMS_SCORE_SMPBARRIER_H
 
#include <rtems/score/cpuopts.h>
#include <rtems/score/atomic.h>
 
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
 
typedef struct {
  Atomic_Uint value;
  Atomic_Uint sense;
} SMP_barrier_Control;
 
typedef struct {
  unsigned int sense;
} SMP_barrier_State;
 
#define SMP_BARRIER_CONTROL_INITIALIZER \
  { ATOMIC_INITIALIZER_UINT( 0U ), ATOMIC_INITIALIZER_UINT( 0U ) }
 
#define SMP_BARRIER_STATE_INITIALIZER { 0U }
 
static inline void _SMP_barrier_Control_initialize(
  SMP_barrier_Control *control
)
{
  _Atomic_Init_uint( &control->value, 0U );
  _Atomic_Init_uint( &control->sense, 0U );
}
 
static inline void _SMP_barrier_State_initialize(
  SMP_barrier_State *state
)
{
  state->sense = 0U;
}
 
bool _SMP_barrier_Wait(
  SMP_barrier_Control *control,
  SMP_barrier_State *state,
  unsigned int count
);
 
static inline void _SMP_barrier_Wait_for_other(
  const SMP_barrier_Control *control,
  unsigned int count
)
{
  unsigned int value;
 
  do {
    value = _Atomic_Load_uint( &control->value, ATOMIC_ORDER_ACQUIRE );
  } while ( value != count );
}
 
#ifdef __cplusplus
}
#endif /* __cplusplus */
 
#endif /* _RTEMS_SCORE_SMPBARRIER_H */