RTEMS
6.1-rc6
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bsps
sh
gensh4
include
sh
sh4uart.h
1
/*
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* Generic UART Serial driver for SH-4 processors definitions
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*
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* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russian Fed.
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* Author: Alexandra Kossovsky <sasha@oktet.ru>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef __SH4UART_H__
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#define __SH4UART_H__
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#include <rtems/score/sh7750_regs.h>
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/*
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* Define this to work from gdb stub
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*/
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/* FIXME: This is BSP-specific */
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#define SH4_WITH_IPL
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#define SH4_SCI 1
/* Serial Communication Interface - SCI */
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#define SH4_SCIF 2
/* Serial Communication Interface with FIFO - SCIF */
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#define TRANSMIT_TRIGGER_VALUE(ttrg) ((ttrg) == SH7750_SCFCR2_RTRG_1 ? 1 : \
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(ttrg) == SH7750_SCFCR2_RTRG_4 ? 4 : \
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(ttrg) == SH7750_SCFCR2_RTRG_8 ? 8 : 14)
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/*
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* Macros to call UART registers
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*/
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#define SCRDR(n) (*(volatile uint8_t*)SH7750_SCRDR(n))
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#define SCRDR1 SCRDR(1)
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#define SCRDR2 SCRDR(2)
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#define SCTDR(n) (*(volatile uint8_t*)SH7750_SCTDR(n))
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#define SCTDR1 SCTDR(1)
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#define SCTDR2 SCTDR(2)
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#define SCSMR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSMR1 : \
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*(volatile uint16_t*)SH7750_SCSMR2)
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#define SCSMR1 SCSMR(1)
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#define SCSMR2 SCSMR(2)
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#define SCSCR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSCR1 : \
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*(volatile uint16_t*)SH7750_SCSCR2)
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#define SCSCR1 SCSCR(1)
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#define SCSCR2 SCSCR(2)
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#define SCSSR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSSR1 : \
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*(volatile uint16_t*)SH7750_SCSSR2)
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#define SCSSR1 SCSSR(1)
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#define SCSSR2 SCSSR(2)
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#define SCSPTR1 (*(volatile uint8_t*)SH7750_SCSPTR1)
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#define SCSPTR2 (*(volatile uint16_t*)SH7750_SCSPTR2)
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#define SCBRR(n) (*(volatile uint8_t*)SH7750_SCBRR(n))
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#define SCBRR1 SCBRR(1)
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#define SCBRR2 SCBRR(2)
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#define SCFCR2 (*(volatile uint16_t*)SH7750_SCFCR2)
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#define SCFDR2 (*(volatile uint16_t*)SH7750_SCFDR2)
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#define SCLSR2 (*(volatile uint16_t*)SH7750_SCLSR2)
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#define IPRB (*(volatile uint16_t*)SH7750_IPRB)
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#define IPRC (*(volatile uint16_t*)SH7750_IPRC)
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/*
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* The following structure is a descriptor of single UART channel.
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* It contains the initialization information about channel and
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* current operating values
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*/
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typedef
struct
sh4uart
{
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uint8_t chn;
/* UART channel number */
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uint8_t int_driven;
/* UART interrupt vector number, or
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0 if polled I/O */
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void
*tty;
/* termios channel descriptor */
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volatile
const
char
*tx_buf;
/* Transmit buffer from termios */
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volatile
uint32_t tx_buf_len;
/* Transmit buffer length */
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volatile
uint32_t tx_ptr;
/* Index of next char to transmit*/
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rtems_isr_entry
old_handler_transmit;
/* Saved interrupt handlers */
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rtems_isr_entry
old_handler_receive;
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tcflag_t c_iflag;
/* termios input mode flags */
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bool
parerr_mark_flag;
/* Parity error processing state */
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}
sh4uart
;
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/*
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* Functions from sh4uart.c
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*/
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/* sh4uart_init --
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* This function verifies the input parameters and perform initialization
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* of the Motorola Coldfire on-chip UART descriptor structure.
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*
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*/
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rtems_status_code
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sh4uart_init(
sh4uart
*uart,
void
*tty,
int
chn,
int
int_driven);
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/* sh4uart_reset --
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* This function perform the hardware initialization of Motorola
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* Coldfire processor on-chip UART controller using parameters
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* filled by the sh4uart_init function.
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*/
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rtems_status_code
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sh4uart_reset(
sh4uart
*uart);
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/* sh4uart_disable --
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* This function disable the operations on Motorola Coldfire UART
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* controller
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*/
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rtems_status_code
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sh4uart_disable(
sh4uart
*uart,
int
disable_port);
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/* sh4uart_set_attributes --
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* This function parse the termios attributes structure and perform
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* the appropriate settings in hardware.
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*/
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rtems_status_code
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sh4uart_set_attributes(
sh4uart
*mcf,
const
struct
termios *t);
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/* sh4uart_poll_read --
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* This function tried to read character from MCF UART and perform
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* error handling.
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*/
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int
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sh4uart_poll_read(
sh4uart
*uart);
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#ifdef SH4_WITH_IPL
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/* ipl_console_poll_read --
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* This function tried to read character from MCF UART over SH-IPL.
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*/
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int
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ipl_console_poll_read(
int
minor);
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/* sh4uart_interrupt_write --
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* This function initiate transmitting of the buffer in interrupt mode.
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*/
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rtems_status_code
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sh4uart_interrupt_write(
sh4uart
*uart,
const
char
*buf,
int
len);
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/* sh4uart_poll_write --
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* This function transmit buffer byte-by-byte in polling mode.
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*/
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int
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sh4uart_poll_write(
sh4uart
*uart,
const
char
*buf,
int
len);
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/* ipl_console_poll_write --
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* This function transmit buffer byte-by-byte in polling mode over SH-IPL.
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*/
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int
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ipl_console_poll_write(
int
minor,
const
char
*buf,
int
len);
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/*
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* ipl_finish --
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* Says gdb that program finished to get out from it.
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*/
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extern
void
ipl_finish(
void
);
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#endif
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/* sh4uart_stop_remote_tx --
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* This function stop data flow from remote device.
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*/
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rtems_status_code
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sh4uart_stop_remote_tx(
sh4uart
*uart);
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/* sh4uart_start_remote_tx --
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* This function resume data flow from remote device.
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*/
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rtems_status_code
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sh4uart_start_remote_tx(
sh4uart
*uart);
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/* Descriptor structures for two on-chip UART channels */
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extern
sh4uart
sh4_uarts[2];
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#endif
rtems_isr_entry
ISR_Handler_entry rtems_isr_entry
Interrupt service routines installed by rtems_interrupt_catch() shall have this type.
Definition:
intr.h:134
rtems_status_code
rtems_status_code
This enumeration provides status codes for directives of the Classic API.
Definition:
status.h:85
sh4uart
Definition:
sh4uart.h:69
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