RTEMS 6.1-rc6
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reg_rtp.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/* The header file is generated by make_header.py from RTP.json */
12/* Current script's version can be found at: */
13/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
14
15/*
16 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
17 *
18 * Czech Technical University in Prague
19 * Zikova 1903/4
20 * 166 36 Praha 6
21 * Czech Republic
22 *
23 * All rights reserved.
24 *
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions are met:
27 *
28 * 1. Redistributions of source code must retain the above copyright notice, this
29 * list of conditions and the following disclaimer.
30 * 2. Redistributions in binary form must reproduce the above copyright notice,
31 * this list of conditions and the following disclaimer in the documentation
32 * and/or other materials provided with the distribution.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
35 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
36 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
38 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
39 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
40 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
41 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
42 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
43 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 *
45 * The views and conclusions contained in the software and documentation are those
46 * of the authors and should not be interpreted as representing official policies,
47 * either expressed or implied, of the FreeBSD Project.
48*/
49#ifndef LIBBSP_ARM_TMS570_RTP
50#define LIBBSP_ARM_TMS570_RTP
51
52#include <bsp/utility.h>
53
54typedef struct{
55 uint32_t GLBCTRL; /*RTP Global Control Register*/
56 uint32_t TRENA; /*RTP Trace Enable Register*/
57 uint32_t GSR; /*RTP Global Status Register*/
58 uint32_t RAM1REG1; /*RTP RAM 1 Trace Region 1 Register*/
59 uint32_t RAM1REG2; /*RTP RAM 1 Trace Region 2 Register*/
60 uint32_t RAM2REG1; /*RTP RAM 2 Trace Region 1 Register*/
61 uint32_t RAM2REG2; /*RTP RAM 2 Trace Region 2 Register*/
62 uint8_t reserved1 [8];
63 uint32_t PERREG1; /*RTP Peripheral Trace Region 1 Register*/
64 uint32_t PERREG2; /*RTP Peripheral Trace Region 2 Register*/
65 uint32_t DDMW; /*RTP Direct Data Mode Write Register*/
66 uint8_t reserved2 [4];
67 uint32_t PC0; /*RTP Pin Control 0 Register*/
68 uint32_t PC1; /*RTP Pin Control 1 Register*/
69 uint32_t PC2; /*RTP Pin Control 2 Register*/
70 uint32_t PC3; /*RTP Pin Control 3 Register*/
71 uint32_t PC4; /*RTP Pin Control 4 Register*/
72 uint32_t PC5; /*RTP Pin Control 5 Register*/
73 uint32_t PC6; /*RTP Pin Control 6 Register*/
74 uint32_t PC7; /*RTP Pin Control 7 Register*/
75 uint32_t PC8; /*RTP Pin Control 8 Register*/
77
78
79/*---------------------TMS570_RTP_GLBCTRL---------------------*/
80/* field: TEST - By setting the bit, the FIFO RAM will be mapped into the SYSTEM Peripheral frame starting at */
81#define TMS570_RTP_GLBCTRL_TEST BSP_BIT32(24)
82
83/* field: PRESCALER - The prescaler divides HCLK down to the desired RTPCLK frequency. */
84#define TMS570_RTP_GLBCTRL_PRESCALER(val) BSP_FLD32(val,16, 18)
85#define TMS570_RTP_GLBCTRL_PRESCALER_GET(reg) BSP_FLD32GET(reg,16, 18)
86#define TMS570_RTP_GLBCTRL_PRESCALER_SET(reg,val) BSP_FLD32SET(reg, val,16, 18)
87
88/* field: DDM_WIDTH - Direct data mode word size width. */
89#define TMS570_RTP_GLBCTRL_DDM_WIDTH(val) BSP_FLD32(val,12, 13)
90#define TMS570_RTP_GLBCTRL_DDM_WIDTH_GET(reg) BSP_FLD32GET(reg,12, 13)
91#define TMS570_RTP_GLBCTRL_DDM_WIDTH_SET(reg,val) BSP_FLD32SET(reg, val,12, 13)
92
93/* field: DDM_RW - */
94#define TMS570_RTP_GLBCTRL_DDM_RW BSP_BIT32(11)
95
96/* field: TM_DDM - Trace Mode or Direct Data Mode */
97#define TMS570_RTP_GLBCTRL_TM_DDM BSP_BIT32(10)
98
99/* field: PW - Port width. This bit field configures the RTP to the desired port width. */
100#define TMS570_RTP_GLBCTRL_PW(val) BSP_FLD32(val,8, 9)
101#define TMS570_RTP_GLBCTRL_PW_GET(reg) BSP_FLD32GET(reg,8, 9)
102#define TMS570_RTP_GLBCTRL_PW_SET(reg,val) BSP_FLD32SET(reg, val,8, 9)
103
104/* field: RESET - This bit resets the state machine and the registers to their reset value. */
105#define TMS570_RTP_GLBCTRL_RESET BSP_BIT32(7)
106
107/* field: CONTCLK - Continuous RTPCLK enable. */
108#define TMS570_RTP_GLBCTRL_CONTCLK BSP_BIT32(6)
109
110/* field: HOVF - Halt on overflow. */
111#define TMS570_RTP_GLBCTRL_HOVF BSP_BIT32(5)
112
113/* field: INV_RGN - Trace inside or outside of defined trace regions. */
114#define TMS570_RTP_GLBCTRL_INV_RGN BSP_BIT32(4)
115
116/* field: ON_OFF - ON/Off switch. */
117#define TMS570_RTP_GLBCTRL_ON_OFF(val) BSP_FLD32(val,0, 3)
118#define TMS570_RTP_GLBCTRL_ON_OFF_GET(reg) BSP_FLD32GET(reg,0, 3)
119#define TMS570_RTP_GLBCTRL_ON_OFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
120
121
122/*----------------------TMS570_RTP_TRENA----------------------*/
123/* field: ENA4 - Enable tracing for peripherals. */
124#define TMS570_RTP_TRENA_ENA4 BSP_BIT32(24)
125
126/* field: ENA2 - Enable tracing for RAM block 2. */
127#define TMS570_RTP_TRENA_ENA2 BSP_BIT32(8)
128
129/* field: ENA1 - */
130#define TMS570_RTP_TRENA_ENA1 BSP_BIT32(0)
131
132
133/*-----------------------TMS570_RTP_GSR-----------------------*/
134/* field: EMPTYSER - Serializer empty. This bit determines if there is data left in the serializer. */
135#define TMS570_RTP_GSR_EMPTYSER BSP_BIT32(12)
136
137/* field: EMPTYPER - Peripheral FIFO empty. This bit determines if there are entries left in the FIFO. */
138#define TMS570_RTP_GSR_EMPTYPER BSP_BIT32(11)
139
140/* field: EMPTY2 - RAM block 2 FIFO empty. This bit determines if there are entries left in the FIFO. */
141#define TMS570_RTP_GSR_EMPTY2 BSP_BIT32(9)
142
143/* field: EMPTY1 - RAM block 1 FIFO empty. This bit determines if there are entries left in the FIFO. */
144#define TMS570_RTP_GSR_EMPTY1 BSP_BIT32(8)
145
146/* field: OVFPER - Overflow peripheral FIFO. */
147#define TMS570_RTP_GSR_OVFPER BSP_BIT32(3)
148
149/* field: OVF2 - Overflow RAM block 2 FIFO. */
150#define TMS570_RTP_GSR_OVF2 BSP_BIT32(1)
151
152/* field: OVF1 - Overflow RAM block 1 FIFO. */
153#define TMS570_RTP_GSR_OVF1 BSP_BIT32(0)
154
155
156/*--------------------TMS570_RTP_RAM1REGx--------------------*/
157/* field: CPU_DMA - CPU and/or other master access. */
158#define TMS570_RTP_RAM1REGx_CPU_DMA(val) BSP_FLD32(val,29, 30)
159#define TMS570_RTP_RAM1REGx_CPU_DMA_GET(reg) BSP_FLD32GET(reg,29, 30)
160#define TMS570_RTP_RAM1REGx_CPU_DMA_SET(reg,val) BSP_FLD32SET(reg, val,29, 30)
161
162/* field: RW - Read/Write. */
163#define TMS570_RTP_RAM1REGx_RW BSP_BIT32(28)
164
165/* field: BLOCKSIZE - These bits define the length of the trace region. */
166#define TMS570_RTP_RAM1REGx_BLOCKSIZE(val) BSP_FLD32(val,24, 27)
167#define TMS570_RTP_RAM1REGx_BLOCKSIZE_GET(reg) BSP_FLD32GET(reg,24, 27)
168#define TMS570_RTP_RAM1REGx_BLOCKSIZE_SET(reg,val) BSP_FLD32SET(reg, val,24, 27)
169
170/* field: STARTADDR - These bits define the starting address of the address region that should be traced. */
171#define TMS570_RTP_RAM1REGx_STARTADDR(val) BSP_FLD32(val,0, 17)
172#define TMS570_RTP_RAM1REGx_STARTADDR_GET(reg) BSP_FLD32GET(reg,0, 17)
173#define TMS570_RTP_RAM1REGx_STARTADDR_SET(reg,val) BSP_FLD32SET(reg, val,0, 17)
174
175
176/*--------------------TMS570_RTP_RAM2REGx--------------------*/
177/* field: CPU_DMA - CPU and/or other master access. */
178#define TMS570_RTP_RAM2REGx_CPU_DMA(val) BSP_FLD32(val,29, 30)
179#define TMS570_RTP_RAM2REGx_CPU_DMA_GET(reg) BSP_FLD32GET(reg,29, 30)
180#define TMS570_RTP_RAM2REGx_CPU_DMA_SET(reg,val) BSP_FLD32SET(reg, val,29, 30)
181
182/* field: RW - Read/Write. */
183#define TMS570_RTP_RAM2REGx_RW BSP_BIT32(28)
184
185/* field: BLOCKSIZE - These bits define the length of the trace region. */
186#define TMS570_RTP_RAM2REGx_BLOCKSIZE(val) BSP_FLD32(val,24, 27)
187#define TMS570_RTP_RAM2REGx_BLOCKSIZE_GET(reg) BSP_FLD32GET(reg,24, 27)
188#define TMS570_RTP_RAM2REGx_BLOCKSIZE_SET(reg,val) BSP_FLD32SET(reg, val,24, 27)
189
190/* field: STARTADDR - These bits define the starting address of the address region that should be traced. */
191#define TMS570_RTP_RAM2REGx_STARTADDR(val) BSP_FLD32(val,0, 23)
192#define TMS570_RTP_RAM2REGx_STARTADDR_GET(reg) BSP_FLD32GET(reg,0, 23)
193#define TMS570_RTP_RAM2REGx_STARTADDR_SET(reg,val) BSP_FLD32SET(reg, val,0, 23)
194
195
196/*---------------------TMS570_RTP_PERREGx---------------------*/
197/* field: CPU_DMA - CPU and/or other master access. */
198#define TMS570_RTP_PERREGx_CPU_DMA(val) BSP_FLD32(val,29, 30)
199#define TMS570_RTP_PERREGx_CPU_DMA_GET(reg) BSP_FLD32GET(reg,29, 30)
200#define TMS570_RTP_PERREGx_CPU_DMA_SET(reg,val) BSP_FLD32SET(reg, val,29, 30)
201
202/* field: RW - Read/Write. */
203#define TMS570_RTP_PERREGx_RW BSP_BIT32(28)
204
205/* field: BLOCKSIZE - These bits define the length of the trace region. */
206#define TMS570_RTP_PERREGx_BLOCKSIZE(val) BSP_FLD32(val,24, 27)
207#define TMS570_RTP_PERREGx_BLOCKSIZE_GET(reg) BSP_FLD32GET(reg,24, 27)
208#define TMS570_RTP_PERREGx_BLOCKSIZE_SET(reg,val) BSP_FLD32SET(reg, val,24, 27)
209
210/* field: STARTADDR - These bits define the starting address of the address region that should be traced. */
211#define TMS570_RTP_PERREGx_STARTADDR(val) BSP_FLD32(val,0, 23)
212#define TMS570_RTP_PERREGx_STARTADDR_GET(reg) BSP_FLD32GET(reg,0, 23)
213#define TMS570_RTP_PERREGx_STARTADDR_SET(reg,val) BSP_FLD32SET(reg, val,0, 23)
214
215
216/*----------------------TMS570_RTP_DDMW----------------------*/
217/* field: DATA - This register must be written to in a Direct Data Mode write operation to store the data into */
218/* Whole 32 bits */
219
220/*-----------------------TMS570_RTP_PCx-----------------------*/
221/* field: ENAFUNC - Functional mode of RTPENA pin. */
222#define TMS570_RTP_PCx_ENAFUNC BSP_BIT32(18)
223
224/* field: CLKFUNC - Functional mode of RTPCLK pin. */
225#define TMS570_RTP_PCx_CLKFUNC BSP_BIT32(17)
226
227/* field: SYNCFUNC - Functional mode of RTPSYNC pin. */
228#define TMS570_RTP_PCx_SYNCFUNC BSP_BIT32(16)
229
230/* field: DATAFUNC - Functional mode of RTPDATA[15:0] pins. */
231#define TMS570_RTP_PCx_DATAFUNC(val) BSP_FLD32(val,0, 15)
232#define TMS570_RTP_PCx_DATAFUNC_GET(reg) BSP_FLD32GET(reg,0, 15)
233#define TMS570_RTP_PCx_DATAFUNC_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
234
235
236
237#endif /* LIBBSP_ARM_TMS570_RTP */
This header file provides utility macros for BSPs.
Definition: reg_rtp.h:54