RTEMS 6.1-rc6
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reg_pbist.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/* The header file is generated by make_header.py from PBIST.json */
12/* Current script's version can be found at: */
13/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
14
15/*
16 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
17 *
18 * Czech Technical University in Prague
19 * Zikova 1903/4
20 * 166 36 Praha 6
21 * Czech Republic
22 *
23 * All rights reserved.
24 *
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions are met:
27 *
28 * 1. Redistributions of source code must retain the above copyright notice, this
29 * list of conditions and the following disclaimer.
30 * 2. Redistributions in binary form must reproduce the above copyright notice,
31 * this list of conditions and the following disclaimer in the documentation
32 * and/or other materials provided with the distribution.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
35 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
36 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
38 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
39 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
40 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
41 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
42 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
43 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 *
45 * The views and conclusions contained in the software and documentation are those
46 * of the authors and should not be interpreted as representing official policies,
47 * either expressed or implied, of the FreeBSD Project.
48*/
49#ifndef LIBBSP_ARM_TMS570_PBIST
50#define LIBBSP_ARM_TMS570_PBIST
51
52#include <bsp/utility.h>
53
54typedef struct{
55 uint32_t DNW[88]; /*Reserved DO NOT WRITE*/
56 uint32_t RAMT; /*RAM Configuration Register*/
57 uint32_t DLR; /*Datalogger Register*/
58 uint8_t reserved1 [24];
59 uint32_t PACT; /*PBIST Activate/ROM Clock Enable Register*/
60 uint32_t PBISTID; /*PBIST ID Register*/
61 uint32_t OVER; /*Override Register*/
62 uint8_t reserved2 [4];
63 uint32_t FSRF0; /*Fail Status Fail Register 0*/
64 uint8_t reserved3 [4];
65 uint32_t FSRC0; /*Fail Status Count Register 0*/
66 uint32_t FSRC1; /*Fail Status Count Register 1*/
67 uint32_t FSRA0; /*Fail Status Address 0 Register*/
68 uint32_t FSRA1; /*Fail Status Address 1 Register*/
69 uint32_t FSRDL0; /*Fail Status Data Register 0*/
70 uint8_t reserved4 [4];
71 uint32_t FSRDL1; /*Fail Status Data Register 1*/
72 uint8_t reserved5 [12];
73 uint32_t ROM; /*ROM Mask Register*/
74 uint32_t ALGO; /*ROM Algorithm Mask Register*/
75 uint32_t RINFOL; /*RAM Info Mask Lower Register*/
76 uint32_t RINFOUL; /*RAM Info Mask Lower Register*/
78
79
80/*----------------------TMS570_PBIST_DNW----------------------*/
81/* field: Reserved - Do not write */
82/* Whole 32 bits */
83
84/*---------------------TMS570_PBIST_RAMT---------------------*/
85/* field: RGS - Ram Group Select. Refer Table 2-5 for information on the RGS value for each memory. */
86#define TMS570_PBIST_RAMT_RGS(val) BSP_FLD32(val,24, 31)
87#define TMS570_PBIST_RAMT_RGS_GET(reg) BSP_FLD32GET(reg,24, 31)
88#define TMS570_PBIST_RAMT_RGS_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
89
90/* field: RDS - Return Data Select. Refer Table 2-5 for information on the RDS values for each memory. */
91#define TMS570_PBIST_RAMT_RDS(val) BSP_FLD32(val,16, 23)
92#define TMS570_PBIST_RAMT_RDS_GET(reg) BSP_FLD32GET(reg,16, 23)
93#define TMS570_PBIST_RAMT_RDS_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
94
95/* field: DWR - Data Width Register */
96#define TMS570_PBIST_RAMT_DWR(val) BSP_FLD32(val,8, 15)
97#define TMS570_PBIST_RAMT_DWR_GET(reg) BSP_FLD32GET(reg,8, 15)
98#define TMS570_PBIST_RAMT_DWR_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
99
100/* field: SMS - Sense Margin Select Register */
101#define TMS570_PBIST_RAMT_SMS(val) BSP_FLD32(val,6, 7)
102#define TMS570_PBIST_RAMT_SMS_GET(reg) BSP_FLD32GET(reg,6, 7)
103#define TMS570_PBIST_RAMT_SMS_SET(reg,val) BSP_FLD32SET(reg, val,6, 7)
104
105/* field: PLS - Pipeline Latency Select */
106#define TMS570_PBIST_RAMT_PLS(val) BSP_FLD32(val,2, 5)
107#define TMS570_PBIST_RAMT_PLS_GET(reg) BSP_FLD32GET(reg,2, 5)
108#define TMS570_PBIST_RAMT_PLS_SET(reg,val) BSP_FLD32SET(reg, val,2, 5)
109
110/* field: RLS - RAM Latency Select */
111#define TMS570_PBIST_RAMT_RLS(val) BSP_FLD32(val,0, 1)
112#define TMS570_PBIST_RAMT_RLS_GET(reg) BSP_FLD32GET(reg,0, 1)
113#define TMS570_PBIST_RAMT_RLS_SET(reg,val) BSP_FLD32SET(reg, val,0, 1)
114
115
116/*----------------------TMS570_PBIST_DLR----------------------*/
117/* field: DLR4 - Config access: setting this bit allows the host processor to configure the PBIST controller registers */
118#define TMS570_PBIST_DLR_DLR4 BSP_BIT32(4)
119
120/* field: DLR2 - ROM-based testing: setting this bit enables the PBIST controller to execute test algorithms that are */
121#define TMS570_PBIST_DLR_DLR2 BSP_BIT32(2)
122
123
124/*---------------------TMS570_PBIST_PACT---------------------*/
125/* field: PACT1 - PBIST Activate */
126#define TMS570_PBIST_PACT_PACT1 BSP_BIT32(1)
127
128/* field: PACT0 - ROM Clock Enable Register */
129#define TMS570_PBIST_PACT_PACT0 BSP_BIT32(0)
130
131
132/*--------------------TMS570_PBIST_PBISTID--------------------*/
133/* field: PBIST_ID - This is a unique ID assigned to each PBIST controller in a device with multiple PBIST controllers. */
134#define TMS570_PBIST_PBISTID_PBIST_ID(val) BSP_FLD32(val,0, 7)
135#define TMS570_PBIST_PBISTID_PBIST_ID_GET(reg) BSP_FLD32GET(reg,0, 7)
136#define TMS570_PBIST_PBISTID_PBIST_ID_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
137
138
139/*---------------------TMS570_PBIST_OVER---------------------*/
140/* field: OVER0 - RINFO Override Bit */
141#define TMS570_PBIST_OVER_OVER0 BSP_BIT32(0)
142
143
144/*---------------------TMS570_PBIST_FSRF0---------------------*/
145/* field: FSRF0 - Fail Status 0. */
146#define TMS570_PBIST_FSRF0_FSRF0 BSP_BIT32(0)
147
148
149/*---------------------TMS570_PBIST_FSRC0---------------------*/
150/* field: FSRC0 - Fail Status Count 0. Indicates the number of failures on port 0. */
151#define TMS570_PBIST_FSRC0_FSRC0(val) BSP_FLD32(val,0, 7)
152#define TMS570_PBIST_FSRC0_FSRC0_GET(reg) BSP_FLD32GET(reg,0, 7)
153#define TMS570_PBIST_FSRC0_FSRC0_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
154
155
156/*---------------------TMS570_PBIST_FSRC1---------------------*/
157/* field: FSRC1 - Fail Status Count 1. Indicates the number of failures on port 1. */
158#define TMS570_PBIST_FSRC1_FSRC1(val) BSP_FLD32(val,0, 7)
159#define TMS570_PBIST_FSRC1_FSRC1_GET(reg) BSP_FLD32GET(reg,0, 7)
160#define TMS570_PBIST_FSRC1_FSRC1_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
161
162
163/*---------------------TMS570_PBIST_FSRA0---------------------*/
164/* field: FSRA0 - Fail Status Address 0. Contains the address of the first failure. */
165#define TMS570_PBIST_FSRA0_FSRA0(val) BSP_FLD32(val,0, 15)
166#define TMS570_PBIST_FSRA0_FSRA0_GET(reg) BSP_FLD32GET(reg,0, 15)
167#define TMS570_PBIST_FSRA0_FSRA0_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
168
169
170/*---------------------TMS570_PBIST_FSRA1---------------------*/
171/* field: FSRA1 - Fail Status Address 1. Contains the address of the first failure. */
172#define TMS570_PBIST_FSRA1_FSRA1(val) BSP_FLD32(val,0, 15)
173#define TMS570_PBIST_FSRA1_FSRA1_GET(reg) BSP_FLD32GET(reg,0, 15)
174#define TMS570_PBIST_FSRA1_FSRA1_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
175
176
177/*--------------------TMS570_PBIST_FSRDL0--------------------*/
178/* field: FSRDL1 - Failure data on port 1 */
179/* Whole 32 bits */
180
181/*--------------------TMS570_PBIST_FSRDL1--------------------*/
182/* field: FSRDL1 - Failure data on port 1 */
183/* Whole 32 bits */
184
185/*----------------------TMS570_PBIST_ROM----------------------*/
186/* field: ROM - ROM Mask */
187#define TMS570_PBIST_ROM_ROM(val) BSP_FLD32(val,0, 1)
188#define TMS570_PBIST_ROM_ROM_GET(reg) BSP_FLD32GET(reg,0, 1)
189#define TMS570_PBIST_ROM_ROM_SET(reg,val) BSP_FLD32SET(reg, val,0, 1)
190
191
192/*---------------------TMS570_PBIST_ALGO---------------------*/
193/* field: ROM_ALG_MASK - Each bit corresponds to a specific algorithm */
194/* Whole 32 bits */
195
196/*--------------------TMS570_PBIST_RINFOL--------------------*/
197/* field: RAM_ALG_MASK_LOW - Each bit corresponds to a specific algorithm */
198/* Whole 32 bits */
199
200/*--------------------TMS570_PBIST_RINFOUL--------------------*/
201/* field: RAM_ALG_MASK_UP - Each bit corresponds to a specific algorithm */
202/* Whole 32 bits */
203
204
205#endif /* LIBBSP_ARM_TMS570_PBIST */
This header file provides utility macros for BSPs.
Definition: reg_pbist.h:54