RTEMS 6.1-rc6
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reg_i2c.h
Go to the documentation of this file.
1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/* The header file is generated by make_header.py from I2C.json */
12/* Current script's version can be found at: */
13/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
14
15/*
16 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
17 *
18 * Czech Technical University in Prague
19 * Zikova 1903/4
20 * 166 36 Praha 6
21 * Czech Republic
22 *
23 * All rights reserved.
24 *
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions are met:
27 *
28 * 1. Redistributions of source code must retain the above copyright notice, this
29 * list of conditions and the following disclaimer.
30 * 2. Redistributions in binary form must reproduce the above copyright notice,
31 * this list of conditions and the following disclaimer in the documentation
32 * and/or other materials provided with the distribution.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
35 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
36 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
38 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
39 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
40 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
41 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
42 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
43 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 *
45 * The views and conclusions contained in the software and documentation are those
46 * of the authors and should not be interpreted as representing official policies,
47 * either expressed or implied, of the FreeBSD Project.
48*/
49#ifndef LIBBSP_ARM_TMS570_I2C
50#define LIBBSP_ARM_TMS570_I2C
51
52#include <bsp/utility.h>
53
54typedef struct{
55 uint32_t OAR; /*I2C Own Address Manager*/
56 uint32_t IMR; /*I2C Interupt Mask Register*/
57 uint32_t STR; /*I2C Status Register*/
58 uint32_t CKL; /*I2C Clock Divider Low Register*/
59 uint32_t CKH; /*I2C Clock Control High Register*/
60 uint32_t CNT; /*I2C Data Count Register*/
61 uint32_t DRR; /*I2C Data Receive Register*/
62 uint32_t SAR; /*I2C Slave Address Register*/
63 uint32_t DXR; /*I2C Data Transmit Register*/
64 uint32_t MDR; /*I2C Mode Register*/
65 uint32_t IVR; /*I2C Interrupt Vector Register*/
66 uint32_t EMDR; /*I2C Extended Mode Register*/
67 uint32_t PSC; /*I2C Prescale Register*/
68 uint32_t PID11; /*I2C Peripheral ID Register 1*/
69 uint32_t PID12; /*I2C Peripheral ID Register 2*/
70 uint32_t DMACR; /*I2C DMA Control Register*/
71 uint8_t reserved1 [8];
72 uint32_t PFNC; /*I2C Pin Function Register*/
73 uint32_t DIR; /*I2C Pin Direction Register*/
74 uint32_t DIN; /*I2C Data Input Register*/
75 uint32_t DOUT; /*I2C Data Output Register*/
76 uint32_t SET; /*I2C Data Set Register*/
77 uint32_t CLR; /*I2C Data Clear Register*/
78 uint32_t PDR; /*I2C Pin Open Drain Register*/
79 uint32_t PDIS; /*I2C Pull Disable Register*/
80 uint32_t PSEL; /*I2C Pull Select Register*/
81 uint32_t pSRS; /*I2C Pins Slew Rate Select Register*/
83
84
85/*-----------------------TMS570_I2C_OAR-----------------------*/
86/* field: OA - Own address */
87#define TMS570_I2C_OAR_OA(val) BSP_FLD32(val,0, 9)
88#define TMS570_I2C_OAR_OA_GET(reg) BSP_FLD32GET(reg,0, 9)
89#define TMS570_I2C_OAR_OA_SET(reg,val) BSP_FLD32SET(reg, val,0, 9)
90
91
92/*-----------------------TMS570_I2C_IMR-----------------------*/
93/* field: AASEN - Address As Slave Interrupt Enable */
94#define TMS570_I2C_IMR_AASEN BSP_BIT32(6)
95
96/* field: SCDEN - Stop Condition Interrupt Enable */
97#define TMS570_I2C_IMR_SCDEN BSP_BIT32(5)
98
99/* field: TXRDYEN - Transmit Data Ready Interrupt Enable */
100#define TMS570_I2C_IMR_TXRDYEN BSP_BIT32(4)
101
102/* field: RXRDYEN - Receive Data Ready Interrupt Enable */
103#define TMS570_I2C_IMR_RXRDYEN BSP_BIT32(3)
104
105/* field: ARDYEN - Register Access Ready Interrupt Enable */
106#define TMS570_I2C_IMR_ARDYEN BSP_BIT32(2)
107
108/* field: NACKEN - No Acknowledgement Interrupt Enable */
109#define TMS570_I2C_IMR_NACKEN BSP_BIT32(1)
110
111/* field: ALEN - Arbitration Lost Interrupt Enable */
112#define TMS570_I2C_IMR_ALEN BSP_BIT32(0)
113
114
115/*-----------------------TMS570_I2C_STR-----------------------*/
116/* field: SDIR - Slave direction */
117#define TMS570_I2C_STR_SDIR BSP_BIT32(14)
118
119/* field: NACKSNT - No acknowledge sent */
120#define TMS570_I2C_STR_NACKSNT BSP_BIT32(13)
121
122/* field: BB - Bus busy */
123#define TMS570_I2C_STR_BB BSP_BIT32(12)
124
125/* field: RSFULL - Receiver shift full */
126#define TMS570_I2C_STR_RSFULL BSP_BIT32(11)
127
128/* field: XSMT - XSMT */
129#define TMS570_I2C_STR_XSMT BSP_BIT32(10)
130
131/* field: AAS - Address as slave */
132#define TMS570_I2C_STR_AAS BSP_BIT32(9)
133
134/* field: AD0 - Address zero status */
135#define TMS570_I2C_STR_AD0 BSP_BIT32(8)
136
137/* field: SCD - SCD */
138#define TMS570_I2C_STR_SCD BSP_BIT32(5)
139
140/* field: TXRDY - Transmit data ready interrupt flag */
141#define TMS570_I2C_STR_TXRDY BSP_BIT32(4)
142
143/* field: RXRDY - Receive data ready interrupt flag */
144#define TMS570_I2C_STR_RXRDY BSP_BIT32(3)
145
146/* field: ARDY - Register access ready interrupt flag */
147#define TMS570_I2C_STR_ARDY BSP_BIT32(2)
148
149/* field: NACK - No acknowledgement interrupt */
150#define TMS570_I2C_STR_NACK BSP_BIT32(1)
151
152/* field: AL - Arbitration lost interrupt flag */
153#define TMS570_I2C_STR_AL BSP_BIT32(0)
154
155
156/*-----------------------TMS570_I2C_CKL-----------------------*/
157/* field: CLKL - Low time clock division factor */
158#define TMS570_I2C_CKL_CLKL(val) BSP_FLD32(val,0, 15)
159#define TMS570_I2C_CKL_CLKL_GET(reg) BSP_FLD32GET(reg,0, 15)
160#define TMS570_I2C_CKL_CLKL_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
161
162
163/*-----------------------TMS570_I2C_CKH-----------------------*/
164/* field: CLKH - High time clock division factor */
165#define TMS570_I2C_CKH_CLKH(val) BSP_FLD32(val,0, 15)
166#define TMS570_I2C_CKH_CLKH_GET(reg) BSP_FLD32GET(reg,0, 15)
167#define TMS570_I2C_CKH_CLKH_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
168
169
170/*-----------------------TMS570_I2C_CNT-----------------------*/
171/* field: CNT - Data counter */
172#define TMS570_I2C_CNT_CNT(val) BSP_FLD32(val,0, 15)
173#define TMS570_I2C_CNT_CNT_GET(reg) BSP_FLD32GET(reg,0, 15)
174#define TMS570_I2C_CNT_CNT_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
175
176
177/*-----------------------TMS570_I2C_DRR-----------------------*/
178/* field: DATARX - Receive data */
179#define TMS570_I2C_DRR_DATARX(val) BSP_FLD32(val,0, 7)
180#define TMS570_I2C_DRR_DATARX_GET(reg) BSP_FLD32GET(reg,0, 7)
181#define TMS570_I2C_DRR_DATARX_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
182
183
184/*-----------------------TMS570_I2C_SAR-----------------------*/
185/* field: SA - 7- or 10-bit programmable slave address */
186#define TMS570_I2C_SAR_SA(val) BSP_FLD32(val,0, 9)
187#define TMS570_I2C_SAR_SA_GET(reg) BSP_FLD32GET(reg,0, 9)
188#define TMS570_I2C_SAR_SA_SET(reg,val) BSP_FLD32SET(reg, val,0, 9)
189
190
191/*-----------------------TMS570_I2C_DXR-----------------------*/
192/* field: DATATX - Transmit data */
193#define TMS570_I2C_DXR_DATATX(val) BSP_FLD32(val,0, 7)
194#define TMS570_I2C_DXR_DATATX_GET(reg) BSP_FLD32GET(reg,0, 7)
195#define TMS570_I2C_DXR_DATATX_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
196
197
198/*-----------------------TMS570_I2C_MDR-----------------------*/
199/* field: NACKMOD - No-acknowledge (NACK) mode */
200#define TMS570_I2C_MDR_NACKMOD BSP_BIT32(15)
201
202/* field: FREE - Free running bit */
203#define TMS570_I2C_MDR_FREE BSP_BIT32(14)
204
205/* field: STT - Start condition */
206#define TMS570_I2C_MDR_STT BSP_BIT32(13)
207
208/* field: STP - Stop condition */
209#define TMS570_I2C_MDR_STP BSP_BIT32(11)
210
211/* field: MST - Master/slave mode bit */
212#define TMS570_I2C_MDR_MST BSP_BIT32(10)
213
214/* field: TRX - Transmit/receive bit */
215#define TMS570_I2C_MDR_TRX BSP_BIT32(9)
216
217/* field: XA - Expand address enable bit */
218#define TMS570_I2C_MDR_XA BSP_BIT32(8)
219
220/* field: RM - RM */
221#define TMS570_I2C_MDR_RM BSP_BIT32(7)
222
223/* field: DLB - Digital loop back enable bit */
224#define TMS570_I2C_MDR_DLB BSP_BIT32(6)
225
226/* field: nIRS - I2C reset enable bit */
227#define TMS570_I2C_MDR_nIRS BSP_BIT32(5)
228
229/* field: STB - Start byte mode enable bit (Master mode only) */
230#define TMS570_I2C_MDR_STB BSP_BIT32(4)
231
232/* field: FDF - Free data format enable bit */
233#define TMS570_I2C_MDR_FDF BSP_BIT32(3)
234
235/* field: BC - Bit count */
236#define TMS570_I2C_MDR_BC(val) BSP_FLD32(val,0, 2)
237#define TMS570_I2C_MDR_BC_GET(reg) BSP_FLD32GET(reg,0, 2)
238#define TMS570_I2C_MDR_BC_SET(reg,val) BSP_FLD32SET(reg, val,0, 2)
239
240
241/*-----------------------TMS570_I2C_IVR-----------------------*/
242/* field: TESTMD - Reserved for internal testing. */
243#define TMS570_I2C_IVR_TESTMD(val) BSP_FLD32(val,8, 11)
244#define TMS570_I2C_IVR_TESTMD_GET(reg) BSP_FLD32GET(reg,8, 11)
245#define TMS570_I2C_IVR_TESTMD_SET(reg,val) BSP_FLD32SET(reg, val,8, 11)
246
247/* field: INTCODE - Interrupt Code Bits */
248#define TMS570_I2C_IVR_INTCODE(val) BSP_FLD32(val,0, 2)
249#define TMS570_I2C_IVR_INTCODE_GET(reg) BSP_FLD32GET(reg,0, 2)
250#define TMS570_I2C_IVR_INTCODE_SET(reg,val) BSP_FLD32SET(reg, val,0, 2)
251
252
253/*----------------------TMS570_I2C_EMDR----------------------*/
254/* field: IGNACK - Ignore NACK mode */
255#define TMS570_I2C_EMDR_IGNACK BSP_BIT32(1)
256
257/* field: BCM - Backwards compatibility mode */
258#define TMS570_I2C_EMDR_BCM BSP_BIT32(0)
259
260
261/*-----------------------TMS570_I2C_PSC-----------------------*/
262/* field: PSC - Prescale */
263#define TMS570_I2C_PSC_PSC(val) BSP_FLD32(val,0, 7)
264#define TMS570_I2C_PSC_PSC_GET(reg) BSP_FLD32GET(reg,0, 7)
265#define TMS570_I2C_PSC_PSC_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
266
267
268/*----------------------TMS570_I2C_PID11----------------------*/
269/* field: CLASS - Peripheral class */
270#define TMS570_I2C_PID11_CLASS(val) BSP_FLD32(val,8, 15)
271#define TMS570_I2C_PID11_CLASS_GET(reg) BSP_FLD32GET(reg,8, 15)
272#define TMS570_I2C_PID11_CLASS_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
273
274/* field: REVISION - Revision level of the I2C */
275#define TMS570_I2C_PID11_REVISION(val) BSP_FLD32(val,0, 7)
276#define TMS570_I2C_PID11_REVISION_GET(reg) BSP_FLD32GET(reg,0, 7)
277#define TMS570_I2C_PID11_REVISION_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
278
279
280/*----------------------TMS570_I2C_PID12----------------------*/
281/* field: TYPE - Peripheral type */
282#define TMS570_I2C_PID12_TYPE(val) BSP_FLD32(val,0, 7)
283#define TMS570_I2C_PID12_TYPE_GET(reg) BSP_FLD32GET(reg,0, 7)
284#define TMS570_I2C_PID12_TYPE_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
285
286
287/*----------------------TMS570_I2C_DMACR----------------------*/
288/* field: TXDMAEN - Transmitter DMA enable */
289#define TMS570_I2C_DMACR_TXDMAEN BSP_BIT32(1)
290
291/* field: RXDMAEN - Receive DMA enable */
292#define TMS570_I2C_DMACR_RXDMAEN BSP_BIT32(0)
293
294
295/*----------------------TMS570_I2C_PFNC----------------------*/
296/* field: PINFUNC - SDA and SCL Pin Function */
297#define TMS570_I2C_PFNC_PINFUNC BSP_BIT32(0)
298
299
300/*-----------------------TMS570_I2C_DIR-----------------------*/
301/* field: SDADIR - SDA direction */
302#define TMS570_I2C_DIR_SDADIR BSP_BIT32(1)
303
304/* field: SCLDIR - SCL direction */
305#define TMS570_I2C_DIR_SCLDIR BSP_BIT32(0)
306
307
308/*-----------------------TMS570_I2C_DIN-----------------------*/
309/* field: SDAIN - Serial data in */
310#define TMS570_I2C_DIN_SDAIN BSP_BIT32(1)
311
312/* field: SCLIN - Serial clock data in */
313#define TMS570_I2C_DIN_SCLIN BSP_BIT32(0)
314
315
316/*----------------------TMS570_I2C_DOUT----------------------*/
317/* field: SDAOUT - SDA Data Output */
318#define TMS570_I2C_DOUT_SDAOUT BSP_BIT32(1)
319
320/* field: SCLOUT - SCL Data Output */
321#define TMS570_I2C_DOUT_SCLOUT BSP_BIT32(0)
322
323
324/*-----------------------TMS570_I2C_SET-----------------------*/
325/* field: SDASET - Serial Data Set */
326#define TMS570_I2C_SET_SDASET BSP_BIT32(1)
327
328/* field: SCLSET - Serial Clock Set */
329#define TMS570_I2C_SET_SCLSET BSP_BIT32(0)
330
331
332/*-----------------------TMS570_I2C_CLR-----------------------*/
333/* field: SDACLR - Serial Data Clear */
334#define TMS570_I2C_CLR_SDACLR BSP_BIT32(1)
335
336/* field: SCLCLR - Serial Clock Clear */
337#define TMS570_I2C_CLR_SCLCLR BSP_BIT32(0)
338
339
340/*-----------------------TMS570_I2C_PDR-----------------------*/
341/* field: SDAPDR - SDA pin open drain enable */
342#define TMS570_I2C_PDR_SDAPDR BSP_BIT32(1)
343
344/* field: SCLPDR - SCL pin open drain enable */
345#define TMS570_I2C_PDR_SCLPDR BSP_BIT32(0)
346
347
348/*----------------------TMS570_I2C_PDIS----------------------*/
349/* field: SDAPDIS - SDA pull disable */
350#define TMS570_I2C_PDIS_SDAPDIS BSP_BIT32(1)
351
352/* field: SCLPDIS - SCL pull disable */
353#define TMS570_I2C_PDIS_SCLPDIS BSP_BIT32(0)
354
355
356/*----------------------TMS570_I2C_PSEL----------------------*/
357/* field: SDAPSEL - SDA pull select */
358#define TMS570_I2C_PSEL_SDAPSEL BSP_BIT32(1)
359
360/* field: SCLPSEL - SCL pull select */
361#define TMS570_I2C_PSEL_SCLPSEL BSP_BIT32(0)
362
363
364/*----------------------TMS570_I2C_pSRS----------------------*/
365/* field: SDASRS - SDA Slew Rate select */
366#define TMS570_I2C_pSRS_SDASRS BSP_BIT32(1)
367
368/* field: SCLSRS - SCL Slew Rate select */
369#define TMS570_I2C_pSRS_SCLSRS BSP_BIT32(0)
370
371
372
373#endif /* LIBBSP_ARM_TMS570_I2C */
This header file provides utility macros for BSPs.
Definition: reg_i2c.h:54