RTEMS
6.1-rc6
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bsps
arm
tms570
include
bsp
ti_herc
reg_htu.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: BSD-2-Clause */
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/* The header file is generated by make_header.py from HTU.json */
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/* Current script's version can be found at: */
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/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
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/*
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* Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
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*
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* Czech Technical University in Prague
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* Zikova 1903/4
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* 166 36 Praha 6
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* Czech Republic
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are those
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* of the authors and should not be interpreted as representing official policies,
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* either expressed or implied, of the FreeBSD Project.
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*/
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#ifndef LIBBSP_ARM_TMS570_HTU
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#define LIBBSP_ARM_TMS570_HTU
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#include <
bsp/utility.h
>
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typedef
struct
{
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uint32_t GC;
/*Global Control Register*/
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uint32_t CPENA;
/*Control Packet Enable Register*/
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uint32_t BUSY0;
/*Control Packet Busy Register 0*/
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uint32_t BUSY1;
/*Control Packet Busy Register 1*/
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uint32_t BUSY2;
/*Control Packet Busy Register 2*/
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uint32_t BUSY3;
/*Control Packet Busy Register 3*/
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uint32_t ACPE;
/*Active Control Packet and Error Register*/
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uint8_t reserved1 [4];
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uint32_t RLBECTRL;
/*Request Lost and Bus Error Control Register*/
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uint32_t BFINTS;
/*Buffer Full Interrupt Enable Set Register*/
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uint32_t BFINTC;
/*Buffer Full Interrupt Enable Clear Register*/
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uint8_t reserved2 [8];
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uint32_t INTOFF0;
/*Interrupt Offset Register 0*/
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uint32_t INTOFF1;
/*Interrupt Offset Register 1*/
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uint32_t BIM;
/*Buffer Initialization Mode Register*/
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uint32_t RLOSTFL;
/*Request Lost Flag Register*/
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uint32_t BFINTFL;
/*Buffer Full Interrupt Flag Register*/
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uint32_t BERINTFL;
/*BER Interrupt Flag Register*/
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uint32_t MP1S;
/*Memory Protection 1 Start Address Register*/
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uint32_t MP1E;
/*Memory Protection 1 End Address Register*/
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uint32_t DCTRL;
/*Debug Control Register*/
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uint32_t WPR;
/*Watch Point Register*/
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uint32_t WMR;
/*Watch Mask Register*/
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uint32_t ID;
/*Module Identification Register*/
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uint32_t PCR;
/*Parity Control Register*/
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uint32_t PAR;
/*Parity Address Register*/
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uint8_t reserved3 [4];
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uint32_t MPCS;
/*Memory Protection Control and Status Register*/
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uint32_t MP0S;
/*Memory Protection 0 Start Address Register*/
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uint32_t MP0E;
/*Memory Protection 0 End Address Register*/
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}
tms570_htu_t
;
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/*-----------------------TMS570_HTU_GC-----------------------*/
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/* field: VBUSHOLD - Hold the VBUS bus */
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#define TMS570_HTU_GC_VBUSHOLD BSP_BIT32(24)
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/* field: HTUEN - Transfer Unit Enable Bit */
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#define TMS570_HTU_GC_HTUEN BSP_BIT32(16)
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/* field: DEBM - Debug Mode */
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#define TMS570_HTU_GC_DEBM BSP_BIT32(8)
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/* field: HTURES - HTU Software Reset Request */
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#define TMS570_HTU_GC_HTURES BSP_BIT32(0)
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/*----------------------TMS570_HTU_CPENA----------------------*/
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/* field: CPENA - CP Enable Bits */
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#define TMS570_HTU_CPENA_CPENA(val) BSP_FLD32(val,0, 15)
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#define TMS570_HTU_CPENA_CPENA_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_HTU_CPENA_CPENA_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*----------------------TMS570_HTU_BUSY0----------------------*/
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/* field: BUSY0A - Busy Flag for CP A of DCP 0 */
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#define TMS570_HTU_BUSY0_BUSY0A BSP_BIT32(24)
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/* field: BUSY0B - Busy Flag for CP B of DCP 0 */
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#define TMS570_HTU_BUSY0_BUSY0B BSP_BIT32(16)
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/* field: BUSY1A - Busy Flag for CP A of DCP 1 */
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#define TMS570_HTU_BUSY0_BUSY1A BSP_BIT32(8)
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/* field: BUSY1B - Busy Flag for CP B of DCP 1 */
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#define TMS570_HTU_BUSY0_BUSY1B BSP_BIT32(0)
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/*----------------------TMS570_HTU_BUSY1----------------------*/
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/* field: BUSY2A - Busy Flag for CP A of DCP 2 */
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#define TMS570_HTU_BUSY1_BUSY2A BSP_BIT32(24)
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/* field: BUSY2B - Busy Flag for CP B of DCP 2 */
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#define TMS570_HTU_BUSY1_BUSY2B BSP_BIT32(16)
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/* field: BUSY3A - Busy Flag for CP A of DCP 3 */
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#define TMS570_HTU_BUSY1_BUSY3A BSP_BIT32(8)
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/* field: BUSY3B - Busy Flag for CP B of DCP 3 */
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#define TMS570_HTU_BUSY1_BUSY3B BSP_BIT32(0)
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/*----------------------TMS570_HTU_BUSY2----------------------*/
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/* field: BUSY4A - Busy Flag for CP A of DCP 4 */
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#define TMS570_HTU_BUSY2_BUSY4A BSP_BIT32(24)
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/* field: BUSY4B - Busy Flag for CP B of DCP 4 */
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#define TMS570_HTU_BUSY2_BUSY4B BSP_BIT32(16)
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/* field: BUSY5A - Busy Flag for CP A of DCP 5 */
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#define TMS570_HTU_BUSY2_BUSY5A BSP_BIT32(8)
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/* field: BUSY5B - Busy Flag for CP B of DCP 5 */
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#define TMS570_HTU_BUSY2_BUSY5B BSP_BIT32(0)
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/*----------------------TMS570_HTU_BUSY3----------------------*/
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/* field: BUSY6A - Busy Flag for CP A of DCP 6 */
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#define TMS570_HTU_BUSY3_BUSY6A BSP_BIT32(24)
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/* field: BUSY6B - Busy Flag for CP B of DCP 6 */
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#define TMS570_HTU_BUSY3_BUSY6B BSP_BIT32(16)
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/* field: BUSY7A - Busy Flag for CP A of DCP 7 */
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#define TMS570_HTU_BUSY3_BUSY7A BSP_BIT32(8)
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/* field: BUSY7B - Busy Flag for CP B of DCP 7 */
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#define TMS570_HTU_BUSY3_BUSY7B BSP_BIT32(0)
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/*----------------------TMS570_HTU_ACPE----------------------*/
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/* field: ERRF - Error Flag */
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#define TMS570_HTU_ACPE_ERRF BSP_BIT32(31)
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/*--------------------TMS570_HTU_RLBECTRL--------------------*/
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/* field: BERINTENA - Bus Error Interrupt Enable Bit */
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#define TMS570_HTU_RLBECTRL_BERINTENA BSP_BIT32(16)
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/* field: CORL - Continue On Request Lost Error */
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#define TMS570_HTU_RLBECTRL_CORL BSP_BIT32(8)
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/* field: RLINTENA - Request Lost Interrupt Enable Bit */
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#define TMS570_HTU_RLBECTRL_RLINTENA BSP_BIT32(0)
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/*---------------------TMS570_HTU_BFINTS---------------------*/
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/* field: BFINTENA - Bus Full Interrupt Enable Bits. */
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#define TMS570_HTU_BFINTS_BFINTENA(val) BSP_FLD32(val,0, 15)
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#define TMS570_HTU_BFINTS_BFINTENA_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_HTU_BFINTS_BFINTENA_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*---------------------TMS570_HTU_BFINTC---------------------*/
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/* field: BFINTDIS - */
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#define TMS570_HTU_BFINTC_BFINTDIS(val) BSP_FLD32(val,0, 15)
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#define TMS570_HTU_BFINTC_BFINTDIS_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_HTU_BFINTC_BFINTDIS_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*---------------------TMS570_HTU_INTOFF0---------------------*/
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/* field: INTTYPE0 - Interrupt Type of Interrupt Line 0. */
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#define TMS570_HTU_INTOFF0_INTTYPE0(val) BSP_FLD32(val,8, 10)
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#define TMS570_HTU_INTOFF0_INTTYPE0_GET(reg) BSP_FLD32GET(reg,8, 10)
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#define TMS570_HTU_INTOFF0_INTTYPE0_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
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/* field: CPOFF0 - CP Offset. */
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#define TMS570_HTU_INTOFF0_CPOFF0(val) BSP_FLD32(val,0, 4)
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#define TMS570_HTU_INTOFF0_CPOFF0_GET(reg) BSP_FLD32GET(reg,0, 4)
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#define TMS570_HTU_INTOFF0_CPOFF0_SET(reg,val) BSP_FLD32SET(reg, val,0, 4)
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/*---------------------TMS570_HTU_INTOFF1---------------------*/
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/* field: INTTYPE1 - INTTYPE1 Interrupt Type of Interrupt Line 1. */
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#define TMS570_HTU_INTOFF1_INTTYPE1(val) BSP_FLD32(val,8, 10)
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#define TMS570_HTU_INTOFF1_INTTYPE1_GET(reg) BSP_FLD32GET(reg,8, 10)
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#define TMS570_HTU_INTOFF1_INTTYPE1_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
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/* field: CPOFF1 - CP Offset. */
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#define TMS570_HTU_INTOFF1_CPOFF1(val) BSP_FLD32(val,0, 4)
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#define TMS570_HTU_INTOFF1_CPOFF1_GET(reg) BSP_FLD32GET(reg,0, 4)
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#define TMS570_HTU_INTOFF1_CPOFF1_SET(reg,val) BSP_FLD32SET(reg, val,0, 4)
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/*-----------------------TMS570_HTU_BIM-----------------------*/
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/* field: BIM - Buffer Initialization Mode */
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#define TMS570_HTU_BIM_BIM(val) BSP_FLD32(val,0, 7)
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#define TMS570_HTU_BIM_BIM_GET(reg) BSP_FLD32GET(reg,0, 7)
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#define TMS570_HTU_BIM_BIM_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
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/*---------------------TMS570_HTU_RLOSTFL---------------------*/
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/* field: CPRLFL - CP Request Lost Flags */
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#define TMS570_HTU_RLOSTFL_CPRLFL(val) BSP_FLD32(val,0, 15)
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#define TMS570_HTU_RLOSTFL_CPRLFL_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_HTU_RLOSTFL_CPRLFL_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*---------------------TMS570_HTU_BFINTFL---------------------*/
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/* field: BFINTFL - Buffer Full Interrupt Flags */
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#define TMS570_HTU_BFINTFL_BFINTFL(val) BSP_FLD32(val,0, 15)
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#define TMS570_HTU_BFINTFL_BFINTFL_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_HTU_BFINTFL_BFINTFL_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*--------------------TMS570_HTU_BERINTFL--------------------*/
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/* field: BERINTFL - Bus Error Interrupt Flags */
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#define TMS570_HTU_BERINTFL_BERINTFL(val) BSP_FLD32(val,0, 15)
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#define TMS570_HTU_BERINTFL_BERINTFL_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_HTU_BERINTFL_BERINTFL_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*----------------------TMS570_HTU_MP1S----------------------*/
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/* field: STARTADDRESS1 - he start address defines at which main memory address the region begins. */
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/* Whole 32 bits */
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/*----------------------TMS570_HTU_MP1E----------------------*/
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/* field: ENDADDRESS1 - The end address defines at which address the region ends. */
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/* Whole 32 bits */
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/*----------------------TMS570_HTU_DCTRL----------------------*/
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/* field: CPNUM - CP Number. These bit fields indicate the CP which should cause the watch point to match. */
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#define TMS570_HTU_DCTRL_CPNUM(val) BSP_FLD32(val,24, 27)
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#define TMS570_HTU_DCTRL_CPNUM_GET(reg) BSP_FLD32GET(reg,24, 27)
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#define TMS570_HTU_DCTRL_CPNUM_SET(reg,val) BSP_FLD32SET(reg, val,24, 27)
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/* field: HTUDBGS - HTU Debug Status. */
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#define TMS570_HTU_DCTRL_HTUDBGS BSP_BIT32(16)
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/* field: DBREN - Debug Request Enable */
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#define TMS570_HTU_DCTRL_DBREN BSP_BIT32(0)
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/*-----------------------TMS570_HTU_WPR-----------------------*/
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/* field: WP - Watch Point Register */
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/* Whole 32 bits */
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/*-----------------------TMS570_HTU_WMR-----------------------*/
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/* field: WM - Watch Mask Register */
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/* Whole 32 bits */
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/*-----------------------TMS570_HTU_ID-----------------------*/
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/* field: CLASS - Module Class */
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#define TMS570_HTU_ID_CLASS(val) BSP_FLD32(val,16, 23)
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#define TMS570_HTU_ID_CLASS_GET(reg) BSP_FLD32GET(reg,16, 23)
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#define TMS570_HTU_ID_CLASS_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
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/* field: TYPE - Subtype within a Class */
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#define TMS570_HTU_ID_TYPE(val) BSP_FLD32(val,8, 15)
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#define TMS570_HTU_ID_TYPE_GET(reg) BSP_FLD32GET(reg,8, 15)
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#define TMS570_HTU_ID_TYPE_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
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/* field: REV - Module Revision Number */
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#define TMS570_HTU_ID_REV(val) BSP_FLD32(val,0, 7)
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#define TMS570_HTU_ID_REV_GET(reg) BSP_FLD32GET(reg,0, 7)
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#define TMS570_HTU_ID_REV_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
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/*-----------------------TMS570_HTU_PCR-----------------------*/
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/* field: COPE - Continue on Parity Error */
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#define TMS570_HTU_PCR_COPE BSP_BIT32(16)
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/* field: TEST - Test. */
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#define TMS570_HTU_PCR_TEST BSP_BIT32(8)
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/* field: PARITY_ENA - Enable/Disable Parity Checking. */
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#define TMS570_HTU_PCR_PARITY_ENA(val) BSP_FLD32(val,0, 3)
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#define TMS570_HTU_PCR_PARITY_ENA_GET(reg) BSP_FLD32GET(reg,0, 3)
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#define TMS570_HTU_PCR_PARITY_ENA_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
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/*-----------------------TMS570_HTU_PAR-----------------------*/
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/* field: PEFT - Parity Error Fault Flag. */
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#define TMS570_HTU_PAR_PEFT BSP_BIT32(16)
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/* field: PAOFF - PAOFF */
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#define TMS570_HTU_PAR_PAOFF(val) BSP_FLD32(val,0, 8)
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#define TMS570_HTU_PAR_PAOFF_GET(reg) BSP_FLD32GET(reg,0, 8)
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#define TMS570_HTU_PAR_PAOFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 8)
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/*----------------------TMS570_HTU_MPCS----------------------*/
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/* field: CPNUM0 - Control Packet Number for single memory protection region configuration. */
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#define TMS570_HTU_MPCS_CPNUM0(val) BSP_FLD32(val,24, 27)
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#define TMS570_HTU_MPCS_CPNUM0_GET(reg) BSP_FLD32GET(reg,24, 27)
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#define TMS570_HTU_MPCS_CPNUM0_SET(reg,val) BSP_FLD32SET(reg, val,24, 27)
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/* field: MPEFT1 - MPEFT1 */
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#define TMS570_HTU_MPCS_MPEFT1 BSP_BIT32(17)
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/* field: MPEFT0 - Memory Protection Error Fault Flag 0. */
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#define TMS570_HTU_MPCS_MPEFT0 BSP_BIT32(16)
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/* field: CPNUM1 - Control Packet Number for single memory protection region configuration. */
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#define TMS570_HTU_MPCS_CPNUM1(val) BSP_FLD32(val,8, 11)
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#define TMS570_HTU_MPCS_CPNUM1_GET(reg) BSP_FLD32GET(reg,8, 11)
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#define TMS570_HTU_MPCS_CPNUM1_SET(reg,val) BSP_FLD32SET(reg, val,8, 11)
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/*----------------------TMS570_HTU_MP0S----------------------*/
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/* field: ISTARTADDRESS0 - The start address defines at which main memory address the region begins. */
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/* Whole 32 bits */
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/*----------------------TMS570_HTU_MP0E----------------------*/
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/* field: ENDADDRESS0 - The end address defines at which address the region ends. */
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/* Whole 32 bits */
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#endif
/* LIBBSP_ARM_TMS570_HTU */
utility.h
This header file provides utility macros for BSPs.
tms570_htu_t
Definition:
reg_htu.h:54
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