RTEMS 6.1-rc6
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reg_esm.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/* The header file is generated by make_header.py from ESM.json */
12/* Current script's version can be found at: */
13/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
14
15/*
16 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
17 *
18 * Czech Technical University in Prague
19 * Zikova 1903/4
20 * 166 36 Praha 6
21 * Czech Republic
22 *
23 * All rights reserved.
24 *
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions are met:
27 *
28 * 1. Redistributions of source code must retain the above copyright notice, this
29 * list of conditions and the following disclaimer.
30 * 2. Redistributions in binary form must reproduce the above copyright notice,
31 * this list of conditions and the following disclaimer in the documentation
32 * and/or other materials provided with the distribution.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
35 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
36 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
38 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
39 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
40 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
41 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
42 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
43 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 *
45 * The views and conclusions contained in the software and documentation are those
46 * of the authors and should not be interpreted as representing official policies,
47 * either expressed or implied, of the FreeBSD Project.
48*/
49#ifndef LIBBSP_ARM_TMS570_ESM
50#define LIBBSP_ARM_TMS570_ESM
51
52#include <bsp/utility.h>
53
54typedef struct{
55 uint32_t EEPAPR1; /*ESM Enable ERROR Pin Action/Response Register 1*/
56 uint32_t DEPAPR1; /*ESM Disable ERROR Pin Action/Response Register 1*/
57 uint32_t IESR1; /*ESM Interrupt Enable Set/Status Register 1*/
58 uint32_t IECR1; /*ESM Interrupt Enable Clear/Status Register 1*/
59 uint32_t ILSR1; /*Interrupt Level Set/Status Register 1*/
60 uint32_t ILCR1; /*Interrupt Level Clear/Status Register 1*/
61 uint32_t SR[3]; /*ESM Status Register*/
62 uint32_t EPSR; /*ESM ERROR Pin Status Register*/
63 uint32_t IOFFHR; /*ESM Interrupt Offset High Register*/
64 uint32_t IOFFLR; /*ESM Interrupt Offset Low Register*/
65 uint32_t LTCR; /*ESM Low-Time Counter Register*/
66 uint32_t LTCPR; /*ESM Low-Time Counter Preload Register*/
67 uint32_t EKR; /*ESM Error Key Register*/
68 uint32_t SSR2; /*ESM Status Shadow Register 2*/
69 uint32_t IEPSR4; /*ESM Influence ERROR Pin Set/Status Register 4*/
70 uint32_t IEPCR4; /*ESM Influence ERROR Pin Clear/Status Register 4*/
71 uint32_t IESR4; /*ESM Interrupt Enable Set/Status Register 4*/
72 uint32_t IECR4; /*ESM Interrupt Enable Clear/Status Register 4*/
73 uint32_t ILSR4; /*Interrupt Level Set/Status Register 4*/
74 uint32_t ILCR4; /*Interrupt Level Clear/Status Register 4*/
75 uint32_t SR4; /*ESM Status Register 4*/
77
78
79/*---------------------TMS570_ESM_EEPAPR1---------------------*/
80/* field: IEPSET - Enable ERROR Pin Action/Response on Group 1. */
81/* Whole 32 bits */
82
83/*---------------------TMS570_ESM_DEPAPR1---------------------*/
84/* field: IEPCLR - Disable ERROR Pin Action/Response on Group 1. */
85/* Whole 32 bits */
86
87/*----------------------TMS570_ESM_IESR1----------------------*/
88/* field: INTENSET - Set interrupt Enable */
89/* Whole 32 bits */
90
91/*----------------------TMS570_ESM_IECR1----------------------*/
92/* field: INTENCLR - Clear Interrupt Enable */
93/* Whole 32 bits */
94
95/*----------------------TMS570_ESM_ILSR1----------------------*/
96/* field: INTLVLSET - Set Interrupt Priority */
97/* Whole 32 bits */
98
99/*----------------------TMS570_ESM_ILCR1----------------------*/
100/* field: INTLVLCLR - Clear Interrupt Priority. */
101/* Whole 32 bits */
102
103/*-----------------------TMS570_ESM_SR-----------------------*/
104/* field: ESF - Error Status Flag. Provides status information on a pending error. */
105/* Whole 32 bits */
106
107/*----------------------TMS570_ESM_EPSR----------------------*/
108/* field: EPSF - ERROR Pin Status Flag. Provides status information for the ERROR Pin. */
109#define TMS570_ESM_EPSR_EPSF BSP_BIT32(0)
110
111
112/*---------------------TMS570_ESM_IOFFHR---------------------*/
113/* field: INTOFFH - Offset High Level Interrupt. */
114#define TMS570_ESM_IOFFHR_INTOFFH(val) BSP_FLD32(val,0, 6)
115#define TMS570_ESM_IOFFHR_INTOFFH_GET(reg) BSP_FLD32GET(reg,0, 6)
116#define TMS570_ESM_IOFFHR_INTOFFH_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
117
118
119/*---------------------TMS570_ESM_IOFFLR---------------------*/
120/* field: INTOFFL - Offset Low Level Interrupt. */
121#define TMS570_ESM_IOFFLR_INTOFFL(val) BSP_FLD32(val,0, 6)
122#define TMS570_ESM_IOFFLR_INTOFFL_GET(reg) BSP_FLD32GET(reg,0, 6)
123#define TMS570_ESM_IOFFLR_INTOFFL_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
124
125
126/*----------------------TMS570_ESM_LTCR----------------------*/
127/* field: LTC - ERROR Pin Low-Time Counter */
128#define TMS570_ESM_LTCR_LTC(val) BSP_FLD32(val,0, 15)
129#define TMS570_ESM_LTCR_LTC_GET(reg) BSP_FLD32GET(reg,0, 15)
130#define TMS570_ESM_LTCR_LTC_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
131
132
133/*----------------------TMS570_ESM_LTCPR----------------------*/
134/* field: LTCP - ERROR Pin Low-Time Counter Pre-load Value */
135#define TMS570_ESM_LTCPR_LTCP(val) BSP_FLD32(val,0, 15)
136#define TMS570_ESM_LTCPR_LTCP_GET(reg) BSP_FLD32GET(reg,0, 15)
137#define TMS570_ESM_LTCPR_LTCP_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
138
139
140/*-----------------------TMS570_ESM_EKR-----------------------*/
141/* field: EKEY - Error Key. The key to reset the ERROR pin or to force an error on the ERROR pin. */
142#define TMS570_ESM_EKR_EKEY(val) BSP_FLD32(val,0, 3)
143#define TMS570_ESM_EKR_EKEY_GET(reg) BSP_FLD32GET(reg,0, 3)
144#define TMS570_ESM_EKR_EKEY_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
145
146
147/*----------------------TMS570_ESM_SSR2----------------------*/
148/* field: ESF - Error Status Flag. Shadow register for status information on pending error. */
149/* Whole 32 bits */
150
151/*---------------------TMS570_ESM_IEPSR4---------------------*/
152/* field: IEPSET - Set Influence on ERROR Pin */
153/* Whole 32 bits */
154
155/*---------------------TMS570_ESM_IEPCR4---------------------*/
156/* field: IEPCLR - Clear Influence on ERROR Pin */
157/* Whole 32 bits */
158
159/*----------------------TMS570_ESM_IESR4----------------------*/
160/* field: INTENSET - Set Interrupt Enable */
161/* Whole 32 bits */
162
163/*----------------------TMS570_ESM_IECR4----------------------*/
164/* field: INTENCLR - Clear Interrupt Enable */
165/* Whole 32 bits */
166
167/*----------------------TMS570_ESM_ILSR4----------------------*/
168/* field: INTLVLSET - Set Interrupt Level */
169/* Whole 32 bits */
170
171/*----------------------TMS570_ESM_ILCR4----------------------*/
172/* field: INTLVLCLR - Clear Interrupt Level */
173/* Whole 32 bits */
174
175/*-----------------------TMS570_ESM_SR4-----------------------*/
176/* field: ESF - Error Status Flag. Provides status information on a pending error. */
177/* Whole 32 bits */
178
179
180#endif /* LIBBSP_ARM_TMS570_ESM */
This header file provides utility macros for BSPs.
Definition: reg_esm.h:54