RTEMS
6.1-rc6
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bsps
arm
tms570
include
bsp
ti_herc
reg_esm.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: BSD-2-Clause */
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/* The header file is generated by make_header.py from ESM.json */
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/* Current script's version can be found at: */
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/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
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/*
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* Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
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*
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* Czech Technical University in Prague
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* Zikova 1903/4
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* 166 36 Praha 6
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* Czech Republic
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are those
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* of the authors and should not be interpreted as representing official policies,
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* either expressed or implied, of the FreeBSD Project.
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*/
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#ifndef LIBBSP_ARM_TMS570_ESM
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#define LIBBSP_ARM_TMS570_ESM
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#include <
bsp/utility.h
>
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typedef
struct
{
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uint32_t EEPAPR1;
/*ESM Enable ERROR Pin Action/Response Register 1*/
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uint32_t DEPAPR1;
/*ESM Disable ERROR Pin Action/Response Register 1*/
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uint32_t IESR1;
/*ESM Interrupt Enable Set/Status Register 1*/
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uint32_t IECR1;
/*ESM Interrupt Enable Clear/Status Register 1*/
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uint32_t ILSR1;
/*Interrupt Level Set/Status Register 1*/
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uint32_t ILCR1;
/*Interrupt Level Clear/Status Register 1*/
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uint32_t SR[3];
/*ESM Status Register*/
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uint32_t EPSR;
/*ESM ERROR Pin Status Register*/
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uint32_t IOFFHR;
/*ESM Interrupt Offset High Register*/
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uint32_t IOFFLR;
/*ESM Interrupt Offset Low Register*/
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uint32_t LTCR;
/*ESM Low-Time Counter Register*/
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uint32_t LTCPR;
/*ESM Low-Time Counter Preload Register*/
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uint32_t EKR;
/*ESM Error Key Register*/
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uint32_t SSR2;
/*ESM Status Shadow Register 2*/
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uint32_t IEPSR4;
/*ESM Influence ERROR Pin Set/Status Register 4*/
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uint32_t IEPCR4;
/*ESM Influence ERROR Pin Clear/Status Register 4*/
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uint32_t IESR4;
/*ESM Interrupt Enable Set/Status Register 4*/
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uint32_t IECR4;
/*ESM Interrupt Enable Clear/Status Register 4*/
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uint32_t ILSR4;
/*Interrupt Level Set/Status Register 4*/
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uint32_t ILCR4;
/*Interrupt Level Clear/Status Register 4*/
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uint32_t SR4;
/*ESM Status Register 4*/
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}
tms570_esm_t
;
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/*---------------------TMS570_ESM_EEPAPR1---------------------*/
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/* field: IEPSET - Enable ERROR Pin Action/Response on Group 1. */
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/* Whole 32 bits */
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/*---------------------TMS570_ESM_DEPAPR1---------------------*/
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/* field: IEPCLR - Disable ERROR Pin Action/Response on Group 1. */
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/* Whole 32 bits */
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/*----------------------TMS570_ESM_IESR1----------------------*/
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/* field: INTENSET - Set interrupt Enable */
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/* Whole 32 bits */
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/*----------------------TMS570_ESM_IECR1----------------------*/
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/* field: INTENCLR - Clear Interrupt Enable */
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/* Whole 32 bits */
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/*----------------------TMS570_ESM_ILSR1----------------------*/
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/* field: INTLVLSET - Set Interrupt Priority */
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/* Whole 32 bits */
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/*----------------------TMS570_ESM_ILCR1----------------------*/
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/* field: INTLVLCLR - Clear Interrupt Priority. */
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/* Whole 32 bits */
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/*-----------------------TMS570_ESM_SR-----------------------*/
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/* field: ESF - Error Status Flag. Provides status information on a pending error. */
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/* Whole 32 bits */
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/*----------------------TMS570_ESM_EPSR----------------------*/
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/* field: EPSF - ERROR Pin Status Flag. Provides status information for the ERROR Pin. */
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#define TMS570_ESM_EPSR_EPSF BSP_BIT32(0)
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/*---------------------TMS570_ESM_IOFFHR---------------------*/
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/* field: INTOFFH - Offset High Level Interrupt. */
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#define TMS570_ESM_IOFFHR_INTOFFH(val) BSP_FLD32(val,0, 6)
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#define TMS570_ESM_IOFFHR_INTOFFH_GET(reg) BSP_FLD32GET(reg,0, 6)
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#define TMS570_ESM_IOFFHR_INTOFFH_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
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/*---------------------TMS570_ESM_IOFFLR---------------------*/
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/* field: INTOFFL - Offset Low Level Interrupt. */
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#define TMS570_ESM_IOFFLR_INTOFFL(val) BSP_FLD32(val,0, 6)
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#define TMS570_ESM_IOFFLR_INTOFFL_GET(reg) BSP_FLD32GET(reg,0, 6)
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#define TMS570_ESM_IOFFLR_INTOFFL_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
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/*----------------------TMS570_ESM_LTCR----------------------*/
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/* field: LTC - ERROR Pin Low-Time Counter */
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#define TMS570_ESM_LTCR_LTC(val) BSP_FLD32(val,0, 15)
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#define TMS570_ESM_LTCR_LTC_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_ESM_LTCR_LTC_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*----------------------TMS570_ESM_LTCPR----------------------*/
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/* field: LTCP - ERROR Pin Low-Time Counter Pre-load Value */
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#define TMS570_ESM_LTCPR_LTCP(val) BSP_FLD32(val,0, 15)
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#define TMS570_ESM_LTCPR_LTCP_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_ESM_LTCPR_LTCP_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*-----------------------TMS570_ESM_EKR-----------------------*/
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/* field: EKEY - Error Key. The key to reset the ERROR pin or to force an error on the ERROR pin. */
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#define TMS570_ESM_EKR_EKEY(val) BSP_FLD32(val,0, 3)
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#define TMS570_ESM_EKR_EKEY_GET(reg) BSP_FLD32GET(reg,0, 3)
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#define TMS570_ESM_EKR_EKEY_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
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/*----------------------TMS570_ESM_SSR2----------------------*/
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/* field: ESF - Error Status Flag. Shadow register for status information on pending error. */
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/* Whole 32 bits */
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/*---------------------TMS570_ESM_IEPSR4---------------------*/
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/* field: IEPSET - Set Influence on ERROR Pin */
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/* Whole 32 bits */
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/*---------------------TMS570_ESM_IEPCR4---------------------*/
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/* field: IEPCLR - Clear Influence on ERROR Pin */
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/* Whole 32 bits */
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/*----------------------TMS570_ESM_IESR4----------------------*/
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/* field: INTENSET - Set Interrupt Enable */
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/* Whole 32 bits */
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/*----------------------TMS570_ESM_IECR4----------------------*/
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/* field: INTENCLR - Clear Interrupt Enable */
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/* Whole 32 bits */
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/*----------------------TMS570_ESM_ILSR4----------------------*/
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/* field: INTLVLSET - Set Interrupt Level */
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/* Whole 32 bits */
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/*----------------------TMS570_ESM_ILCR4----------------------*/
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/* field: INTLVLCLR - Clear Interrupt Level */
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/* Whole 32 bits */
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/*-----------------------TMS570_ESM_SR4-----------------------*/
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/* field: ESF - Error Status Flag. Provides status information on a pending error. */
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/* Whole 32 bits */
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#endif
/* LIBBSP_ARM_TMS570_ESM */
utility.h
This header file provides utility macros for BSPs.
tms570_esm_t
Definition:
reg_esm.h:54
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