49#ifndef LIBBSP_ARM_TMS570_EMACM
50#define LIBBSP_ARM_TMS570_EMACM
58 uint8_t reserved1 [4];
62 uint8_t reserved2 [100];
63 uint32_t TXINTSTATRAW;
64 uint32_t TXINTSTATMASKED;
65 uint32_t TXINTMASKSET;
66 uint32_t TXINTMASKCLEAR;
68 uint32_t MACEOIVECTOR;
69 uint8_t reserved3 [8];
70 uint32_t RXINTSTATRAW;
71 uint32_t RXINTSTATMASKED;
72 uint32_t RXINTMASKSET;
73 uint32_t RXINTMASKCLEAR;
74 uint32_t MACINTSTATRAW;
75 uint32_t MACINTSTATMASKED;
76 uint32_t MACINTMASKSET;
77 uint32_t MACINTMASKCLEAR;
78 uint8_t reserved4 [64];
80 uint32_t RXUNICASTSET;
81 uint32_t RXUNICASTCLEAR;
83 uint32_t RXBUFFEROFFSET;
84 uint32_t RXFILTERLOWTHRESH;
85 uint8_t reserved5 [8];
86 uint32_t RXFLOWTHRESH[8];
87 uint32_t RXFREEBUFFER[8];
94 uint8_t reserved6 [88];
95 uint32_t MACSRCADDRLO;
96 uint32_t MACSRCADDRHI;
103 uint8_t reserved7 [784];
107 uint8_t reserved8 [244];
121#define TMS570_EMACM_TXCONTROL_TXEN BSP_BIT32(0)
126#define TMS570_EMACM_TXTEARDOWN_TXTDNCH(val) BSP_FLD32(val,0, 2)
127#define TMS570_EMACM_TXTEARDOWN_TXTDNCH_GET(reg) BSP_FLD32GET(reg,0, 2)
128#define TMS570_EMACM_TXTEARDOWN_TXTDNCH_SET(reg,val) BSP_FLD32SET(reg, val,0, 2)
137#define TMS570_EMACM_RXCONTROL_RXEN BSP_BIT32(0)
142#define TMS570_EMACM_RXTEARDOWN_RXTDNCH(val) BSP_FLD32(val,0, 2)
143#define TMS570_EMACM_RXTEARDOWN_RXTDNCH_GET(reg) BSP_FLD32GET(reg,0, 2)
144#define TMS570_EMACM_RXTEARDOWN_RXTDNCH_SET(reg,val) BSP_FLD32SET(reg, val,0, 2)
149#define TMS570_EMACM_TXINTSTATRAW_TX7PEND BSP_BIT32(7)
152#define TMS570_EMACM_TXINTSTATRAW_TX6PEND BSP_BIT32(6)
155#define TMS570_EMACM_TXINTSTATRAW_TX5PEND BSP_BIT32(5)
158#define TMS570_EMACM_TXINTSTATRAW_TX4PEND BSP_BIT32(4)
161#define TMS570_EMACM_TXINTSTATRAW_TX3PEND BSP_BIT32(3)
164#define TMS570_EMACM_TXINTSTATRAW_TX2PEND BSP_BIT32(2)
167#define TMS570_EMACM_TXINTSTATRAW_TX1PEND BSP_BIT32(1)
170#define TMS570_EMACM_TXINTSTATRAW_TX0PEND BSP_BIT32(0)
175#define TMS570_EMACM_TXINTSTATMASKED_TX7PEND BSP_BIT32(7)
178#define TMS570_EMACM_TXINTSTATMASKED_TX6PEND BSP_BIT32(6)
181#define TMS570_EMACM_TXINTSTATMASKED_TX5PEND BSP_BIT32(5)
184#define TMS570_EMACM_TXINTSTATMASKED_TX4PEND BSP_BIT32(4)
187#define TMS570_EMACM_TXINTSTATMASKED_TX3PEND BSP_BIT32(3)
190#define TMS570_EMACM_TXINTSTATMASKED_TX2PEND BSP_BIT32(2)
193#define TMS570_EMACM_TXINTSTATMASKED_TX1PEND BSP_BIT32(1)
196#define TMS570_EMACM_TXINTSTATMASKED_TX0PEND BSP_BIT32(0)
201#define TMS570_EMACM_TXINTMASKSET_TX7MASK BSP_BIT32(7)
204#define TMS570_EMACM_TXINTMASKSET_TX6MASK BSP_BIT32(6)
207#define TMS570_EMACM_TXINTMASKSET_TX5MASK BSP_BIT32(5)
210#define TMS570_EMACM_TXINTMASKSET_TX4MASK BSP_BIT32(4)
213#define TMS570_EMACM_TXINTMASKSET_TX3MASK BSP_BIT32(3)
216#define TMS570_EMACM_TXINTMASKSET_TX2MASK BSP_BIT32(2)
219#define TMS570_EMACM_TXINTMASKSET_TX1MASK BSP_BIT32(1)
222#define TMS570_EMACM_TXINTMASKSET_TX0MASK BSP_BIT32(0)
227#define TMS570_EMACM_TXINTMASKCLEAR_TX7MASK BSP_BIT32(7)
230#define TMS570_EMACM_TXINTMASKCLEAR_TX6MASK BSP_BIT32(6)
233#define TMS570_EMACM_TXINTMASKCLEAR_TX5MASK BSP_BIT32(5)
236#define TMS570_EMACM_TXINTMASKCLEAR_TX4MASK BSP_BIT32(4)
239#define TMS570_EMACM_TXINTMASKCLEAR_TX3MASK BSP_BIT32(3)
242#define TMS570_EMACM_TXINTMASKCLEAR_TX2MASK BSP_BIT32(2)
245#define TMS570_EMACM_TXINTMASKCLEAR_TX1MASK BSP_BIT32(1)
248#define TMS570_EMACM_TXINTMASKCLEAR_TX0MASK BSP_BIT32(0)
253#define TMS570_EMACM_MACINVECTOR_STATPEND BSP_BIT32(27)
256#define TMS570_EMACM_MACINVECTOR_HOSTPEND BSP_BIT32(26)
259#define TMS570_EMACM_MACINVECTOR_LINKINT0 BSP_BIT32(25)
262#define TMS570_EMACM_MACINVECTOR_USERINT0 BSP_BIT32(24)
265#define TMS570_EMACM_MACINVECTOR_TXPEND(val) BSP_FLD32(val,16, 23)
266#define TMS570_EMACM_MACINVECTOR_TXPEND_GET(reg) BSP_FLD32GET(reg,16, 23)
267#define TMS570_EMACM_MACINVECTOR_TXPEND_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
270#define TMS570_EMACM_MACINVECTOR_RXTHRESHPEND(val) BSP_FLD32(val,8, 15)
271#define TMS570_EMACM_MACINVECTOR_RXTHRESHPEND_GET(reg) BSP_FLD32GET(reg,8, 15)
272#define TMS570_EMACM_MACINVECTOR_RXTHRESHPEND_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
275#define TMS570_EMACM_MACINVECTOR_RXPEND(val) BSP_FLD32(val,0, 7)
276#define TMS570_EMACM_MACINVECTOR_RXPEND_GET(reg) BSP_FLD32GET(reg,0, 7)
277#define TMS570_EMACM_MACINVECTOR_RXPEND_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
282#define TMS570_EMACM_MACEOIVECTOR_INTVECT(val) BSP_FLD32(val,0, 4)
283#define TMS570_EMACM_MACEOIVECTOR_INTVECT_GET(reg) BSP_FLD32GET(reg,0, 4)
284#define TMS570_EMACM_MACEOIVECTOR_INTVECT_SET(reg,val) BSP_FLD32SET(reg, val,0, 4)
289#define TMS570_EMACM_RXINTSTATRAW_RX7THRESHPEND BSP_BIT32(15)
292#define TMS570_EMACM_RXINTSTATRAW_RX6THRESHPEND BSP_BIT32(14)
295#define TMS570_EMACM_RXINTSTATRAW_RX5THRESHPEND BSP_BIT32(13)
298#define TMS570_EMACM_RXINTSTATRAW_RX4THRESHPEND BSP_BIT32(12)
301#define TMS570_EMACM_RXINTSTATRAW_RX3THRESHPEND BSP_BIT32(11)
304#define TMS570_EMACM_RXINTSTATRAW_RX2THRESHPEND BSP_BIT32(10)
307#define TMS570_EMACM_RXINTSTATRAW_RX1THRESHPEND BSP_BIT32(9)
310#define TMS570_EMACM_RXINTSTATRAW_RX0THRESHPEND BSP_BIT32(8)
313#define TMS570_EMACM_RXINTSTATRAW_RX7PEND BSP_BIT32(7)
316#define TMS570_EMACM_RXINTSTATRAW_RX6PEND BSP_BIT32(6)
319#define TMS570_EMACM_RXINTSTATRAW_RX5PEND BSP_BIT32(5)
322#define TMS570_EMACM_RXINTSTATRAW_RX4PEND BSP_BIT32(4)
325#define TMS570_EMACM_RXINTSTATRAW_RX3PEND BSP_BIT32(3)
328#define TMS570_EMACM_RXINTSTATRAW_RX2PEND BSP_BIT32(2)
331#define TMS570_EMACM_RXINTSTATRAW_RX1PEND BSP_BIT32(1)
334#define TMS570_EMACM_RXINTSTATRAW_RX0PEND BSP_BIT32(0)
339#define TMS570_EMACM_RXINTSTATMASKED_RX7THRESHPEND BSP_BIT32(15)
342#define TMS570_EMACM_RXINTSTATMASKED_RX6THRESHPEND BSP_BIT32(14)
345#define TMS570_EMACM_RXINTSTATMASKED_RX5THRESHPEND BSP_BIT32(13)
348#define TMS570_EMACM_RXINTSTATMASKED_RX4THRESHPEND BSP_BIT32(12)
351#define TMS570_EMACM_RXINTSTATMASKED_RX3THRESHPEND BSP_BIT32(11)
354#define TMS570_EMACM_RXINTSTATMASKED_RX2THRESHPEND BSP_BIT32(10)
357#define TMS570_EMACM_RXINTSTATMASKED_RX1THRESHPEND BSP_BIT32(9)
360#define TMS570_EMACM_RXINTSTATMASKED_RX0THRESHPEND BSP_BIT32(8)
363#define TMS570_EMACM_RXINTSTATMASKED_RX7PEND BSP_BIT32(7)
366#define TMS570_EMACM_RXINTSTATMASKED_RX6PEND BSP_BIT32(6)
369#define TMS570_EMACM_RXINTSTATMASKED_RX5PEND BSP_BIT32(5)
372#define TMS570_EMACM_RXINTSTATMASKED_RX4PEND BSP_BIT32(4)
375#define TMS570_EMACM_RXINTSTATMASKED_RX3PEND BSP_BIT32(3)
378#define TMS570_EMACM_RXINTSTATMASKED_RX2PEND BSP_BIT32(2)
381#define TMS570_EMACM_RXINTSTATMASKED_RX1PEND BSP_BIT32(1)
384#define TMS570_EMACM_RXINTSTATMASKED_RX0PEND BSP_BIT32(0)
389#define TMS570_EMACM_RXINTMASKSET_RX7THRESHMASK BSP_BIT32(15)
392#define TMS570_EMACM_RXINTMASKSET_RX6THRESHMASK BSP_BIT32(14)
395#define TMS570_EMACM_RXINTMASKSET_RX5THRESHMASK BSP_BIT32(13)
398#define TMS570_EMACM_RXINTMASKSET_RX4THRESHMASK BSP_BIT32(12)
401#define TMS570_EMACM_RXINTMASKSET_RX3THRESHMASK BSP_BIT32(11)
404#define TMS570_EMACM_RXINTMASKSET_RX2THRESHMASK BSP_BIT32(10)
407#define TMS570_EMACM_RXINTMASKSET_RX1THRESHMASK BSP_BIT32(9)
410#define TMS570_EMACM_RXINTMASKSET_RX0THRESHMASK BSP_BIT32(8)
413#define TMS570_EMACM_RXINTMASKSET_RX7MASK BSP_BIT32(7)
416#define TMS570_EMACM_RXINTMASKSET_RX6MASK BSP_BIT32(6)
419#define TMS570_EMACM_RXINTMASKSET_RX5MASK BSP_BIT32(5)
422#define TMS570_EMACM_RXINTMASKSET_RX4MASK BSP_BIT32(4)
425#define TMS570_EMACM_RXINTMASKSET_RX3MASK BSP_BIT32(3)
428#define TMS570_EMACM_RXINTMASKSET_RX2MASK BSP_BIT32(2)
431#define TMS570_EMACM_RXINTMASKSET_RX1MASK BSP_BIT32(1)
434#define TMS570_EMACM_RXINTMASKSET_RX0MASK BSP_BIT32(0)
439#define TMS570_EMACM_RXINTMASKCLEAR_RX7THRESHMASK BSP_BIT32(15)
442#define TMS570_EMACM_RXINTMASKCLEAR_RX6THRESHMASK BSP_BIT32(14)
445#define TMS570_EMACM_RXINTMASKCLEAR_RX5THRESHMASK BSP_BIT32(13)
448#define TMS570_EMACM_RXINTMASKCLEAR_RX4THRESHMASK BSP_BIT32(12)
451#define TMS570_EMACM_RXINTMASKCLEAR_RX3THRESHMASK BSP_BIT32(11)
454#define TMS570_EMACM_RXINTMASKCLEAR_RX2THRESHMASK BSP_BIT32(10)
457#define TMS570_EMACM_RXINTMASKCLEAR_RX1THRESHMASK BSP_BIT32(9)
460#define TMS570_EMACM_RXINTMASKCLEAR_RX0THRESHMASK BSP_BIT32(8)
463#define TMS570_EMACM_RXINTMASKCLEAR_RX7MASK BSP_BIT32(7)
466#define TMS570_EMACM_RXINTMASKCLEAR_RX6MASK BSP_BIT32(6)
469#define TMS570_EMACM_RXINTMASKCLEAR_RX5MASK BSP_BIT32(5)
472#define TMS570_EMACM_RXINTMASKCLEAR_RX4MASK BSP_BIT32(4)
475#define TMS570_EMACM_RXINTMASKCLEAR_RX3MASK BSP_BIT32(3)
478#define TMS570_EMACM_RXINTMASKCLEAR_RX2MASK BSP_BIT32(2)
481#define TMS570_EMACM_RXINTMASKCLEAR_RX1MASK BSP_BIT32(1)
484#define TMS570_EMACM_RXINTMASKCLEAR_RX0MASK BSP_BIT32(0)
489#define TMS570_EMACM_MACINTSTATRAW_HOSTPEND BSP_BIT32(1)
492#define TMS570_EMACM_MACINTSTATRAW_STATPEND BSP_BIT32(0)
497#define TMS570_EMACM_MACINTSTATMASKED_HOSTPEND BSP_BIT32(1)
500#define TMS570_EMACM_MACINTSTATMASKED_STATPEND BSP_BIT32(0)
505#define TMS570_EMACM_MACINTMASKSET_HOSTMASK BSP_BIT32(1)
508#define TMS570_EMACM_MACINTMASKSET_STATMASK BSP_BIT32(0)
513#define TMS570_EMACM_MACINTMASKCLEAR_HOSTMASK BSP_BIT32(1)
516#define TMS570_EMACM_MACINTMASKCLEAR_STATMASK BSP_BIT32(0)
521#define TMS570_EMACM_RXMBPENABLE_RXPASSCRC BSP_BIT32(30)
524#define TMS570_EMACM_RXMBPENABLE_RXQOSEN BSP_BIT32(29)
527#define TMS570_EMACM_RXMBPENABLE_RXNOCHAIN BSP_BIT32(28)
530#define TMS570_EMACM_RXMBPENABLE_RXCMFEN BSP_BIT32(24)
533#define TMS570_EMACM_RXMBPENABLE_RXCSFEN BSP_BIT32(23)
536#define TMS570_EMACM_RXMBPENABLE_RXCEFEN BSP_BIT32(22)
539#define TMS570_EMACM_RXMBPENABLE_RXCAFEN BSP_BIT32(21)
542#define TMS570_EMACM_RXMBPENABLE_RXPROMCH(val) BSP_FLD32(val,16, 18)
543#define TMS570_EMACM_RXMBPENABLE_RXPROMCH_GET(reg) BSP_FLD32GET(reg,16, 18)
544#define TMS570_EMACM_RXMBPENABLE_RXPROMCH_SET(reg,val) BSP_FLD32SET(reg, val,16, 18)
547#define TMS570_EMACM_RXMBPENABLE_RXBROADEN BSP_BIT32(13)
550#define TMS570_EMACM_RXMBPENABLE_RXBROADCH(val) BSP_FLD32(val,8, 10)
551#define TMS570_EMACM_RXMBPENABLE_RXBROADCH_GET(reg) BSP_FLD32GET(reg,8, 10)
552#define TMS570_EMACM_RXMBPENABLE_RXBROADCH_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
555#define TMS570_EMACM_RXMBPENABLE_RXMULTEN BSP_BIT32(5)
560#define TMS570_EMACM_RXUNICASTSET_RXCH7EN BSP_BIT32(7)
563#define TMS570_EMACM_RXUNICASTSET_RXCH6EN BSP_BIT32(6)
566#define TMS570_EMACM_RXUNICASTSET_RXCH5EN BSP_BIT32(5)
569#define TMS570_EMACM_RXUNICASTSET_RXCH4EN BSP_BIT32(4)
572#define TMS570_EMACM_RXUNICASTSET_RXCH3EN BSP_BIT32(3)
575#define TMS570_EMACM_RXUNICASTSET_RXCH2EN BSP_BIT32(2)
578#define TMS570_EMACM_RXUNICASTSET_RXCH1EN BSP_BIT32(1)
581#define TMS570_EMACM_RXUNICASTSET_RXCH0EN BSP_BIT32(0)
586#define TMS570_EMACM_RXUNICASTCLEAR_RXCH7EN BSP_BIT32(7)
589#define TMS570_EMACM_RXUNICASTCLEAR_RXCH6EN BSP_BIT32(6)
592#define TMS570_EMACM_RXUNICASTCLEAR_RXCH5EN BSP_BIT32(5)
595#define TMS570_EMACM_RXUNICASTCLEAR_RXCH4EN BSP_BIT32(4)
598#define TMS570_EMACM_RXUNICASTCLEAR_RXCH3EN BSP_BIT32(3)
601#define TMS570_EMACM_RXUNICASTCLEAR_RXCH2EN BSP_BIT32(2)
604#define TMS570_EMACM_RXUNICASTCLEAR_RXCH1EN BSP_BIT32(1)
607#define TMS570_EMACM_RXUNICASTCLEAR_RXCH0EN BSP_BIT32(0)
612#define TMS570_EMACM_RXMAXLEN_RXMAXLEN(val) BSP_FLD32(val,0, 15)
613#define TMS570_EMACM_RXMAXLEN_RXMAXLEN_GET(reg) BSP_FLD32GET(reg,0, 15)
614#define TMS570_EMACM_RXMAXLEN_RXMAXLEN_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
619#define TMS570_EMACM_RXBUFFEROFFSET_RXBUFFEROFFSET(val) BSP_FLD32(val,0, 15)
620#define TMS570_EMACM_RXBUFFEROFFSET_RXBUFFEROFFSET_GET(reg) BSP_FLD32GET(reg,0, 15)
621#define TMS570_EMACM_RXBUFFEROFFSET_RXBUFFEROFFSET_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
626#define TMS570_EMACM_RXFILTERLOWTHRESH_RXFILTERTHRESH(val) BSP_FLD32(val,0, 7)
627#define TMS570_EMACM_RXFILTERLOWTHRESH_RXFILTERTHRESH_GET(reg) BSP_FLD32GET(reg,0, 7)
628#define TMS570_EMACM_RXFILTERLOWTHRESH_RXFILTERTHRESH_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
633#define TMS570_EMACM_RXFLOWTHRESH_RXnFLOWTHRESH(val) BSP_FLD32(val,0, 7)
634#define TMS570_EMACM_RXFLOWTHRESH_RXnFLOWTHRESH_GET(reg) BSP_FLD32GET(reg,0, 7)
635#define TMS570_EMACM_RXFLOWTHRESH_RXnFLOWTHRESH_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
640#define TMS570_EMACM_RXFREEBUFFER_RXnFREEBUF(val) BSP_FLD32(val,0, 15)
641#define TMS570_EMACM_RXFREEBUFFER_RXnFREEBUF_GET(reg) BSP_FLD32GET(reg,0, 15)
642#define TMS570_EMACM_RXFREEBUFFER_RXnFREEBUF_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
647#define TMS570_EMACM_MACCONTROL_RMIISPEED BSP_BIT32(15)
650#define TMS570_EMACM_MACCONTROL_RXOFFLENBLOCK BSP_BIT32(14)
653#define TMS570_EMACM_MACCONTROL_RXOWNERSHIP BSP_BIT32(13)
656#define TMS570_EMACM_MACCONTROL_CMDIDLE BSP_BIT32(11)
659#define TMS570_EMACM_MACCONTROL_TXSHORTGAPEN BSP_BIT32(10)
662#define TMS570_EMACM_MACCONTROL_TXPTYPE BSP_BIT32(9)
665#define TMS570_EMACM_MACCONTROL_TXPACE BSP_BIT32(6)
668#define TMS570_EMACM_MACCONTROL_GMIIEN BSP_BIT32(5)
671#define TMS570_EMACM_MACCONTROL_TXFLOWEN BSP_BIT32(4)
674#define TMS570_EMACM_MACCONTROL_RXBUFFERFLOWEN BSP_BIT32(3)
677#define TMS570_EMACM_MACCONTROL_LOOPBACK BSP_BIT32(1)
680#define TMS570_EMACM_MACCONTROL_FULLDUPLEX BSP_BIT32(0)
685#define TMS570_EMACM_MACSTATUS_IDLE BSP_BIT32(31)
688#define TMS570_EMACM_MACSTATUS_TXERRCODE(val) BSP_FLD32(val,20, 23)
689#define TMS570_EMACM_MACSTATUS_TXERRCODE_GET(reg) BSP_FLD32GET(reg,20, 23)
690#define TMS570_EMACM_MACSTATUS_TXERRCODE_SET(reg,val) BSP_FLD32SET(reg, val,20, 23)
693#define TMS570_EMACM_MACSTATUS_TXERRCH(val) BSP_FLD32(val,16, 18)
694#define TMS570_EMACM_MACSTATUS_TXERRCH_GET(reg) BSP_FLD32GET(reg,16, 18)
695#define TMS570_EMACM_MACSTATUS_TXERRCH_SET(reg,val) BSP_FLD32SET(reg, val,16, 18)
698#define TMS570_EMACM_MACSTATUS_RXERRCODE(val) BSP_FLD32(val,12, 15)
699#define TMS570_EMACM_MACSTATUS_RXERRCODE_GET(reg) BSP_FLD32GET(reg,12, 15)
700#define TMS570_EMACM_MACSTATUS_RXERRCODE_SET(reg,val) BSP_FLD32SET(reg, val,12, 15)
703#define TMS570_EMACM_MACSTATUS_RXERRCH(val) BSP_FLD32(val,8, 10)
704#define TMS570_EMACM_MACSTATUS_RXERRCH_GET(reg) BSP_FLD32GET(reg,8, 10)
705#define TMS570_EMACM_MACSTATUS_RXERRCH_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
708#define TMS570_EMACM_MACSTATUS_RXQOSACT BSP_BIT32(2)
711#define TMS570_EMACM_MACSTATUS_RXFLOWACT BSP_BIT32(1)
714#define TMS570_EMACM_MACSTATUS_TXFLOWACT BSP_BIT32(0)
719#define TMS570_EMACM_EMCONTROL_SOFT BSP_BIT32(1)
722#define TMS570_EMACM_EMCONTROL_FREE BSP_BIT32(0)
727#define TMS570_EMACM_FIFOCONTROL_TXCELLTHRESH(val) BSP_FLD32(val,0, 1)
728#define TMS570_EMACM_FIFOCONTROL_TXCELLTHRESH_GET(reg) BSP_FLD32GET(reg,0, 1)
729#define TMS570_EMACM_FIFOCONTROL_TXCELLTHRESH_SET(reg,val) BSP_FLD32SET(reg, val,0, 1)
734#define TMS570_EMACM_MACCONFIG_TXCELLDEPTH(val) BSP_FLD32(val,24, 31)
735#define TMS570_EMACM_MACCONFIG_TXCELLDEPTH_GET(reg) BSP_FLD32GET(reg,24, 31)
736#define TMS570_EMACM_MACCONFIG_TXCELLDEPTH_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
739#define TMS570_EMACM_MACCONFIG_RXCELLDEPTH(val) BSP_FLD32(val,16, 23)
740#define TMS570_EMACM_MACCONFIG_RXCELLDEPTH_GET(reg) BSP_FLD32GET(reg,16, 23)
741#define TMS570_EMACM_MACCONFIG_RXCELLDEPTH_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
744#define TMS570_EMACM_MACCONFIG_ADDRESSTYPE(val) BSP_FLD32(val,8, 15)
745#define TMS570_EMACM_MACCONFIG_ADDRESSTYPE_GET(reg) BSP_FLD32GET(reg,8, 15)
746#define TMS570_EMACM_MACCONFIG_ADDRESSTYPE_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
749#define TMS570_EMACM_MACCONFIG_MACCFIG(val) BSP_FLD32(val,0, 7)
750#define TMS570_EMACM_MACCONFIG_MACCFIG_GET(reg) BSP_FLD32GET(reg,0, 7)
751#define TMS570_EMACM_MACCONFIG_MACCFIG_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
756#define TMS570_EMACM_SOFTRESET_SOFTRESET BSP_BIT32(0)
761#define TMS570_EMACM_MACSRCADDRLO_MACSRCADDR0(val) BSP_FLD32(val,8, 15)
762#define TMS570_EMACM_MACSRCADDRLO_MACSRCADDR0_GET(reg) BSP_FLD32GET(reg,8, 15)
763#define TMS570_EMACM_MACSRCADDRLO_MACSRCADDR0_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
766#define TMS570_EMACM_MACSRCADDRLO_MACSRCADDR1(val) BSP_FLD32(val,0, 7)
767#define TMS570_EMACM_MACSRCADDRLO_MACSRCADDR1_GET(reg) BSP_FLD32GET(reg,0, 7)
768#define TMS570_EMACM_MACSRCADDRLO_MACSRCADDR1_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
773#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR2(val) BSP_FLD32(val,24, 31)
774#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR2_GET(reg) BSP_FLD32GET(reg,24, 31)
775#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR2_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
778#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR3(val) BSP_FLD32(val,16, 23)
779#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR3_GET(reg) BSP_FLD32GET(reg,16, 23)
780#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR3_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
783#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR4(val) BSP_FLD32(val,8, 15)
784#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR4_GET(reg) BSP_FLD32GET(reg,8, 15)
785#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR4_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
788#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR5(val) BSP_FLD32(val,0, 7)
789#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR5_GET(reg) BSP_FLD32GET(reg,0, 7)
790#define TMS570_EMACM_MACSRCADDRHI_MACSRCADDR5_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
803#define TMS570_EMACM_BOFFTEST_RNDNUM(val) BSP_FLD32(val,16, 25)
804#define TMS570_EMACM_BOFFTEST_RNDNUM_GET(reg) BSP_FLD32GET(reg,16, 25)
805#define TMS570_EMACM_BOFFTEST_RNDNUM_SET(reg,val) BSP_FLD32SET(reg, val,16, 25)
808#define TMS570_EMACM_BOFFTEST_COLLCOUNT(val) BSP_FLD32(val,12, 15)
809#define TMS570_EMACM_BOFFTEST_COLLCOUNT_GET(reg) BSP_FLD32GET(reg,12, 15)
810#define TMS570_EMACM_BOFFTEST_COLLCOUNT_SET(reg,val) BSP_FLD32SET(reg, val,12, 15)
813#define TMS570_EMACM_BOFFTEST_TXBACKOFF(val) BSP_FLD32(val,0, 9)
814#define TMS570_EMACM_BOFFTEST_TXBACKOFF_GET(reg) BSP_FLD32GET(reg,0, 9)
815#define TMS570_EMACM_BOFFTEST_TXBACKOFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 9)
820#define TMS570_EMACM_TPACETEST_PACEVAL(val) BSP_FLD32(val,0, 4)
821#define TMS570_EMACM_TPACETEST_PACEVAL_GET(reg) BSP_FLD32GET(reg,0, 4)
822#define TMS570_EMACM_TPACETEST_PACEVAL_SET(reg,val) BSP_FLD32SET(reg, val,0, 4)
827#define TMS570_EMACM_RXPAUSE_PAUSETIMER(val) BSP_FLD32(val,0, 15)
828#define TMS570_EMACM_RXPAUSE_PAUSETIMER_GET(reg) BSP_FLD32GET(reg,0, 15)
829#define TMS570_EMACM_RXPAUSE_PAUSETIMER_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
834#define TMS570_EMACM_TXPAUSE_PAUSETIMER(val) BSP_FLD32(val,0, 15)
835#define TMS570_EMACM_TXPAUSE_PAUSETIMER_GET(reg) BSP_FLD32GET(reg,0, 15)
836#define TMS570_EMACM_TXPAUSE_PAUSETIMER_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
841#define TMS570_EMACM_MACADDRLO_VALID BSP_BIT32(20)
844#define TMS570_EMACM_MACADDRLO_MATCHFILT BSP_BIT32(19)
847#define TMS570_EMACM_MACADDRLO_CHANNEL(val) BSP_FLD32(val,16, 18)
848#define TMS570_EMACM_MACADDRLO_CHANNEL_GET(reg) BSP_FLD32GET(reg,16, 18)
849#define TMS570_EMACM_MACADDRLO_CHANNEL_SET(reg,val) BSP_FLD32SET(reg, val,16, 18)
852#define TMS570_EMACM_MACADDRLO_MACADDR0(val) BSP_FLD32(val,8, 15)
853#define TMS570_EMACM_MACADDRLO_MACADDR0_GET(reg) BSP_FLD32GET(reg,8, 15)
854#define TMS570_EMACM_MACADDRLO_MACADDR0_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
857#define TMS570_EMACM_MACADDRLO_MACADDR1(val) BSP_FLD32(val,0, 7)
858#define TMS570_EMACM_MACADDRLO_MACADDR1_GET(reg) BSP_FLD32GET(reg,0, 7)
859#define TMS570_EMACM_MACADDRLO_MACADDR1_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
864#define TMS570_EMACM_MACADDRHI_MACADDR2(val) BSP_FLD32(val,24, 31)
865#define TMS570_EMACM_MACADDRHI_MACADDR2_GET(reg) BSP_FLD32GET(reg,24, 31)
866#define TMS570_EMACM_MACADDRHI_MACADDR2_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
869#define TMS570_EMACM_MACADDRHI_MACADDR3(val) BSP_FLD32(val,16, 23)
870#define TMS570_EMACM_MACADDRHI_MACADDR3_GET(reg) BSP_FLD32GET(reg,16, 23)
871#define TMS570_EMACM_MACADDRHI_MACADDR3_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
874#define TMS570_EMACM_MACADDRHI_MACADDR4(val) BSP_FLD32(val,8, 15)
875#define TMS570_EMACM_MACADDRHI_MACADDR4_GET(reg) BSP_FLD32GET(reg,8, 15)
876#define TMS570_EMACM_MACADDRHI_MACADDR4_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
879#define TMS570_EMACM_MACADDRHI_MACADDR5(val) BSP_FLD32(val,0, 7)
880#define TMS570_EMACM_MACADDRHI_MACADDR5_GET(reg) BSP_FLD32GET(reg,0, 7)
881#define TMS570_EMACM_MACADDRHI_MACADDR5_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
886#define TMS570_EMACM_MACINDEX_MACINDEX(val) BSP_FLD32(val,0, 2)
887#define TMS570_EMACM_MACINDEX_MACINDEX_GET(reg) BSP_FLD32GET(reg,0, 2)
888#define TMS570_EMACM_MACINDEX_MACINDEX_SET(reg,val) BSP_FLD32SET(reg, val,0, 2)
This header file provides utility macros for BSPs.
Definition: reg_emacm.h:54