RTEMS
6.1-rc6
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bsps
arm
tms570
include
bsp
ti_herc
reg_dcc.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: BSD-2-Clause */
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/* The header file is generated by make_header.py from DCC.json */
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/* Current script's version can be found at: */
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/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
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/*
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* Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
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*
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* Czech Technical University in Prague
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* Zikova 1903/4
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* 166 36 Praha 6
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* Czech Republic
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are those
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* of the authors and should not be interpreted as representing official policies,
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* either expressed or implied, of the FreeBSD Project.
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*/
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#ifndef LIBBSP_ARM_TMS570_DCC
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#define LIBBSP_ARM_TMS570_DCC
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#include <
bsp/utility.h
>
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enum
tms570_dcc1_cnt0_clksrc
{
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DCC1_CNT0_HF_LPO
= 0x5U,
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DCC1_CNT0_TCK
= 0xAU,
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DCC1_CNT0_OSCIN
= 0xFU,
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};
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typedef
struct
{
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uint32_t GCTRL;
/*DCC Global Control Register*/
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uint32_t REV;
/*DCC Revision Id Register*/
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uint32_t CNT0SEED;
/*DCC Counter0 Seed Register*/
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uint32_t VALID0SEED;
/*DCC Valid0 Seed Register*/
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uint32_t CNT1SEED;
/*DCC Counter1 Seed Register*/
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uint32_t STAT;
/*DCC Status Register*/
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uint32_t CNT0;
/*DCC Counter0 Value Register*/
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uint32_t VALID0;
/*DCC Valid0 Value Register*/
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uint32_t CNT1;
/*DCC Counter1 Value Register*/
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uint32_t CNT1CLKSRC;
/*DCC Counter1 Clock Source Selection Register*/
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uint32_t CNT0CLKSRC;
/*DCC Counter0 Clock Source Selection Register*/
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}
tms570_dcc_t
;
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/*----------------------TMS570_DCC_GCTRL----------------------*/
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/* field: DONE_INT_ENA - Done Interrupt Enable. */
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#define TMS570_DCC_GCTRL_DONE_INT_ENA(val) BSP_FLD32(val,12, 15)
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#define TMS570_DCC_GCTRL_DONE_INT_ENA_GET(reg) BSP_FLD32GET(reg,12, 15)
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#define TMS570_DCC_GCTRL_DONE_INT_ENA_SET(reg,val) BSP_FLD32SET(reg, val,12, 15)
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/* field: SINGLE_SHOT - Single-Shot Mode Enable. */
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#define TMS570_DCC_GCTRL_SINGLE_SHOT(val) BSP_FLD32(val,8, 11)
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#define TMS570_DCC_GCTRL_SINGLE_SHOT_GET(reg) BSP_FLD32GET(reg,8, 11)
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#define TMS570_DCC_GCTRL_SINGLE_SHOT_SET(reg,val) BSP_FLD32SET(reg, val,8, 11)
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/* field: ERR_ENA - Error Interrupt Enable. */
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#define TMS570_DCC_GCTRL_ERR_ENA(val) BSP_FLD32(val,4, 7)
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#define TMS570_DCC_GCTRL_ERR_ENA_GET(reg) BSP_FLD32GET(reg,4, 7)
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#define TMS570_DCC_GCTRL_ERR_ENA_SET(reg,val) BSP_FLD32SET(reg, val,4, 7)
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/* field: DCC_ENA - DCC Enable. */
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#define TMS570_DCC_GCTRL_DCC_ENA(val) BSP_FLD32(val,0, 3)
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#define TMS570_DCC_GCTRL_DCC_ENA_GET(reg) BSP_FLD32GET(reg,0, 3)
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#define TMS570_DCC_GCTRL_DCC_ENA_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
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/*-----------------------TMS570_DCC_REV-----------------------*/
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/* field: SCHEME - Reads return 01, writes have no effect. */
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#define TMS570_DCC_REV_SCHEME(val) BSP_FLD32(val,30, 31)
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#define TMS570_DCC_REV_SCHEME_GET(reg) BSP_FLD32GET(reg,30, 31)
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#define TMS570_DCC_REV_SCHEME_SET(reg,val) BSP_FLD32SET(reg, val,30, 31)
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/* field: FUNC - Functional release number. Reads return 0x000, writes have no effect. */
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#define TMS570_DCC_REV_FUNC(val) BSP_FLD32(val,16, 27)
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#define TMS570_DCC_REV_FUNC_GET(reg) BSP_FLD32GET(reg,16, 27)
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#define TMS570_DCC_REV_FUNC_SET(reg,val) BSP_FLD32SET(reg, val,16, 27)
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/* field: RTL - Design release number. Reads return 0x00, writes have no effect. */
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#define TMS570_DCC_REV_RTL(val) BSP_FLD32(val,11, 15)
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#define TMS570_DCC_REV_RTL_GET(reg) BSP_FLD32GET(reg,11, 15)
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#define TMS570_DCC_REV_RTL_SET(reg,val) BSP_FLD32SET(reg, val,11, 15)
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/* field: MAJOR - Major revision number. Reads return 0x2, writes have no effect. */
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#define TMS570_DCC_REV_MAJOR(val) BSP_FLD32(val,8, 10)
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#define TMS570_DCC_REV_MAJOR_GET(reg) BSP_FLD32GET(reg,8, 10)
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#define TMS570_DCC_REV_MAJOR_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
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/* field: CUSTOM - Custom version number. Reads return 0x0, writes have no effect. */
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#define TMS570_DCC_REV_CUSTOM(val) BSP_FLD32(val,6, 7)
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#define TMS570_DCC_REV_CUSTOM_GET(reg) BSP_FLD32GET(reg,6, 7)
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#define TMS570_DCC_REV_CUSTOM_SET(reg,val) BSP_FLD32SET(reg, val,6, 7)
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/* field: MINOR - Minor revision number. Reads return 0x4, writes have no effect. */
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#define TMS570_DCC_REV_MINOR(val) BSP_FLD32(val,0, 5)
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#define TMS570_DCC_REV_MINOR_GET(reg) BSP_FLD32GET(reg,0, 5)
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#define TMS570_DCC_REV_MINOR_SET(reg,val) BSP_FLD32SET(reg, val,0, 5)
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/*--------------------TMS570_DCC_CNT0SEED--------------------*/
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/* field: COUNT0_SEED - Seed value for DCC Counter0. */
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#define TMS570_DCC_CNT0SEED_COUNT0_SEED(val) BSP_FLD32(val,0, 19)
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#define TMS570_DCC_CNT0SEED_COUNT0_SEED_GET(reg) BSP_FLD32GET(reg,0, 19)
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#define TMS570_DCC_CNT0SEED_COUNT0_SEED_SET(reg,val) BSP_FLD32SET(reg, val,0, 19)
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/*-------------------TMS570_DCC_VALID0SEED-------------------*/
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/* field: VALID0_SEED - XXX */
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#define TMS570_DCC_VALID0SEED_VALID0_SEED(val) BSP_FLD32(val,0, 15)
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#define TMS570_DCC_VALID0SEED_VALID0_SEED_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_DCC_VALID0SEED_VALID0_SEED_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*--------------------TMS570_DCC_CNT1SEED--------------------*/
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/* field: COUNT1_SEED - Seed value for DCC Counter1. */
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#define TMS570_DCC_CNT1SEED_COUNT1_SEED(val) BSP_FLD32(val,0, 19)
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#define TMS570_DCC_CNT1SEED_COUNT1_SEED_GET(reg) BSP_FLD32GET(reg,0, 19)
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#define TMS570_DCC_CNT1SEED_COUNT1_SEED_SET(reg,val) BSP_FLD32SET(reg, val,0, 19)
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/*----------------------TMS570_DCC_STAT----------------------*/
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/* field: DONE_FLG - Single-Shot Sequence Done flag. */
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#define TMS570_DCC_STAT_DONE_FLG BSP_BIT32(1)
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/* field: ERR_FLG - Error flag. Indicates that a DCC error has occurred. */
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#define TMS570_DCC_STAT_ERR_FLG BSP_BIT32(0)
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/*----------------------TMS570_DCC_CNT0----------------------*/
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/* field: COUNT0 - Current value of DCC Counter0. */
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#define TMS570_DCC_CNT0_COUNT0(val) BSP_FLD32(val,0, 19)
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#define TMS570_DCC_CNT0_COUNT0_GET(reg) BSP_FLD32GET(reg,0, 19)
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#define TMS570_DCC_CNT0_COUNT0_SET(reg,val) BSP_FLD32SET(reg, val,0, 19)
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/*---------------------TMS570_DCC_VALID0---------------------*/
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/* field: VALID0 - Current value for DCC Valid0. */
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#define TMS570_DCC_VALID0_VALID0(val) BSP_FLD32(val,0, 15)
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#define TMS570_DCC_VALID0_VALID0_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_DCC_VALID0_VALID0_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*----------------------TMS570_DCC_CNT1----------------------*/
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/* field: COUNT1 - Current value for DCC Counter1. */
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#define TMS570_DCC_CNT1_COUNT1(val) BSP_FLD32(val,0, 19)
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#define TMS570_DCC_CNT1_COUNT1_GET(reg) BSP_FLD32GET(reg,0, 19)
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#define TMS570_DCC_CNT1_COUNT1_SET(reg,val) BSP_FLD32SET(reg, val,0, 19)
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/*-------------------TMS570_DCC_CNT1CLKSRC-------------------*/
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/* field: KEY - Key to enable clock source selection for Counter1. */
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#define TMS570_DCC_CNT1CLKSRC_KEY(val) BSP_FLD32(val,12, 15)
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#define TMS570_DCC_CNT1CLKSRC_KEY_GET(reg) BSP_FLD32GET(reg,12, 15)
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#define TMS570_DCC_CNT1CLKSRC_KEY_SET(reg,val) BSP_FLD32SET(reg, val,12, 15)
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/* field: CNT1_CLKSRC - Clock Source for Counter1 when KEY is programmed to be 0xA. */
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#define TMS570_DCC_CNT1CLKSRC_CNT1_CLKSRC(val) BSP_FLD32(val,0, 3)
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#define TMS570_DCC_CNT1CLKSRC_CNT1_CLKSRC_GET(reg) BSP_FLD32GET(reg,0, 3)
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#define TMS570_DCC_CNT1CLKSRC_CNT1_CLKSRC_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
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/*-------------------TMS570_DCC_CNT0CLKSRC-------------------*/
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/* field: CNT0_CLKSRC - Clock Source for Counter0 */
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#define TMS570_DCC_CNT0CLKSRC_CNT0_CLKSRC(val) BSP_FLD32(val,0, 3)
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#define TMS570_DCC_CNT0CLKSRC_CNT0_CLKSRC_GET(reg) BSP_FLD32GET(reg,0, 3)
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#define TMS570_DCC_CNT0CLKSRC_CNT0_CLKSRC_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
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#endif
/* LIBBSP_ARM_TMS570_DCC */
utility.h
This header file provides utility macros for BSPs.
tms570_dcc1_cnt0_clksrc
tms570_dcc1_cnt0_clksrc
Definition:
reg_dcc.h:54
DCC1_CNT0_HF_LPO
@ DCC1_CNT0_HF_LPO
Definition:
reg_dcc.h:55
DCC1_CNT0_TCK
@ DCC1_CNT0_TCK
Definition:
reg_dcc.h:56
DCC1_CNT0_OSCIN
@ DCC1_CNT0_OSCIN
Definition:
reg_dcc.h:57
tms570_dcc_t
Definition:
reg_dcc.h:60
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