RTEMS 6.1-rc6
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mmctrl-regs.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * Copyright (C) 2021 embedded brains GmbH & Co. KG
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36/*
37 * This file is part of the RTEMS quality process and was automatically
38 * generated. If you find something that needs to be fixed or
39 * worded better please post a report or patch to an RTEMS mailing list
40 * or raise a bug report:
41 *
42 * https://www.rtems.org/bugs.html
43 *
44 * For information on updating and regenerating please refer to the How-To
45 * section in the Software Requirements Engineering chapter of the
46 * RTEMS Software Engineering manual. The manual is provided as a part of
47 * a release. For development sources please refer to the online
48 * documentation at:
49 *
50 * https://docs.rtems.org
51 */
52
53/* Generated from spec:/dev/grlib/if/mmctrl-header */
54
55#ifndef _GRLIB_MMCTRL_REGS_H
56#define _GRLIB_MMCTRL_REGS_H
57
58#include <stdint.h>
59
60#ifdef __cplusplus
61extern "C" {
62#endif
63
64/* Generated from spec:/dev/grlib/if/mmctrl */
65
85#define MMCTRL_SDCFG1_RF 0x80000000U
86
87#define MMCTRL_SDCFG1_TRP 0x40000000U
88
89#define MMCTRL_SDCFG1_TRFC_SHIFT 27
90#define MMCTRL_SDCFG1_TRFC_MASK 0x38000000U
91#define MMCTRL_SDCFG1_TRFC_GET( _reg ) \
92 ( ( ( _reg ) & MMCTRL_SDCFG1_TRFC_MASK ) >> \
93 MMCTRL_SDCFG1_TRFC_SHIFT )
94#define MMCTRL_SDCFG1_TRFC_SET( _reg, _val ) \
95 ( ( ( _reg ) & ~MMCTRL_SDCFG1_TRFC_MASK ) | \
96 ( ( ( _val ) << MMCTRL_SDCFG1_TRFC_SHIFT ) & \
97 MMCTRL_SDCFG1_TRFC_MASK ) )
98#define MMCTRL_SDCFG1_TRFC( _val ) \
99 ( ( ( _val ) << MMCTRL_SDCFG1_TRFC_SHIFT ) & \
100 MMCTRL_SDCFG1_TRFC_MASK )
101
102#define MMCTRL_SDCFG1_TC 0x4000000U
103
104#define MMCTRL_SDCFG1_BANKSZ_SHIFT 23
105#define MMCTRL_SDCFG1_BANKSZ_MASK 0x3800000U
106#define MMCTRL_SDCFG1_BANKSZ_GET( _reg ) \
107 ( ( ( _reg ) & MMCTRL_SDCFG1_BANKSZ_MASK ) >> \
108 MMCTRL_SDCFG1_BANKSZ_SHIFT )
109#define MMCTRL_SDCFG1_BANKSZ_SET( _reg, _val ) \
110 ( ( ( _reg ) & ~MMCTRL_SDCFG1_BANKSZ_MASK ) | \
111 ( ( ( _val ) << MMCTRL_SDCFG1_BANKSZ_SHIFT ) & \
112 MMCTRL_SDCFG1_BANKSZ_MASK ) )
113#define MMCTRL_SDCFG1_BANKSZ( _val ) \
114 ( ( ( _val ) << MMCTRL_SDCFG1_BANKSZ_SHIFT ) & \
115 MMCTRL_SDCFG1_BANKSZ_MASK )
116
117#define MMCTRL_SDCFG1_COLSZ_SHIFT 21
118#define MMCTRL_SDCFG1_COLSZ_MASK 0x600000U
119#define MMCTRL_SDCFG1_COLSZ_GET( _reg ) \
120 ( ( ( _reg ) & MMCTRL_SDCFG1_COLSZ_MASK ) >> \
121 MMCTRL_SDCFG1_COLSZ_SHIFT )
122#define MMCTRL_SDCFG1_COLSZ_SET( _reg, _val ) \
123 ( ( ( _reg ) & ~MMCTRL_SDCFG1_COLSZ_MASK ) | \
124 ( ( ( _val ) << MMCTRL_SDCFG1_COLSZ_SHIFT ) & \
125 MMCTRL_SDCFG1_COLSZ_MASK ) )
126#define MMCTRL_SDCFG1_COLSZ( _val ) \
127 ( ( ( _val ) << MMCTRL_SDCFG1_COLSZ_SHIFT ) & \
128 MMCTRL_SDCFG1_COLSZ_MASK )
129
130#define MMCTRL_SDCFG1_COMMAND_SHIFT 18
131#define MMCTRL_SDCFG1_COMMAND_MASK 0x1c0000U
132#define MMCTRL_SDCFG1_COMMAND_GET( _reg ) \
133 ( ( ( _reg ) & MMCTRL_SDCFG1_COMMAND_MASK ) >> \
134 MMCTRL_SDCFG1_COMMAND_SHIFT )
135#define MMCTRL_SDCFG1_COMMAND_SET( _reg, _val ) \
136 ( ( ( _reg ) & ~MMCTRL_SDCFG1_COMMAND_MASK ) | \
137 ( ( ( _val ) << MMCTRL_SDCFG1_COMMAND_SHIFT ) & \
138 MMCTRL_SDCFG1_COMMAND_MASK ) )
139#define MMCTRL_SDCFG1_COMMAND( _val ) \
140 ( ( ( _val ) << MMCTRL_SDCFG1_COMMAND_SHIFT ) & \
141 MMCTRL_SDCFG1_COMMAND_MASK )
142
143#define MMCTRL_SDCFG1_MS 0x10000U
144
145#define MMCTRL_SDCFG1_64 0x8000U
146
147#define MMCTRL_SDCFG1_RFLOAD_SHIFT 0
148#define MMCTRL_SDCFG1_RFLOAD_MASK 0x7fffU
149#define MMCTRL_SDCFG1_RFLOAD_GET( _reg ) \
150 ( ( ( _reg ) & MMCTRL_SDCFG1_RFLOAD_MASK ) >> \
151 MMCTRL_SDCFG1_RFLOAD_SHIFT )
152#define MMCTRL_SDCFG1_RFLOAD_SET( _reg, _val ) \
153 ( ( ( _reg ) & ~MMCTRL_SDCFG1_RFLOAD_MASK ) | \
154 ( ( ( _val ) << MMCTRL_SDCFG1_RFLOAD_SHIFT ) & \
155 MMCTRL_SDCFG1_RFLOAD_MASK ) )
156#define MMCTRL_SDCFG1_RFLOAD( _val ) \
157 ( ( ( _val ) << MMCTRL_SDCFG1_RFLOAD_SHIFT ) & \
158 MMCTRL_SDCFG1_RFLOAD_MASK )
159
171#define MMCTRL_SDCFG2_CE 0x40000000U
172
173#define MMCTRL_SDCFG2_EN2T 0x8000U
174
175#define MMCTRL_SDCFG2_DCS 0x4000U
176
177#define MMCTRL_SDCFG2_BPARK 0x2000U
178
189#define MMCTRL_MUXCFG_ERRLOC_SHIFT 20
190#define MMCTRL_MUXCFG_ERRLOC_MASK 0xfff00000U
191#define MMCTRL_MUXCFG_ERRLOC_GET( _reg ) \
192 ( ( ( _reg ) & MMCTRL_MUXCFG_ERRLOC_MASK ) >> \
193 MMCTRL_MUXCFG_ERRLOC_SHIFT )
194#define MMCTRL_MUXCFG_ERRLOC_SET( _reg, _val ) \
195 ( ( ( _reg ) & ~MMCTRL_MUXCFG_ERRLOC_MASK ) | \
196 ( ( ( _val ) << MMCTRL_MUXCFG_ERRLOC_SHIFT ) & \
197 MMCTRL_MUXCFG_ERRLOC_MASK ) )
198#define MMCTRL_MUXCFG_ERRLOC( _val ) \
199 ( ( ( _val ) << MMCTRL_MUXCFG_ERRLOC_SHIFT ) & \
200 MMCTRL_MUXCFG_ERRLOC_MASK )
201
202#define MMCTRL_MUXCFG_DDERR 0x80000U
203
204#define MMCTRL_MUXCFG_DWIDTH_SHIFT 16
205#define MMCTRL_MUXCFG_DWIDTH_MASK 0x70000U
206#define MMCTRL_MUXCFG_DWIDTH_GET( _reg ) \
207 ( ( ( _reg ) & MMCTRL_MUXCFG_DWIDTH_MASK ) >> \
208 MMCTRL_MUXCFG_DWIDTH_SHIFT )
209#define MMCTRL_MUXCFG_DWIDTH_SET( _reg, _val ) \
210 ( ( ( _reg ) & ~MMCTRL_MUXCFG_DWIDTH_MASK ) | \
211 ( ( ( _val ) << MMCTRL_MUXCFG_DWIDTH_SHIFT ) & \
212 MMCTRL_MUXCFG_DWIDTH_MASK ) )
213#define MMCTRL_MUXCFG_DWIDTH( _val ) \
214 ( ( ( _val ) << MMCTRL_MUXCFG_DWIDTH_SHIFT ) & \
215 MMCTRL_MUXCFG_DWIDTH_MASK )
216
217#define MMCTRL_MUXCFG_BEID_SHIFT 12
218#define MMCTRL_MUXCFG_BEID_MASK 0xf000U
219#define MMCTRL_MUXCFG_BEID_GET( _reg ) \
220 ( ( ( _reg ) & MMCTRL_MUXCFG_BEID_MASK ) >> \
221 MMCTRL_MUXCFG_BEID_SHIFT )
222#define MMCTRL_MUXCFG_BEID_SET( _reg, _val ) \
223 ( ( ( _reg ) & ~MMCTRL_MUXCFG_BEID_MASK ) | \
224 ( ( ( _val ) << MMCTRL_MUXCFG_BEID_SHIFT ) & \
225 MMCTRL_MUXCFG_BEID_MASK ) )
226#define MMCTRL_MUXCFG_BEID( _val ) \
227 ( ( ( _val ) << MMCTRL_MUXCFG_BEID_SHIFT ) & \
228 MMCTRL_MUXCFG_BEID_MASK )
229
230#define MMCTRL_MUXCFG_DATAMUX_SHIFT 5
231#define MMCTRL_MUXCFG_DATAMUX_MASK 0xe0U
232#define MMCTRL_MUXCFG_DATAMUX_GET( _reg ) \
233 ( ( ( _reg ) & MMCTRL_MUXCFG_DATAMUX_MASK ) >> \
234 MMCTRL_MUXCFG_DATAMUX_SHIFT )
235#define MMCTRL_MUXCFG_DATAMUX_SET( _reg, _val ) \
236 ( ( ( _reg ) & ~MMCTRL_MUXCFG_DATAMUX_MASK ) | \
237 ( ( ( _val ) << MMCTRL_MUXCFG_DATAMUX_SHIFT ) & \
238 MMCTRL_MUXCFG_DATAMUX_MASK ) )
239#define MMCTRL_MUXCFG_DATAMUX( _val ) \
240 ( ( ( _val ) << MMCTRL_MUXCFG_DATAMUX_SHIFT ) & \
241 MMCTRL_MUXCFG_DATAMUX_MASK )
242
243#define MMCTRL_MUXCFG_CEN 0x10U
244
245#define MMCTRL_MUXCFG_BAUPD 0x8U
246
247#define MMCTRL_MUXCFG_BAEN 0x4U
248
249#define MMCTRL_MUXCFG_CODE 0x2U
250
251#define MMCTRL_MUXCFG_EDEN 0x1U
252
263#define MMCTRL_FTDA_FTDA_SHIFT 2
264#define MMCTRL_FTDA_FTDA_MASK 0xfffffffcU
265#define MMCTRL_FTDA_FTDA_GET( _reg ) \
266 ( ( ( _reg ) & MMCTRL_FTDA_FTDA_MASK ) >> \
267 MMCTRL_FTDA_FTDA_SHIFT )
268#define MMCTRL_FTDA_FTDA_SET( _reg, _val ) \
269 ( ( ( _reg ) & ~MMCTRL_FTDA_FTDA_MASK ) | \
270 ( ( ( _val ) << MMCTRL_FTDA_FTDA_SHIFT ) & \
271 MMCTRL_FTDA_FTDA_MASK ) )
272#define MMCTRL_FTDA_FTDA( _val ) \
273 ( ( ( _val ) << MMCTRL_FTDA_FTDA_SHIFT ) & \
274 MMCTRL_FTDA_FTDA_MASK )
275
286#define MMCTRL_FTDC_CBD_SHIFT 24
287#define MMCTRL_FTDC_CBD_MASK 0xff000000U
288#define MMCTRL_FTDC_CBD_GET( _reg ) \
289 ( ( ( _reg ) & MMCTRL_FTDC_CBD_MASK ) >> \
290 MMCTRL_FTDC_CBD_SHIFT )
291#define MMCTRL_FTDC_CBD_SET( _reg, _val ) \
292 ( ( ( _reg ) & ~MMCTRL_FTDC_CBD_MASK ) | \
293 ( ( ( _val ) << MMCTRL_FTDC_CBD_SHIFT ) & \
294 MMCTRL_FTDC_CBD_MASK ) )
295#define MMCTRL_FTDC_CBD( _val ) \
296 ( ( ( _val ) << MMCTRL_FTDC_CBD_SHIFT ) & \
297 MMCTRL_FTDC_CBD_MASK )
298
299#define MMCTRL_FTDC_CBC_SHIFT 16
300#define MMCTRL_FTDC_CBC_MASK 0xff0000U
301#define MMCTRL_FTDC_CBC_GET( _reg ) \
302 ( ( ( _reg ) & MMCTRL_FTDC_CBC_MASK ) >> \
303 MMCTRL_FTDC_CBC_SHIFT )
304#define MMCTRL_FTDC_CBC_SET( _reg, _val ) \
305 ( ( ( _reg ) & ~MMCTRL_FTDC_CBC_MASK ) | \
306 ( ( ( _val ) << MMCTRL_FTDC_CBC_SHIFT ) & \
307 MMCTRL_FTDC_CBC_MASK ) )
308#define MMCTRL_FTDC_CBC( _val ) \
309 ( ( ( _val ) << MMCTRL_FTDC_CBC_SHIFT ) & \
310 MMCTRL_FTDC_CBC_MASK )
311
312#define MMCTRL_FTDC_CBB_SHIFT 8
313#define MMCTRL_FTDC_CBB_MASK 0xff00U
314#define MMCTRL_FTDC_CBB_GET( _reg ) \
315 ( ( ( _reg ) & MMCTRL_FTDC_CBB_MASK ) >> \
316 MMCTRL_FTDC_CBB_SHIFT )
317#define MMCTRL_FTDC_CBB_SET( _reg, _val ) \
318 ( ( ( _reg ) & ~MMCTRL_FTDC_CBB_MASK ) | \
319 ( ( ( _val ) << MMCTRL_FTDC_CBB_SHIFT ) & \
320 MMCTRL_FTDC_CBB_MASK ) )
321#define MMCTRL_FTDC_CBB( _val ) \
322 ( ( ( _val ) << MMCTRL_FTDC_CBB_SHIFT ) & \
323 MMCTRL_FTDC_CBB_MASK )
324
325#define MMCTRL_FTDC_CBA_SHIFT 0
326#define MMCTRL_FTDC_CBA_MASK 0xffU
327#define MMCTRL_FTDC_CBA_GET( _reg ) \
328 ( ( ( _reg ) & MMCTRL_FTDC_CBA_MASK ) >> \
329 MMCTRL_FTDC_CBA_SHIFT )
330#define MMCTRL_FTDC_CBA_SET( _reg, _val ) \
331 ( ( ( _reg ) & ~MMCTRL_FTDC_CBA_MASK ) | \
332 ( ( ( _val ) << MMCTRL_FTDC_CBA_SHIFT ) & \
333 MMCTRL_FTDC_CBA_MASK ) )
334#define MMCTRL_FTDC_CBA( _val ) \
335 ( ( ( _val ) << MMCTRL_FTDC_CBA_SHIFT ) & \
336 MMCTRL_FTDC_CBA_MASK )
337
348#define MMCTRL_FTDD_DATA_SHIFT 0
349#define MMCTRL_FTDD_DATA_MASK 0xffffffffU
350#define MMCTRL_FTDD_DATA_GET( _reg ) \
351 ( ( ( _reg ) & MMCTRL_FTDD_DATA_MASK ) >> \
352 MMCTRL_FTDD_DATA_SHIFT )
353#define MMCTRL_FTDD_DATA_SET( _reg, _val ) \
354 ( ( ( _reg ) & ~MMCTRL_FTDD_DATA_MASK ) | \
355 ( ( ( _val ) << MMCTRL_FTDD_DATA_SHIFT ) & \
356 MMCTRL_FTDD_DATA_MASK ) )
357#define MMCTRL_FTDD_DATA( _val ) \
358 ( ( ( _val ) << MMCTRL_FTDD_DATA_SHIFT ) & \
359 MMCTRL_FTDD_DATA_MASK )
360
371#define MMCTRL_FTBND_FTBND_31_3_SHIFT 3
372#define MMCTRL_FTBND_FTBND_31_3_MASK 0xfffffff8U
373#define MMCTRL_FTBND_FTBND_31_3_GET( _reg ) \
374 ( ( ( _reg ) & MMCTRL_FTBND_FTBND_31_3_MASK ) >> \
375 MMCTRL_FTBND_FTBND_31_3_SHIFT )
376#define MMCTRL_FTBND_FTBND_31_3_SET( _reg, _val ) \
377 ( ( ( _reg ) & ~MMCTRL_FTBND_FTBND_31_3_MASK ) | \
378 ( ( ( _val ) << MMCTRL_FTBND_FTBND_31_3_SHIFT ) & \
379 MMCTRL_FTBND_FTBND_31_3_MASK ) )
380#define MMCTRL_FTBND_FTBND_31_3( _val ) \
381 ( ( ( _val ) << MMCTRL_FTBND_FTBND_31_3_SHIFT ) & \
382 MMCTRL_FTBND_FTBND_31_3_MASK )
383
389typedef struct mmctrl {
393 uint32_t sdcfg1;
394
398 uint32_t sdcfg2;
399
400 uint32_t reserved_8_20[ 6 ];
401
405 uint32_t muxcfg;
406
410 uint32_t ftda;
411
415 uint32_t ftdc;
416
420 uint32_t ftdd;
421
425 uint32_t ftbnd;
426} mmctrl;
427
430#ifdef __cplusplus
431}
432#endif
433
434#endif /* _GRLIB_MMCTRL_REGS_H */
mmctrl
This structure defines the MMCTRL register block memory map.
Definition: mmctrl-regs.h:389
mmctrl::ftdc
uint32_t ftdc
See FT diagnostic checkbits register (FTDC).
Definition: mmctrl-regs.h:415
mmctrl::sdcfg1
uint32_t sdcfg1
See SDRAM configuration register 1 (SDCFG1).
Definition: mmctrl-regs.h:393
mmctrl::sdcfg2
uint32_t sdcfg2
See SDRAM configuration register 2 (SDCFG2).
Definition: mmctrl-regs.h:398
mmctrl::muxcfg
uint32_t muxcfg
See Mux configuration register (MUXCFG).
Definition: mmctrl-regs.h:405
mmctrl::ftbnd
uint32_t ftbnd
See FT boundary address register (FTBND).
Definition: mmctrl-regs.h:425
mmctrl::ftda
uint32_t ftda
See FT diagnostic address register (FTDA).
Definition: mmctrl-regs.h:410
mmctrl::ftdd
uint32_t ftdd
See FT diagnostic data register (FTDD).
Definition: mmctrl-regs.h:420
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