RTEMS 6.1-rc6
Loading...
Searching...
No Matches
idt.h
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 * Copyright (c) 2018 Amaan Cheval <amaan.cheval@gmail.com>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#ifndef _RTEMS_SCORE_IDT_H
29#define _RTEMS_SCORE_IDT_H
30
32#include <rtems/rtems/intr.h>
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
38#define IDT_INTERRUPT_GATE (0b1110)
39#define IDT_PRESENT (0b10000000)
40
41/*
42 * XXX: The IDT size should be smaller given that we likely won't map all 256
43 * vectors, but for simplicity, this works better.
44 */
45#define IDT_SIZE 256
46
47/* Target vector number for spurious IRQs */
48#define BSP_VECTOR_SPURIOUS 0xFF
49/* Target vector number for the APIC timer */
50#define BSP_VECTOR_APIC_TIMER 32
51/* Target vector number for the APIC timer */
52#define BSP_VECTOR_IPI 33
53
54typedef struct _interrupt_descriptor {
55 uint16_t offset_0; // bits 0-15
56 uint16_t segment_selector; // a segment selector in the GDT or LDT
57 /* bits 0-2 are the offset into the IST, stored in the TSS */
58 uint8_t interrupt_stack_table;
59 uint8_t type_and_attributes;
60 uint16_t offset_1; // bits 16-31
61 uint32_t offset_2; // bits 32-63
62 uint32_t reserved_zero;
64
65struct idt_record {
66 uint16_t limit; /* Size of IDT array - 1 */
67 uintptr_t base; /* Pointer to IDT array */
69
70extern interrupt_descriptor amd64_idt[IDT_SIZE];
71extern struct idt_record amd64_idtr;
72
74 sizeof(struct idt_record) == 10,
75 "IDT pointer must be exactly 10 bytes"
76);
77
78void lidt(struct idt_record *idtr);
79
80interrupt_descriptor amd64_create_interrupt_descriptor(
81 uintptr_t handler, uint8_t types_and_attributes
82);
83
84uintptr_t amd64_get_handler_from_idt(uint32_t vector);
85
86void amd64_install_raw_interrupt(
87 uint32_t vector, uintptr_t new_handler, uintptr_t *old_handler
88);
89
90/*
91 * Called by _ISR_Handler to dispatch "RTEMS interrupts", i.e. call the
92 * registered RTEMS ISR.
93 */
94void amd64_dispatch_isr(rtems_vector_number vector);
95
96/* Defined in isr_handler.S */
97extern void rtems_irq_prologue_0(void);
98extern void rtems_irq_prologue_1(void);
99extern void rtems_irq_prologue_2(void);
100extern void rtems_irq_prologue_3(void);
101extern void rtems_irq_prologue_4(void);
102extern void rtems_irq_prologue_5(void);
103extern void rtems_irq_prologue_6(void);
104extern void rtems_irq_prologue_7(void);
105extern void rtems_irq_prologue_8(void);
106extern void rtems_irq_prologue_9(void);
107extern void rtems_irq_prologue_10(void);
108extern void rtems_irq_prologue_11(void);
109extern void rtems_irq_prologue_12(void);
110extern void rtems_irq_prologue_13(void);
111extern void rtems_irq_prologue_14(void);
112extern void rtems_irq_prologue_15(void);
113extern void rtems_irq_prologue_16(void);
114extern void rtems_irq_prologue_17(void);
115extern void rtems_irq_prologue_18(void);
116extern void rtems_irq_prologue_19(void);
117extern void rtems_irq_prologue_20(void);
118extern void rtems_irq_prologue_21(void);
119extern void rtems_irq_prologue_22(void);
120extern void rtems_irq_prologue_23(void);
121extern void rtems_irq_prologue_24(void);
122extern void rtems_irq_prologue_25(void);
123extern void rtems_irq_prologue_26(void);
124extern void rtems_irq_prologue_27(void);
125extern void rtems_irq_prologue_28(void);
126extern void rtems_irq_prologue_29(void);
127extern void rtems_irq_prologue_30(void);
128extern void rtems_irq_prologue_31(void);
129extern void rtems_irq_prologue_32(void);
130extern void rtems_irq_prologue_33(void);
131
132#ifdef __cplusplus
133}
134#endif
135
136#endif
This header file provides basic definitions used by the API and the implementation.
#define RTEMS_STATIC_ASSERT(_cond, _msg)
It is defined if a static analysis run is performed.
Definition: basedefs.h:841
ISR_Vector_number rtems_vector_number
This integer type represents interrupt vector numbers.
Definition: intr.h:102
This header file defines the Interrupt Manager API.
Used for passing and retrieving registers content to/from real mode interrupt call.
Definition: realmode_int.h:43
Definition: idt.h:54
Definition: idt.h:65