37#ifndef LIBBSP_ARM_SHARED_ARM_GIC_IRQ_H
38#define LIBBSP_ARM_SHARED_ARM_GIC_IRQ_H
53#define ARM_GIC_IRQ_SGI_0 0
54#define ARM_GIC_IRQ_SGI_1 1
55#define ARM_GIC_IRQ_SGI_2 2
56#define ARM_GIC_IRQ_SGI_3 3
57#define ARM_GIC_IRQ_SGI_5 5
58#define ARM_GIC_IRQ_SGI_6 6
59#define ARM_GIC_IRQ_SGI_7 7
60#define ARM_GIC_IRQ_SGI_8 8
61#define ARM_GIC_IRQ_SGI_9 9
62#define ARM_GIC_IRQ_SGI_10 10
63#define ARM_GIC_IRQ_SGI_11 11
64#define ARM_GIC_IRQ_SGI_12 12
65#define ARM_GIC_IRQ_SGI_13 13
66#define ARM_GIC_IRQ_SGI_14 14
67#define ARM_GIC_IRQ_SGI_15 15
68#define ARM_GIC_IRQ_SGI_LAST 15
70#define ARM_GIC_IRQ_PPI_LAST 31
72#define ARM_GIC_DIST ((volatile gic_dist *) BSP_ARM_GIC_DIST_BASE)
87uint32_t arm_gic_irq_processor_count(
void);
89void arm_gic_irq_initialize_secondary_cpu(
void);
This header file provides interfaces of the ARM Generic Interrupt Controller (GIC) support.
ISR_Vector_number rtems_vector_number
This integer type represents interrupt vector numbers.
Definition: intr.h:102
rtems_status_code
This enumeration provides status codes for directives of the Classic API.
Definition: status.h:85