RTEMS 6.1-rc6
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actbl2.h
1/******************************************************************************
2 *
3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
4 *
5 *****************************************************************************/
6
7/******************************************************************************
8 *
9 * 1. Copyright Notice
10 *
11 * Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
12 * All rights reserved.
13 *
14 * 2. License
15 *
16 * 2.1. This is your license from Intel Corp. under its intellectual property
17 * rights. You may have additional license terms from the party that provided
18 * you this software, covering your right to use that party's intellectual
19 * property rights.
20 *
21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
22 * copy of the source code appearing in this file ("Covered Code") an
23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
24 * base code distributed originally by Intel ("Original Intel Code") to copy,
25 * make derivatives, distribute, use and display any portion of the Covered
26 * Code in any form, with the right to sublicense such rights; and
27 *
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
29 * license (with the right to sublicense), under only those claims of Intel
30 * patents that are infringed by the Original Intel Code, to make, use, sell,
31 * offer to sell, and import the Covered Code and derivative works thereof
32 * solely to the minimum extent necessary to exercise the above copyright
33 * license, and in no event shall the patent license extend to any additions
34 * to or modifications of the Original Intel Code. No other license or right
35 * is granted directly or by implication, estoppel or otherwise;
36 *
37 * The above copyright and patent license is granted only if the following
38 * conditions are met:
39 *
40 * 3. Conditions
41 *
42 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
43 * Redistribution of source code of any substantial portion of the Covered
44 * Code or modification with rights to further distribute source must include
45 * the above Copyright Notice, the above License, this list of Conditions,
46 * and the following Disclaimer and Export Compliance provision. In addition,
47 * Licensee must cause all Covered Code to which Licensee contributes to
48 * contain a file documenting the changes Licensee made to create that Covered
49 * Code and the date of any change. Licensee must include in that file the
50 * documentation of any changes made by any predecessor Licensee. Licensee
51 * must include a prominent statement that the modification is derived,
52 * directly or indirectly, from Original Intel Code.
53 *
54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
55 * Redistribution of source code of any substantial portion of the Covered
56 * Code or modification without rights to further distribute source must
57 * include the following Disclaimer and Export Compliance provision in the
58 * documentation and/or other materials provided with distribution. In
59 * addition, Licensee may not authorize further sublicense of source of any
60 * portion of the Covered Code, and must include terms to the effect that the
61 * license from Licensee to its licensee is limited to the intellectual
62 * property embodied in the software Licensee provides to its licensee, and
63 * not to intellectual property embodied in modifications its licensee may
64 * make.
65 *
66 * 3.3. Redistribution of Executable. Redistribution in executable form of any
67 * substantial portion of the Covered Code or modification must reproduce the
68 * above Copyright Notice, and the following Disclaimer and Export Compliance
69 * provision in the documentation and/or other materials provided with the
70 * distribution.
71 *
72 * 3.4. Intel retains all right, title, and interest in and to the Original
73 * Intel Code.
74 *
75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
76 * Intel shall be used in advertising or otherwise to promote the sale, use or
77 * other dealings in products derived from or relating to the Covered Code
78 * without prior written authorization from Intel.
79 *
80 * 4. Disclaimer and Export Compliance
81 *
82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
88 * PARTICULAR PURPOSE.
89 *
90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
97 * LIMITED REMEDY.
98 *
99 * 4.3. Licensee shall not export, either directly or indirectly, any of this
100 * software or system incorporating such software without first obtaining any
101 * required license or other approval from the U. S. Department of Commerce or
102 * any other agency or department of the United States Government. In the
103 * event Licensee exports any such software from the United States or
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
106 * compliance with all laws, regulations, orders, or other restrictions of the
107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor
108 * any of its subsidiaries will export/re-export any technical data, process,
109 * software, or service, directly or indirectly, to any country for which the
110 * United States government or any agency thereof requires an export license,
111 * other governmental approval, or letter of assurance, without first obtaining
112 * such license, approval or letter.
113 *
114 *****************************************************************************
115 *
116 * Alternatively, you may choose to be licensed under the terms of the
117 * following license:
118 *
119 * Redistribution and use in source and binary forms, with or without
120 * modification, are permitted provided that the following conditions
121 * are met:
122 * 1. Redistributions of source code must retain the above copyright
123 * notice, this list of conditions, and the following disclaimer,
124 * without modification.
125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
126 * substantially similar to the "NO WARRANTY" disclaimer below
127 * ("Disclaimer") and any redistribution must be conditioned upon
128 * including a substantially similar Disclaimer requirement for further
129 * binary redistribution.
130 * 3. Neither the names of the above-listed copyright holders nor the names
131 * of any contributors may be used to endorse or promote products derived
132 * from this software without specific prior written permission.
133 *
134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
145 *
146 * Alternatively, you may choose to be licensed under the terms of the
147 * GNU General Public License ("GPL") version 2 as published by the Free
148 * Software Foundation.
149 *
150 *****************************************************************************/
151
152#ifndef __ACTBL2_H__
153#define __ACTBL2_H__
154
155
156/*******************************************************************************
157 *
158 * Additional ACPI Tables (2)
159 *
160 * These tables are not consumed directly by the ACPICA subsystem, but are
161 * included here to support device drivers and the AML disassembler.
162 *
163 ******************************************************************************/
164
165
166/*
167 * Values for description table header signatures for tables defined in this
168 * file. Useful because they make it more difficult to inadvertently type in
169 * the wrong signature.
170 */
171#define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */
172#define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */
173#define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
174#define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */
175#define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */
176#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
177#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
178#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
179#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
180#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
181#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
182#define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */
183#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
184#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
185#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
186#define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
187#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
188#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
189#define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
190#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
191#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
192#define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
193#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
194#define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */
195#define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
196#define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
197#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
198#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
199#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
200#define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
201#define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */
202
203
204/*
205 * All tables must be byte-packed to match the ACPI specification, since
206 * the tables are provided by the system BIOS.
207 */
208#pragma pack(1)
209
210/*
211 * Note: C bitfields are not used for this reason:
212 *
213 * "Bitfields are great and easy to read, but unfortunately the C language
214 * does not specify the layout of bitfields in memory, which means they are
215 * essentially useless for dealing with packed data in on-disk formats or
216 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
217 * this decision was a design error in C. Ritchie could have picked an order
218 * and stuck with it." Norman Ramsey.
219 * See http://stackoverflow.com/a/1053662/41661
220 */
221
222
223/*******************************************************************************
224 *
225 * AEST - Arm Error Source Table
226 *
227 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document
228 * September 2020.
229 *
230 ******************************************************************************/
231
232typedef struct acpi_table_aest
233{
234 ACPI_TABLE_HEADER Header;
235
237
238/* Common Subtable header - one per Node Structure (Subtable) */
239
240typedef struct acpi_aest_hdr
241{
242 UINT8 Type;
243 UINT16 Length;
244 UINT8 Reserved;
245 UINT32 NodeSpecificOffset;
246 UINT32 NodeInterfaceOffset;
247 UINT32 NodeInterruptOffset;
248 UINT32 NodeInterruptCount;
249 UINT64 TimestampRate;
250 UINT64 Reserved1;
251 UINT64 ErrorInjectionRate;
252
254
255/* Values for Type above */
256
257#define ACPI_AEST_PROCESSOR_ERROR_NODE 0
258#define ACPI_AEST_MEMORY_ERROR_NODE 1
259#define ACPI_AEST_SMMU_ERROR_NODE 2
260#define ACPI_AEST_VENDOR_ERROR_NODE 3
261#define ACPI_AEST_GIC_ERROR_NODE 4
262#define ACPI_AEST_PCIE_ERROR_NODE 5
263#define ACPI_AEST_PROXY_ERROR_NODE 6
264#define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */
265
266
267/*
268 * AEST subtables (Error nodes)
269 */
270
271/* 0: Processor Error */
272
274{
275 UINT32 ProcessorId;
276 UINT8 ResourceType;
277 UINT8 Reserved;
278 UINT8 Flags;
279 UINT8 Revision;
280 UINT64 ProcessorAffinity;
281
283
284/* Values for ResourceType above, related structs below */
285
286#define ACPI_AEST_CACHE_RESOURCE 0
287#define ACPI_AEST_TLB_RESOURCE 1
288#define ACPI_AEST_GENERIC_RESOURCE 2
289#define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */
290
291/* 0R: Processor Cache Resource Substructure */
292
294{
295 UINT32 CacheReference;
296 UINT32 Reserved;
297
299
300/* Values for CacheType above */
301
302#define ACPI_AEST_CACHE_DATA 0
303#define ACPI_AEST_CACHE_INSTRUCTION 1
304#define ACPI_AEST_CACHE_UNIFIED 2
305#define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */
306
307/* 1R: Processor TLB Resource Substructure */
308
310{
311 UINT32 TlbLevel;
312 UINT32 Reserved;
313
315
316/* 2R: Processor Generic Resource Substructure */
317
319{
320 UINT32 Resource;
321
323
324/* 1: Memory Error */
325
326typedef struct acpi_aest_memory
327{
328 UINT32 SratProximityDomain;
329
331
332/* 2: Smmu Error */
333
334typedef struct acpi_aest_smmu
335{
336 UINT32 IortNodeReference;
337 UINT32 SubcomponentReference;
338
340
341/* 3: Vendor Defined */
342
343typedef struct acpi_aest_vendor
344{
345 UINT32 AcpiHid;
346 UINT32 AcpiUid;
347 UINT8 VendorSpecificData[16];
348
350
351/* 3: Vendor Defined V2 */
352
354{
355 UINT64 AcpiHid;
356 UINT32 AcpiUid;
357 UINT8 VendorSpecificData[16];
358
360
361/* 4: Gic Error */
362
363typedef struct acpi_aest_gic
364{
365 UINT32 InterfaceType;
366 UINT32 InstanceId;
367
369
370/* Values for InterfaceType above */
371
372#define ACPI_AEST_GIC_CPU 0
373#define ACPI_AEST_GIC_DISTRIBUTOR 1
374#define ACPI_AEST_GIC_REDISTRIBUTOR 2
375#define ACPI_AEST_GIC_ITS 3
376#define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */
377
378/* 5: PCIe Error */
379
380typedef struct acpi_aest_pcie
381{
382 UINT32 IortNodeReference;
383
385
386
387/* 6: Proxy Error */
388
389typedef struct acpi_aest_proxy
390{
391 UINT64 NodeAddress;
392
394
395/* Node Interface Structure */
396
398{
399 UINT8 Type;
400 UINT8 Reserved[3];
401 UINT32 Flags;
402 UINT64 Address;
403 UINT32 ErrorRecordIndex;
404 UINT32 ErrorRecordCount;
405 UINT64 ErrorRecordImplemented;
406 UINT64 ErrorStatusReporting;
407 UINT64 AddressingMode;
408
410
411/* Node Interface Structure V2*/
412
414{
415 UINT8 Type;
416 UINT8 GroupFormat;
417 UINT8 Reserved[2];
418 UINT32 Flags;
419 UINT64 Address;
420 UINT32 ErrorRecordIndex;
421 UINT32 ErrorRecordCount;
422
424
425#define ACPI_AEST_NODE_GROUP_FORMAT_4K 0
426#define ACPI_AEST_NODE_GROUP_FORMAT_16K 1
427#define ACPI_AEST_NODE_GROUP_FORMAT_64K 2
428
430{
431 UINT32 ErrorNodeDevice;
432 UINT32 ProcessorAffinity;
433 UINT64 ErrorGroupRegisterBase;
434 UINT64 FaultInjectRegisterBase;
435 UINT64 InterruptConfigRegisterBase;
436
438
440{
441 UINT64 ErrorRecordImplemented;
442 UINT64 ErrorStatusReporting;
443 UINT64 AddressingMode;
445
447
449{
450 UINT64 ErrorRecordImplemented[4];
451 UINT64 ErrorStatusReporting[4];
452 UINT64 AddressingMode[4];
454
456
458{
459 INT64 ErrorRecordImplemented[14];
460 UINT64 ErrorStatusReporting[14];
461 UINT64 AddressingMode[14];
463
465
466/* Values for Type field above */
467
468#define ACPI_AEST_NODE_SYSTEM_REGISTER 0
469#define ACPI_AEST_NODE_MEMORY_MAPPED 1
470#define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2
471#define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */
472
473/* Node Interrupt Structure */
474
476{
477 UINT8 Type;
478 UINT8 Reserved[2];
479 UINT8 Flags;
480 UINT32 Gsiv;
481 UINT8 IortId;
482 UINT8 Reserved1[3];
483
485
486/* Node Interrupt Structure V2 */
487
489{
490 UINT8 Type;
491 UINT8 Reserved[2];
492 UINT8 Flags;
493 UINT32 Gsiv;
494 UINT8 Reserved1[4];
495
497
498/* Values for Type field above */
499
500#define ACPI_AEST_NODE_FAULT_HANDLING 0
501#define ACPI_AEST_NODE_ERROR_RECOVERY 1
502#define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */
503
504
505/*******************************************************************************
506 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
507 *
508 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document"
509 * ARM DEN0093 v1.1
510 *
511 ******************************************************************************/
512typedef struct acpi_table_agdi
513{
514 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
515 UINT8 Flags;
516 UINT8 Reserved[3];
517 UINT32 SdeiEvent;
518 UINT32 Gsiv;
519
521
522/* Mask for Flags field above */
523
524#define ACPI_AGDI_SIGNALING_MODE (1)
525
526
527/*******************************************************************************
528 *
529 * APMT - ARM Performance Monitoring Unit Table
530 *
531 * Conforms to:
532 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document
533 * ARM DEN0117 v1.0 November 25, 2021
534 *
535 ******************************************************************************/
536
537typedef struct acpi_table_apmt {
538 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
540
541#define ACPI_APMT_NODE_ID_LENGTH 4
542
543/*
544 * APMT subtables
545 */
546typedef struct acpi_apmt_node {
547 UINT16 Length;
548 UINT8 Flags;
549 UINT8 Type;
550 UINT32 Id;
551 UINT64 InstPrimary;
552 UINT32 InstSecondary;
553 UINT64 BaseAddress0;
554 UINT64 BaseAddress1;
555 UINT32 OvflwIrq;
556 UINT32 Reserved;
557 UINT32 OvflwIrqFlags;
558 UINT32 ProcAffinity;
559 UINT32 ImplId;
561
562/* Masks for Flags field above */
563
564#define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0)
565#define ACPI_APMT_FLAGS_AFFINITY (1<<1)
566#define ACPI_APMT_FLAGS_ATOMIC (1<<2)
567
568/* Values for Flags dual page field above */
569
570#define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0)
571#define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0)
572
573/* Values for Flags processor affinity field above */
574#define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1)
575#define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1)
576
577/* Values for Flags 64-bit atomic field above */
578#define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2)
579#define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2)
580
581/* Values for Type field above */
582
583enum acpi_apmt_node_type {
584 ACPI_APMT_NODE_TYPE_MC = 0x00,
585 ACPI_APMT_NODE_TYPE_SMMU = 0x01,
586 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02,
587 ACPI_APMT_NODE_TYPE_ACPI = 0x03,
588 ACPI_APMT_NODE_TYPE_CACHE = 0x04,
589 ACPI_APMT_NODE_TYPE_COUNT
590};
591
592/* Masks for ovflw_irq_flags field above */
593
594#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0)
595#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1)
596
597/* Values for ovflw_irq_flags mode field above */
598
599#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0)
600#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0)
601
602/* Values for ovflw_irq_flags type field above */
603
604#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1)
605
606
607/*******************************************************************************
608 *
609 * BDAT - BIOS Data ACPI Table
610 *
611 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
612 * Nov 2020
613 *
614 ******************************************************************************/
615
616typedef struct acpi_table_bdat
617{
618 ACPI_TABLE_HEADER Header;
620
622
623/*******************************************************************************
624 *
625 * CCEL - CC-Event Log
626 * From: "Guest-Host-Communication Interface (GHCI) for Intel
627 * Trust Domain Extensions (Intel TDX)". Feb 2022
628 *
629 ******************************************************************************/
630
631typedef struct acpi_table_ccel
632{
633 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
634 UINT8 CCType;
635 UINT8 CCSubType;
636 UINT16 Reserved;
637 UINT64 LogAreaMinimumLength;
638 UINT64 LogAreaStartAddress;
639
641
642/*******************************************************************************
643 *
644 * IORT - IO Remapping Table
645 *
646 * Conforms to "IO Remapping Table System Software on ARM Platforms",
647 * Document number: ARM DEN 0049E.e, Sep 2022
648 *
649 ******************************************************************************/
650
651typedef struct acpi_table_iort
652{
653 ACPI_TABLE_HEADER Header;
654 UINT32 NodeCount;
655 UINT32 NodeOffset;
656 UINT32 Reserved;
657
659
660
661/*
662 * IORT subtables
663 */
664typedef struct acpi_iort_node
665{
666 UINT8 Type;
667 UINT16 Length;
668 UINT8 Revision;
669 UINT32 Identifier;
670 UINT32 MappingCount;
671 UINT32 MappingOffset;
672 char NodeData[];
673
675
676/* Values for subtable Type above */
677
678enum AcpiIortNodeType
679{
680 ACPI_IORT_NODE_ITS_GROUP = 0x00,
681 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
682 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
683 ACPI_IORT_NODE_SMMU = 0x03,
684 ACPI_IORT_NODE_SMMU_V3 = 0x04,
685 ACPI_IORT_NODE_PMCG = 0x05,
686 ACPI_IORT_NODE_RMR = 0x06,
687};
688
689
691{
692 UINT32 InputBase; /* Lowest value in input range */
693 UINT32 IdCount; /* Number of IDs */
694 UINT32 OutputBase; /* Lowest value in output range */
695 UINT32 OutputReference; /* A reference to the output node */
696 UINT32 Flags;
697
699
700/* Masks for Flags field above for IORT subtable */
701
702#define ACPI_IORT_ID_SINGLE_MAPPING (1)
703
704
706{
707 UINT32 CacheCoherency;
708 UINT8 Hints;
709 UINT16 Reserved;
710 UINT8 MemoryFlags;
711
713
714/* Values for CacheCoherency field above */
715
716#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
717#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
718
719/* Masks for Hints field above */
720
721#define ACPI_IORT_HT_TRANSIENT (1)
722#define ACPI_IORT_HT_WRITE (1<<1)
723#define ACPI_IORT_HT_READ (1<<2)
724#define ACPI_IORT_HT_OVERRIDE (1<<3)
725
726/* Masks for MemoryFlags field above */
727
728#define ACPI_IORT_MF_COHERENCY (1)
729#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
730
731
732/*
733 * IORT node specific subtables
734 */
736{
737 UINT32 ItsCount;
738 UINT32 Identifiers[]; /* GIC ITS identifier array */
739
741
742
744{
745 UINT32 NodeFlags;
746 UINT64 MemoryProperties; /* Memory access properties */
747 UINT8 MemoryAddressLimit; /* Memory address size limit */
748 char DeviceName[]; /* Path of namespace object */
749
751
752/* Masks for Flags field above */
753
754#define ACPI_IORT_NC_STALL_SUPPORTED (1)
755#define ACPI_IORT_NC_PASID_BITS (31<<1)
756
758{
759 UINT64 MemoryProperties; /* Memory access properties */
760 UINT32 AtsAttribute;
761 UINT32 PciSegmentNumber;
762 UINT8 MemoryAddressLimit; /* Memory address size limit */
763 UINT16 PasidCapabilities; /* PASID Capabilities */
764 UINT8 Reserved[]; /* Reserved, must be zero */
765
767
768/* Masks for AtsAttribute field above */
769
770#define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
771#define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
772#define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
773
774/* Masks for PasidCapabilities field above */
775#define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */
776
777typedef struct acpi_iort_smmu
778{
779 UINT64 BaseAddress; /* SMMU base address */
780 UINT64 Span; /* Length of memory range */
781 UINT32 Model;
782 UINT32 Flags;
783 UINT32 GlobalInterruptOffset;
784 UINT32 ContextInterruptCount;
785 UINT32 ContextInterruptOffset;
786 UINT32 PmuInterruptCount;
787 UINT32 PmuInterruptOffset;
788 UINT64 Interrupts[]; /* Interrupt array */
789
791
792/* Values for Model field above */
793
794#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
795#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
796#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
797#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
798#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
799#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */
800
801/* Masks for Flags field above */
802
803#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
804#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
805
806/* Global interrupt format */
807
808typedef struct acpi_iort_smmu_gsi
809{
810 UINT32 NSgIrpt;
811 UINT32 NSgIrptFlags;
812 UINT32 NSgCfgIrpt;
813 UINT32 NSgCfgIrptFlags;
814
816
817
818typedef struct acpi_iort_smmu_v3
819{
820 UINT64 BaseAddress; /* SMMUv3 base address */
821 UINT32 Flags;
822 UINT32 Reserved;
823 UINT64 VatosAddress;
824 UINT32 Model;
825 UINT32 EventGsiv;
826 UINT32 PriGsiv;
827 UINT32 GerrGsiv;
828 UINT32 SyncGsiv;
829 UINT32 Pxm;
830 UINT32 IdMappingIndex;
831
833
834/* Values for Model field above */
835
836#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
837#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */
838#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
839
840/* Masks for Flags field above */
841
842#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
843#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
844#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
845#define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4)
846
847typedef struct acpi_iort_pmcg
848{
849 UINT64 Page0BaseAddress;
850 UINT32 OverflowGsiv;
851 UINT32 NodeReference;
852 UINT64 Page1BaseAddress;
853
855
856typedef struct acpi_iort_rmr {
857 UINT32 Flags;
858 UINT32 RmrCount;
859 UINT32 RmrOffset;
860
862
863/* Masks for Flags field above */
864#define ACPI_IORT_RMR_REMAP_PERMITTED (1)
865#define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1)
866
867/*
868 * Macro to access the Access Attributes in flags field above:
869 * Access Attributes is encoded in bits 9:2
870 */
871#define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF)
872
873/* Values for above Access Attributes */
874
875#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00
876#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01
877#define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02
878#define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03
879#define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04
880#define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05
881
882typedef struct acpi_iort_rmr_desc {
883 UINT64 BaseAddress;
884 UINT64 Length;
885 UINT32 Reserved;
886
888
889/*******************************************************************************
890 *
891 * IVRS - I/O Virtualization Reporting Structure
892 * Version 1
893 *
894 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
895 * Revision 1.26, February 2009.
896 *
897 ******************************************************************************/
898
899typedef struct acpi_table_ivrs
900{
901 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
902 UINT32 Info; /* Common virtualization info */
903 UINT64 Reserved;
904
906
907/* Values for Info field above */
908
909#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
910#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
911#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
912
913
914/* IVRS subtable header */
915
916typedef struct acpi_ivrs_header
917{
918 UINT8 Type; /* Subtable type */
919 UINT8 Flags;
920 UINT16 Length; /* Subtable length */
921 UINT16 DeviceId; /* ID of IOMMU */
922
924
925/* Values for subtable Type above */
926
927enum AcpiIvrsType
928{
929 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
930 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
931 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
932 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
933 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
934 ACPI_IVRS_TYPE_MEMORY3 = 0x22
935};
936
937/* Masks for Flags field above for IVHD subtable */
938
939#define ACPI_IVHD_TT_ENABLE (1)
940#define ACPI_IVHD_PASS_PW (1<<1)
941#define ACPI_IVHD_RES_PASS_PW (1<<2)
942#define ACPI_IVHD_ISOC (1<<3)
943#define ACPI_IVHD_IOTLB (1<<4)
944
945/* Masks for Flags field above for IVMD subtable */
946
947#define ACPI_IVMD_UNITY (1)
948#define ACPI_IVMD_READ (1<<1)
949#define ACPI_IVMD_WRITE (1<<2)
950#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
951
952
953/*
954 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER
955 */
956
957/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
958
960{
961 ACPI_IVRS_HEADER Header;
962 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */
963 UINT64 BaseAddress; /* IOMMU control registers */
964 UINT16 PciSegmentGroup;
965 UINT16 Info; /* MSI number and unit ID */
966 UINT32 FeatureReporting;
967
969
970/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
971
973{
974 ACPI_IVRS_HEADER Header;
975 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */
976 UINT64 BaseAddress; /* IOMMU control registers */
977 UINT16 PciSegmentGroup;
978 UINT16 Info; /* MSI number and unit ID */
979 UINT32 Attributes;
980 UINT64 EfrRegisterImage;
981 UINT64 Reserved;
983
984/* Masks for Info field above */
985
986#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
987#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */
988
989
990/*
991 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure.
992 * Upper two bits of the Type field are the (encoded) length of the structure.
993 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
994 * are reserved for future use but not defined.
995 */
997{
998 UINT8 Type;
999 UINT16 Id;
1000 UINT8 DataSetting;
1001
1003
1004/* Length of device entry is in the top two bits of Type field above */
1005
1006#define ACPI_IVHD_ENTRY_LENGTH 0xC0
1007
1008/* Values for device entry Type field above */
1009
1010enum AcpiIvrsDeviceEntryType
1011{
1012 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */
1013
1014 ACPI_IVRS_TYPE_PAD4 = 0,
1015 ACPI_IVRS_TYPE_ALL = 1,
1016 ACPI_IVRS_TYPE_SELECT = 2,
1017 ACPI_IVRS_TYPE_START = 3,
1018 ACPI_IVRS_TYPE_END = 4,
1019
1020 /* 8-byte device entries */
1021
1022 ACPI_IVRS_TYPE_PAD8 = 64,
1023 ACPI_IVRS_TYPE_NOT_USED = 65,
1024 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */
1025 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */
1026 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */
1027 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */
1028 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */
1029
1030 /* Variable-length device entries */
1031
1032 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
1033};
1034
1035/* Values for Data field above */
1036
1037#define ACPI_IVHD_INIT_PASS (1)
1038#define ACPI_IVHD_EINT_PASS (1<<1)
1039#define ACPI_IVHD_NMI_PASS (1<<2)
1040#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
1041#define ACPI_IVHD_LINT0_PASS (1<<6)
1042#define ACPI_IVHD_LINT1_PASS (1<<7)
1043
1044
1045/* Types 0-4: 4-byte device entry */
1046
1047typedef struct acpi_ivrs_device4
1048{
1049 ACPI_IVRS_DE_HEADER Header;
1050
1052
1053/* Types 66-67: 8-byte device entry */
1054
1056{
1057 ACPI_IVRS_DE_HEADER Header;
1058 UINT8 Reserved1;
1059 UINT16 UsedId;
1060 UINT8 Reserved2;
1061
1063
1064/* Types 70-71: 8-byte device entry */
1065
1067{
1068 ACPI_IVRS_DE_HEADER Header;
1069 UINT32 ExtendedData;
1070
1072
1073/* Values for ExtendedData above */
1074
1075#define ACPI_IVHD_ATS_DISABLED (1<<31)
1076
1077/* Type 72: 8-byte device entry */
1078
1080{
1081 ACPI_IVRS_DE_HEADER Header;
1082 UINT8 Handle;
1083 UINT16 UsedId;
1084 UINT8 Variety;
1085
1087
1088/* Values for Variety field above */
1089
1090#define ACPI_IVHD_IOAPIC 1
1091#define ACPI_IVHD_HPET 2
1092
1093/* Type 240: variable-length device entry */
1094
1096{
1097 ACPI_IVRS_DE_HEADER Header;
1098 UINT64 AcpiHid;
1099 UINT64 AcpiCid;
1100 UINT8 UidType;
1101 UINT8 UidLength;
1102
1104
1105/* Values for UidType above */
1106
1107#define ACPI_IVRS_UID_NOT_PRESENT 0
1108#define ACPI_IVRS_UID_IS_INTEGER 1
1109#define ACPI_IVRS_UID_IS_STRING 2
1110
1111/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
1112
1113typedef struct acpi_ivrs_memory
1114{
1115 ACPI_IVRS_HEADER Header;
1116 UINT16 AuxData;
1117 UINT64 Reserved;
1118 UINT64 StartAddress;
1119 UINT64 MemoryLength;
1120
1122
1123
1124/*******************************************************************************
1125 *
1126 * LPIT - Low Power Idle Table
1127 *
1128 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
1129 *
1130 ******************************************************************************/
1131
1132typedef struct acpi_table_lpit
1133{
1134 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1135
1137
1138
1139/* LPIT subtable header */
1140
1141typedef struct acpi_lpit_header
1142{
1143 UINT32 Type; /* Subtable type */
1144 UINT32 Length; /* Subtable length */
1145 UINT16 UniqueId;
1146 UINT16 Reserved;
1147 UINT32 Flags;
1148
1150
1151/* Values for subtable Type above */
1152
1153enum AcpiLpitType
1154{
1155 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
1156 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
1157};
1158
1159/* Masks for Flags field above */
1160
1161#define ACPI_LPIT_STATE_DISABLED (1)
1162#define ACPI_LPIT_NO_COUNTER (1<<1)
1163
1164/*
1165 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER
1166 */
1167
1168/* 0x00: Native C-state instruction based LPI structure */
1169
1170typedef struct acpi_lpit_native
1171{
1172 ACPI_LPIT_HEADER Header;
1173 ACPI_GENERIC_ADDRESS EntryTrigger;
1174 UINT32 Residency;
1175 UINT32 Latency;
1176 ACPI_GENERIC_ADDRESS ResidencyCounter;
1177 UINT64 CounterFrequency;
1178
1180
1181
1182/*******************************************************************************
1183 *
1184 * MADT - Multiple APIC Description Table
1185 * Version 3
1186 *
1187 ******************************************************************************/
1188
1189typedef struct acpi_table_madt
1190{
1191 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1192 UINT32 Address; /* Physical address of local APIC */
1193 UINT32 Flags;
1194
1196
1197/* Masks for Flags field above */
1198
1199#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
1200
1201/* Values for PCATCompat flag */
1202
1203#define ACPI_MADT_DUAL_PIC 1
1204#define ACPI_MADT_MULTIPLE_APIC 0
1205
1206
1207/* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */
1208
1209enum AcpiMadtType
1210{
1211 ACPI_MADT_TYPE_LOCAL_APIC = 0,
1212 ACPI_MADT_TYPE_IO_APIC = 1,
1213 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
1214 ACPI_MADT_TYPE_NMI_SOURCE = 3,
1215 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
1216 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
1217 ACPI_MADT_TYPE_IO_SAPIC = 6,
1218 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
1219 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
1220 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
1221 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
1222 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
1223 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
1224 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
1225 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
1226 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
1227 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
1228 ACPI_MADT_TYPE_CORE_PIC = 17,
1229 ACPI_MADT_TYPE_LIO_PIC = 18,
1230 ACPI_MADT_TYPE_HT_PIC = 19,
1231 ACPI_MADT_TYPE_EIO_PIC = 20,
1232 ACPI_MADT_TYPE_MSI_PIC = 21,
1233 ACPI_MADT_TYPE_BIO_PIC = 22,
1234 ACPI_MADT_TYPE_LPC_PIC = 23,
1235 ACPI_MADT_TYPE_RINTC = 24,
1236 ACPI_MADT_TYPE_IMSIC = 25,
1237 ACPI_MADT_TYPE_APLIC = 26,
1238 ACPI_MADT_TYPE_PLIC = 27,
1239 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */
1240 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */
1241};
1242
1243
1244/*
1245 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER
1246 */
1247
1248/* 0: Processor Local APIC */
1249
1251{
1252 ACPI_SUBTABLE_HEADER Header;
1253 UINT8 ProcessorId; /* ACPI processor id */
1254 UINT8 Id; /* Processor's local APIC id */
1255 UINT32 LapicFlags;
1256
1258
1259
1260/* 1: IO APIC */
1261
1262typedef struct acpi_madt_io_apic
1263{
1264 ACPI_SUBTABLE_HEADER Header;
1265 UINT8 Id; /* I/O APIC ID */
1266 UINT8 Reserved; /* Reserved - must be zero */
1267 UINT32 Address; /* APIC physical address */
1268 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */
1269
1271
1272
1273/* 2: Interrupt Override */
1274
1276{
1277 ACPI_SUBTABLE_HEADER Header;
1278 UINT8 Bus; /* 0 - ISA */
1279 UINT8 SourceIrq; /* Interrupt source (IRQ) */
1280 UINT32 GlobalIrq; /* Global system interrupt */
1281 UINT16 IntiFlags;
1282
1284
1285
1286/* 3: NMI Source */
1287
1289{
1290 ACPI_SUBTABLE_HEADER Header;
1291 UINT16 IntiFlags;
1292 UINT32 GlobalIrq; /* Global system interrupt */
1293
1295
1296
1297/* 4: Local APIC NMI */
1298
1300{
1301 ACPI_SUBTABLE_HEADER Header;
1302 UINT8 ProcessorId; /* ACPI processor id */
1303 UINT16 IntiFlags;
1304 UINT8 Lint; /* LINTn to which NMI is connected */
1305
1307
1308
1309/* 5: Address Override */
1310
1312{
1313 ACPI_SUBTABLE_HEADER Header;
1314 UINT16 Reserved; /* Reserved, must be zero */
1315 UINT64 Address; /* APIC physical address */
1316
1318
1319
1320/* 6: I/O Sapic */
1321
1323{
1324 ACPI_SUBTABLE_HEADER Header;
1325 UINT8 Id; /* I/O SAPIC ID */
1326 UINT8 Reserved; /* Reserved, must be zero */
1327 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */
1328 UINT64 Address; /* SAPIC physical address */
1329
1331
1332
1333/* 7: Local Sapic */
1334
1336{
1337 ACPI_SUBTABLE_HEADER Header;
1338 UINT8 ProcessorId; /* ACPI processor id */
1339 UINT8 Id; /* SAPIC ID */
1340 UINT8 Eid; /* SAPIC EID */
1341 UINT8 Reserved[3]; /* Reserved, must be zero */
1342 UINT32 LapicFlags;
1343 UINT32 Uid; /* Numeric UID - ACPI 3.0 */
1344 char UidString[]; /* String UID - ACPI 3.0 */
1345
1347
1348
1349/* 8: Platform Interrupt Source */
1350
1352{
1353 ACPI_SUBTABLE_HEADER Header;
1354 UINT16 IntiFlags;
1355 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */
1356 UINT8 Id; /* Processor ID */
1357 UINT8 Eid; /* Processor EID */
1358 UINT8 IoSapicVector; /* Vector value for PMI interrupts */
1359 UINT32 GlobalIrq; /* Global system interrupt */
1360 UINT32 Flags; /* Interrupt Source Flags */
1361
1363
1364/* Masks for Flags field above */
1365
1366#define ACPI_MADT_CPEI_OVERRIDE (1)
1367
1368
1369/* 9: Processor Local X2APIC (ACPI 4.0) */
1370
1372{
1373 ACPI_SUBTABLE_HEADER Header;
1374 UINT16 Reserved; /* Reserved - must be zero */
1375 UINT32 LocalApicId; /* Processor x2APIC ID */
1376 UINT32 LapicFlags;
1377 UINT32 Uid; /* ACPI processor UID */
1378
1380
1381
1382/* 10: Local X2APIC NMI (ACPI 4.0) */
1383
1385{
1386 ACPI_SUBTABLE_HEADER Header;
1387 UINT16 IntiFlags;
1388 UINT32 Uid; /* ACPI processor UID */
1389 UINT8 Lint; /* LINTn to which NMI is connected */
1390 UINT8 Reserved[3]; /* Reserved - must be zero */
1391
1393
1394
1395/* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */
1396
1398{
1399 ACPI_SUBTABLE_HEADER Header;
1400 UINT16 Reserved; /* Reserved - must be zero */
1401 UINT32 CpuInterfaceNumber;
1402 UINT32 Uid;
1403 UINT32 Flags;
1404 UINT32 ParkingVersion;
1405 UINT32 PerformanceInterrupt;
1406 UINT64 ParkedAddress;
1407 UINT64 BaseAddress;
1408 UINT64 GicvBaseAddress;
1409 UINT64 GichBaseAddress;
1410 UINT32 VgicInterrupt;
1411 UINT64 GicrBaseAddress;
1412 UINT64 ArmMpidr;
1413 UINT8 EfficiencyClass;
1414 UINT8 Reserved2[1];
1415 UINT16 SpeInterrupt; /* ACPI 6.3 */
1416 UINT16 TrbeInterrupt; /* ACPI 6.5 */
1417
1419
1420/* Masks for Flags field above */
1421
1422/* ACPI_MADT_ENABLED (1) Processor is usable if set */
1423#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
1424#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
1425#define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */
1426#define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */
1427
1428/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
1429
1431{
1432 ACPI_SUBTABLE_HEADER Header;
1433 UINT16 Reserved; /* Reserved - must be zero */
1434 UINT32 GicId;
1435 UINT64 BaseAddress;
1436 UINT32 GlobalIrqBase;
1437 UINT8 Version;
1438 UINT8 Reserved2[3]; /* Reserved - must be zero */
1439
1441
1442/* Values for Version field above */
1443
1444enum AcpiMadtGicVersion
1445{
1446 ACPI_MADT_GIC_VERSION_NONE = 0,
1447 ACPI_MADT_GIC_VERSION_V1 = 1,
1448 ACPI_MADT_GIC_VERSION_V2 = 2,
1449 ACPI_MADT_GIC_VERSION_V3 = 3,
1450 ACPI_MADT_GIC_VERSION_V4 = 4,
1451 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
1452};
1453
1454
1455/* 13: Generic MSI Frame (ACPI 5.1) */
1456
1458{
1459 ACPI_SUBTABLE_HEADER Header;
1460 UINT16 Reserved; /* Reserved - must be zero */
1461 UINT32 MsiFrameId;
1462 UINT64 BaseAddress;
1463 UINT32 Flags;
1464 UINT16 SpiCount;
1465 UINT16 SpiBase;
1466
1468
1469/* Masks for Flags field above */
1470
1471#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
1472
1473
1474/* 14: Generic Redistributor (ACPI 5.1) */
1475
1477{
1478 ACPI_SUBTABLE_HEADER Header;
1479 UINT8 Flags;
1480 UINT8 Reserved; /* reserved - must be zero */
1481 UINT64 BaseAddress;
1482 UINT32 Length;
1483
1485
1486#define ACPI_MADT_GICR_NON_COHERENT (1)
1487
1488/* 15: Generic Translator (ACPI 6.0) */
1489
1491{
1492 ACPI_SUBTABLE_HEADER Header;
1493 UINT8 Flags;
1494 UINT8 Reserved; /* reserved - must be zero */
1495 UINT32 TranslationId;
1496 UINT64 BaseAddress;
1497 UINT32 Reserved2;
1498
1500
1501#define ACPI_MADT_ITS_NON_COHERENT (1)
1502
1503/* 16: Multiprocessor wakeup (ACPI 6.4) */
1504
1506{
1507 ACPI_SUBTABLE_HEADER Header;
1508 UINT16 MailboxVersion;
1509 UINT32 Reserved; /* reserved - must be zero */
1510 UINT64 BaseAddress;
1511
1513
1514#define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
1515#define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
1516
1518{
1519 UINT16 Command;
1520 UINT16 Reserved; /* reserved - must be zero */
1521 UINT32 ApicId;
1522 UINT64 WakeupVector;
1523 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
1524 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
1525
1527
1528#define ACPI_MP_WAKE_COMMAND_WAKEUP 1
1529
1530/* 17: CPU Core Interrupt Controller (ACPI 6.5) */
1531
1532typedef struct acpi_madt_core_pic {
1533 ACPI_SUBTABLE_HEADER Header;
1534 UINT8 Version;
1535 UINT32 ProcessorId;
1536 UINT32 CoreId;
1537 UINT32 Flags;
1539
1540/* Values for Version field above */
1541
1542enum AcpiMadtCorePicVersion {
1543 ACPI_MADT_CORE_PIC_VERSION_NONE = 0,
1544 ACPI_MADT_CORE_PIC_VERSION_V1 = 1,
1545 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1546};
1547
1548/* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */
1549
1550typedef struct acpi_madt_lio_pic {
1551 ACPI_SUBTABLE_HEADER Header;
1552 UINT8 Version;
1553 UINT64 Address;
1554 UINT16 Size;
1555 UINT8 Cascade[2];
1556 UINT32 CascadeMap[2];
1558
1559/* Values for Version field above */
1560
1561enum AcpiMadtLioPicVersion {
1562 ACPI_MADT_LIO_PIC_VERSION_NONE = 0,
1563 ACPI_MADT_LIO_PIC_VERSION_V1 = 1,
1564 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1565};
1566
1567/* 19: HT Interrupt Controller (ACPI 6.5) */
1568
1569typedef struct acpi_madt_ht_pic {
1570 ACPI_SUBTABLE_HEADER Header;
1571 UINT8 Version;
1572 UINT64 Address;
1573 UINT16 Size;
1574 UINT8 Cascade[8];
1576
1577/* Values for Version field above */
1578
1579enum AcpiMadtHtPicVersion {
1580 ACPI_MADT_HT_PIC_VERSION_NONE = 0,
1581 ACPI_MADT_HT_PIC_VERSION_V1 = 1,
1582 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1583};
1584
1585/* 20: Extend I/O Interrupt Controller (ACPI 6.5) */
1586
1587typedef struct acpi_madt_eio_pic {
1588 ACPI_SUBTABLE_HEADER Header;
1589 UINT8 Version;
1590 UINT8 Cascade;
1591 UINT8 Node;
1592 UINT64 NodeMap;
1594
1595/* Values for Version field above */
1596
1597enum AcpiMadtEioPicVersion {
1598 ACPI_MADT_EIO_PIC_VERSION_NONE = 0,
1599 ACPI_MADT_EIO_PIC_VERSION_V1 = 1,
1600 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1601};
1602
1603/* 21: MSI Interrupt Controller (ACPI 6.5) */
1604
1605typedef struct acpi_madt_msi_pic {
1606 ACPI_SUBTABLE_HEADER Header;
1607 UINT8 Version;
1608 UINT64 MsgAddress;
1609 UINT32 Start;
1610 UINT32 Count;
1612
1613/* Values for Version field above */
1614
1615enum AcpiMadtMsiPicVersion {
1616 ACPI_MADT_MSI_PIC_VERSION_NONE = 0,
1617 ACPI_MADT_MSI_PIC_VERSION_V1 = 1,
1618 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1619};
1620
1621/* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */
1622
1623typedef struct acpi_madt_bio_pic {
1624 ACPI_SUBTABLE_HEADER Header;
1625 UINT8 Version;
1626 UINT64 Address;
1627 UINT16 Size;
1628 UINT16 Id;
1629 UINT16 GsiBase;
1631
1632/* Values for Version field above */
1633
1634enum AcpiMadtBioPicVersion {
1635 ACPI_MADT_BIO_PIC_VERSION_NONE = 0,
1636 ACPI_MADT_BIO_PIC_VERSION_V1 = 1,
1637 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1638};
1639
1640/* 23: LPC Interrupt Controller (ACPI 6.5) */
1641
1642typedef struct acpi_madt_lpc_pic {
1643 ACPI_SUBTABLE_HEADER Header;
1644 UINT8 Version;
1645 UINT64 Address;
1646 UINT16 Size;
1647 UINT8 Cascade;
1649
1650/* Values for Version field above */
1651
1652enum AcpiMadtLpcPicVersion {
1653 ACPI_MADT_LPC_PIC_VERSION_NONE = 0,
1654 ACPI_MADT_LPC_PIC_VERSION_V1 = 1,
1655 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1656};
1657
1658/* 24: RISC-V INTC */
1659typedef struct acpi_madt_rintc {
1660 ACPI_SUBTABLE_HEADER Header;
1661 UINT8 Version;
1662 UINT8 Reserved;
1663 UINT32 Flags;
1664 UINT64 HartId;
1665 UINT32 Uid; /* ACPI processor UID */
1666 UINT32 ExtIntcId; /* External INTC Id */
1667 UINT64 ImsicAddr; /* IMSIC base address */
1668 UINT32 ImsicSize; /* IMSIC size */
1670
1671/* Values for RISC-V INTC Version field above */
1672
1673enum AcpiMadtRintcVersion {
1674 ACPI_MADT_RINTC_VERSION_NONE = 0,
1675 ACPI_MADT_RINTC_VERSION_V1 = 1,
1676 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1677};
1678
1679/* 25: RISC-V IMSIC */
1680typedef struct acpi_madt_imsic {
1681 ACPI_SUBTABLE_HEADER Header;
1682 UINT8 Version;
1683 UINT8 Reserved;
1684 UINT32 Flags;
1685 UINT16 NumIds;
1686 UINT16 NumGuestIds;
1687 UINT8 GuestIndexBits;
1688 UINT8 HartIndexBits;
1689 UINT8 GroupIndexBits;
1690 UINT8 GroupIndexShift;
1692
1693/* 26: RISC-V APLIC */
1694typedef struct acpi_madt_aplic {
1695 ACPI_SUBTABLE_HEADER Header;
1696 UINT8 Version;
1697 UINT8 Id;
1698 UINT32 Flags;
1699 UINT8 HwId[8];
1700 UINT16 NumIdcs;
1701 UINT16 NumSources;
1702 UINT32 GsiBase;
1703 UINT64 BaseAddr;
1704 UINT32 Size;
1706
1707/* 27: RISC-V PLIC */
1708typedef struct acpi_madt_plic {
1709 ACPI_SUBTABLE_HEADER Header;
1710 UINT8 Version;
1711 UINT8 Id;
1712 UINT8 HwId[8];
1713 UINT16 NumIrqs;
1714 UINT16 MaxPrio;
1715 UINT32 Flags;
1716 UINT32 Size;
1717 UINT64 BaseAddr;
1718 UINT32 GsiBase;
1720
1721
1722/* 80: OEM data */
1723
1725{
1726 ACPI_FLEX_ARRAY(UINT8, OemData);
1728
1729
1730/*
1731 * Common flags fields for MADT subtables
1732 */
1733
1734/* MADT Local APIC flags */
1735
1736#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
1737#define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */
1738
1739/* MADT MPS INTI flags (IntiFlags) */
1740
1741#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
1742#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
1743
1744/* Values for MPS INTI flags */
1745
1746#define ACPI_MADT_POLARITY_CONFORMS 0
1747#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
1748#define ACPI_MADT_POLARITY_RESERVED 2
1749#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
1750
1751#define ACPI_MADT_TRIGGER_CONFORMS (0)
1752#define ACPI_MADT_TRIGGER_EDGE (1<<2)
1753#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
1754#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1755
1756
1757/*******************************************************************************
1758 *
1759 * MCFG - PCI Memory Mapped Configuration table and subtable
1760 * Version 1
1761 *
1762 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
1763 *
1764 ******************************************************************************/
1765
1766typedef struct acpi_table_mcfg
1767{
1768 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1769 UINT8 Reserved[8];
1770
1772
1773
1774/* Subtable */
1775
1777{
1778 UINT64 Address; /* Base address, processor-relative */
1779 UINT16 PciSegment; /* PCI segment group number */
1780 UINT8 StartBusNumber; /* Starting PCI Bus number */
1781 UINT8 EndBusNumber; /* Final PCI Bus number */
1782 UINT32 Reserved;
1783
1785
1786
1787/*******************************************************************************
1788 *
1789 * MCHI - Management Controller Host Interface Table
1790 * Version 1
1791 *
1792 * Conforms to "Management Component Transport Protocol (MCTP) Host
1793 * Interface Specification", Revision 1.0.0a, October 13, 2009
1794 *
1795 ******************************************************************************/
1796
1797typedef struct acpi_table_mchi
1798{
1799 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1800 UINT8 InterfaceType;
1801 UINT8 Protocol;
1802 UINT64 ProtocolData;
1803 UINT8 InterruptType;
1804 UINT8 Gpe;
1805 UINT8 PciDeviceFlag;
1806 UINT32 GlobalInterrupt;
1807 ACPI_GENERIC_ADDRESS ControlRegister;
1808 UINT8 PciSegment;
1809 UINT8 PciBus;
1810 UINT8 PciDevice;
1811 UINT8 PciFunction;
1812
1814
1815/*******************************************************************************
1816 *
1817 * MPAM - Memory System Resource Partitioning and Monitoring
1818 *
1819 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0"
1820 * Document number: ARM DEN 0065, December, 2022.
1821 *
1822 ******************************************************************************/
1823
1824/* MPAM RIS locator types. Table 11, Location types */
1825enum AcpiMpamLocatorType {
1826 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0,
1827 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1,
1828 ACPI_MPAM_LOCATION_TYPE_SMMU = 2,
1829 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3,
1830 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4,
1831 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5,
1832 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF
1833};
1834
1835/* MPAM Functional dependency descriptor. Table 10 */
1837{
1838 UINT32 Producer;
1839 UINT32 Reserved;
1841
1842/* MPAM Processor cache locator descriptor. Table 13 */
1844{
1845 UINT64 CacheReference;
1846 UINT32 Reserved;
1848
1849/* MPAM Memory locator descriptor. Table 14 */
1851{
1852 UINT64 ProximityDomain;
1853 UINT32 Reserved;
1855
1856/* MPAM SMMU locator descriptor. Table 15 */
1858{
1859 UINT64 SmmuInterface;
1860 UINT32 Reserved;
1862
1863/* MPAM Memory-side cache locator descriptor. Table 16 */
1865{
1866 UINT8 Reserved[7];
1867 UINT8 Level;
1868 UINT32 Reference;
1870
1871/* MPAM ACPI device locator descriptor. Table 17 */
1873{
1874 UINT64 AcpiHwId;
1875 UINT32 AcpiUniqueId;
1877
1878/* MPAM Interconnect locator descriptor. Table 18 */
1880{
1881 UINT64 InterConnectDescTblOff;
1882 UINT32 Reserved;
1884
1885/* MPAM Locator structure. Table 12 */
1887{
1888 UINT64 Descriptor1;
1889 UINT32 Descriptor2;
1891
1893{
1899 ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE InterconnectIfcLocator;
1902
1903/* Memory System Component Resource Node Structure Table 9 */
1905{
1906 UINT32 Identifier;
1907 UINT8 RISIndex;
1908 UINT16 Reserved1;
1909 UINT8 LocatorType;
1911 UINT32 NumFunctionalDeps;
1913
1914/* Memory System Component (MSC) Node Structure. Table 4 */
1916{
1917 UINT16 Length;
1918 UINT8 InterfaceType;
1919 UINT8 Reserved;
1920 UINT32 Identifier;
1921 UINT64 BaseAddress;
1922 UINT32 MMIOSize;
1923 UINT32 OverflowInterrupt;
1924 UINT32 OverflowInterruptFlags;
1925 UINT32 Reserved1;
1926 UINT32 OverflowInterruptAffinity;
1927 UINT32 ErrorInterrupt;
1928 UINT32 ErrorInterruptFlags;
1929 UINT32 Reserved2;
1930 UINT32 ErrorInterruptAffinity;
1931 UINT32 MaxNrdyUsec;
1932 UINT64 HardwareIdLinkedDevice;
1933 UINT32 InstanceIdLinkedDevice;
1934 UINT32 NumResourceNodes;
1936
1937typedef struct acpi_table_mpam
1938{
1939 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1941
1942/*******************************************************************************
1943 *
1944 * MPST - Memory Power State Table (ACPI 5.0)
1945 * Version 1
1946 *
1947 ******************************************************************************/
1948
1949#define ACPI_MPST_CHANNEL_INFO \
1950 UINT8 ChannelId; \
1951 UINT8 Reserved1[3]; \
1952 UINT16 PowerNodeCount; \
1953 UINT16 Reserved2;
1954
1955/* Main table */
1956
1957typedef struct acpi_table_mpst
1958{
1959 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1960 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1961
1963
1964
1965/* Memory Platform Communication Channel Info */
1966
1967typedef struct acpi_mpst_channel
1968{
1969 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1970
1972
1973
1974/* Memory Power Node Structure */
1975
1977{
1978 UINT8 Flags;
1979 UINT8 Reserved1;
1980 UINT16 NodeId;
1981 UINT32 Length;
1982 UINT64 RangeAddress;
1983 UINT64 RangeLength;
1984 UINT32 NumPowerStates;
1985 UINT32 NumPhysicalComponents;
1986
1988
1989/* Values for Flags field above */
1990
1991#define ACPI_MPST_ENABLED 1
1992#define ACPI_MPST_POWER_MANAGED 2
1993#define ACPI_MPST_HOT_PLUG_CAPABLE 4
1994
1995
1996/* Memory Power State Structure (follows POWER_NODE above) */
1997
1999{
2000 UINT8 PowerState;
2001 UINT8 InfoIndex;
2002
2004
2005
2006/* Physical Component ID Structure (follows POWER_STATE above) */
2007
2009{
2010 UINT16 ComponentId;
2011
2013
2014
2015/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
2016
2018{
2019 UINT16 CharacteristicsCount;
2020 UINT16 Reserved;
2021
2023
2025{
2026 UINT8 StructureId;
2027 UINT8 Flags;
2028 UINT16 Reserved1;
2029 UINT32 AveragePower;
2030 UINT32 PowerSaving;
2031 UINT64 ExitLatency;
2032 UINT64 Reserved2;
2033
2035
2036/* Values for Flags field above */
2037
2038#define ACPI_MPST_PRESERVE 1
2039#define ACPI_MPST_AUTOENTRY 2
2040#define ACPI_MPST_AUTOEXIT 4
2041
2042
2043/* Shared Memory Region (not part of an ACPI table) */
2044
2045typedef struct acpi_mpst_shared
2046{
2047 UINT32 Signature;
2048 UINT16 PccCommand;
2049 UINT16 PccStatus;
2050 UINT32 CommandRegister;
2051 UINT32 StatusRegister;
2052 UINT32 PowerStateId;
2053 UINT32 PowerNodeId;
2054 UINT64 EnergyConsumed;
2055 UINT64 AveragePower;
2056
2058
2059
2060/*******************************************************************************
2061 *
2062 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
2063 * Version 1
2064 *
2065 ******************************************************************************/
2066
2067typedef struct acpi_table_msct
2068{
2069 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2070 UINT32 ProximityOffset; /* Location of proximity info struct(s) */
2071 UINT32 MaxProximityDomains;/* Max number of proximity domains */
2072 UINT32 MaxClockDomains; /* Max number of clock domains */
2073 UINT64 MaxAddress; /* Max physical address in system */
2074
2076
2077
2078/* Subtable - Maximum Proximity Domain Information. Version 1 */
2079
2081{
2082 UINT8 Revision;
2083 UINT8 Length;
2084 UINT32 RangeStart; /* Start of domain range */
2085 UINT32 RangeEnd; /* End of domain range */
2086 UINT32 ProcessorCapacity;
2087 UINT64 MemoryCapacity; /* In bytes */
2088
2090
2091
2092/*******************************************************************************
2093 *
2094 * MSDM - Microsoft Data Management table
2095 *
2096 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
2097 * November 29, 2011. Copyright 2011 Microsoft
2098 *
2099 ******************************************************************************/
2100
2101/* Basic MSDM table is only the common ACPI header */
2102
2103typedef struct acpi_table_msdm
2104{
2105 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2106
2108
2109
2110/*******************************************************************************
2111 *
2112 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
2113 * Version 1
2114 *
2115 ******************************************************************************/
2116
2117typedef struct acpi_table_nfit
2118{
2119 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2120 UINT32 Reserved; /* Reserved, must be zero */
2121
2123
2124/* Subtable header for NFIT */
2125
2126typedef struct acpi_nfit_header
2127{
2128 UINT16 Type;
2129 UINT16 Length;
2130
2132
2133
2134/* Values for subtable type in ACPI_NFIT_HEADER */
2135
2136enum AcpiNfitType
2137{
2138 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
2139 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
2140 ACPI_NFIT_TYPE_INTERLEAVE = 2,
2141 ACPI_NFIT_TYPE_SMBIOS = 3,
2142 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
2143 ACPI_NFIT_TYPE_DATA_REGION = 5,
2144 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
2145 ACPI_NFIT_TYPE_CAPABILITIES = 7,
2146 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
2147};
2148
2149/*
2150 * NFIT Subtables
2151 */
2152
2153/* 0: System Physical Address Range Structure */
2154
2156{
2157 ACPI_NFIT_HEADER Header;
2158 UINT16 RangeIndex;
2159 UINT16 Flags;
2160 UINT32 Reserved; /* Reserved, must be zero */
2161 UINT32 ProximityDomain;
2162 UINT8 RangeGuid[16];
2163 UINT64 Address;
2164 UINT64 Length;
2165 UINT64 MemoryMapping;
2166 UINT64 LocationCookie; /* ACPI 6.4 */
2167
2169
2170/* Flags */
2171
2172#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
2173#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
2174#define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
2175
2176/* Range Type GUIDs appear in the include/acuuid.h file */
2177
2178
2179/* 1: Memory Device to System Address Range Map Structure */
2180
2182{
2183 ACPI_NFIT_HEADER Header;
2184 UINT32 DeviceHandle;
2185 UINT16 PhysicalId;
2186 UINT16 RegionId;
2187 UINT16 RangeIndex;
2188 UINT16 RegionIndex;
2189 UINT64 RegionSize;
2190 UINT64 RegionOffset;
2191 UINT64 Address;
2192 UINT16 InterleaveIndex;
2193 UINT16 InterleaveWays;
2194 UINT16 Flags;
2195 UINT16 Reserved; /* Reserved, must be zero */
2196
2198
2199/* Flags */
2200
2201#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
2202#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
2203#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
2204#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
2205#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
2206#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
2207#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
2208
2209
2210/* 2: Interleave Structure */
2211
2213{
2214 ACPI_NFIT_HEADER Header;
2215 UINT16 InterleaveIndex;
2216 UINT16 Reserved; /* Reserved, must be zero */
2217 UINT32 LineCount;
2218 UINT32 LineSize;
2219 UINT32 LineOffset[]; /* Variable length */
2220
2222
2223
2224/* 3: SMBIOS Management Information Structure */
2225
2226typedef struct acpi_nfit_smbios
2227{
2228 ACPI_NFIT_HEADER Header;
2229 UINT32 Reserved; /* Reserved, must be zero */
2230 UINT8 Data[]; /* Variable length */
2231
2233
2234
2235/* 4: NVDIMM Control Region Structure */
2236
2238{
2239 ACPI_NFIT_HEADER Header;
2240 UINT16 RegionIndex;
2241 UINT16 VendorId;
2242 UINT16 DeviceId;
2243 UINT16 RevisionId;
2244 UINT16 SubsystemVendorId;
2245 UINT16 SubsystemDeviceId;
2246 UINT16 SubsystemRevisionId;
2247 UINT8 ValidFields;
2248 UINT8 ManufacturingLocation;
2249 UINT16 ManufacturingDate;
2250 UINT8 Reserved[2]; /* Reserved, must be zero */
2251 UINT32 SerialNumber;
2252 UINT16 Code;
2253 UINT16 Windows;
2254 UINT64 WindowSize;
2255 UINT64 CommandOffset;
2256 UINT64 CommandSize;
2257 UINT64 StatusOffset;
2258 UINT64 StatusSize;
2259 UINT16 Flags;
2260 UINT8 Reserved1[6]; /* Reserved, must be zero */
2261
2263
2264/* Flags */
2265
2266#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
2267
2268/* ValidFields bits */
2269
2270#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
2271
2272
2273/* 5: NVDIMM Block Data Window Region Structure */
2274
2276{
2277 ACPI_NFIT_HEADER Header;
2278 UINT16 RegionIndex;
2279 UINT16 Windows;
2280 UINT64 Offset;
2281 UINT64 Size;
2282 UINT64 Capacity;
2283 UINT64 StartAddress;
2284
2286
2287
2288/* 6: Flush Hint Address Structure */
2289
2291{
2292 ACPI_NFIT_HEADER Header;
2293 UINT32 DeviceHandle;
2294 UINT16 HintCount;
2295 UINT8 Reserved[6]; /* Reserved, must be zero */
2296 UINT64 HintAddress[]; /* Variable length */
2297
2299
2300
2301/* 7: Platform Capabilities Structure */
2302
2304{
2305 ACPI_NFIT_HEADER Header;
2306 UINT8 HighestCapability;
2307 UINT8 Reserved[3]; /* Reserved, must be zero */
2308 UINT32 Capabilities;
2309 UINT32 Reserved2;
2310
2312
2313/* Capabilities Flags */
2314
2315#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
2316#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
2317#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
2318
2319
2320/*
2321 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
2322 */
2324{
2325 UINT32 Handle;
2326
2328
2329/* Device handle construction and extraction macros */
2330
2331#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
2332#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
2333#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
2334#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
2335#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
2336
2337#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
2338#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
2339#define ACPI_NFIT_MEMORY_ID_OFFSET 8
2340#define ACPI_NFIT_SOCKET_ID_OFFSET 12
2341#define ACPI_NFIT_NODE_ID_OFFSET 16
2342
2343/* Macro to construct a NFIT/NVDIMM device handle */
2344
2345#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
2346 ((dimm) | \
2347 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
2348 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
2349 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
2350 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
2351
2352/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
2353
2354#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
2355 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
2356
2357#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
2358 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
2359
2360#define ACPI_NFIT_GET_MEMORY_ID(handle) \
2361 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
2362
2363#define ACPI_NFIT_GET_SOCKET_ID(handle) \
2364 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
2365
2366#define ACPI_NFIT_GET_NODE_ID(handle) \
2367 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
2368
2369
2370/*******************************************************************************
2371 *
2372 * NHLT - Non HDAudio Link Table
2373 * Version 1
2374 *
2375 ******************************************************************************/
2376
2377typedef struct acpi_table_nhlt
2378{
2379 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2380 UINT8 EndpointsCount;
2381 /*
2382 * ACPI_NHLT_ENDPOINT Endpoints[];
2383 * ACPI_NHLT_CONFIG OEDConfig;
2384 */
2385
2387
2389{
2390 UINT32 Length;
2391 UINT8 LinkType;
2392 UINT8 InstanceId;
2393 UINT16 VendorId;
2394 UINT16 DeviceId;
2395 UINT16 RevisionId;
2396 UINT32 SubsystemId;
2397 UINT8 DeviceType;
2398 UINT8 Direction;
2399 UINT8 VirtualBusId;
2400 /*
2401 * ACPI_NHLT_CONFIG DeviceConfig;
2402 * ACPI_NHLT_FORMATS_CONFIG FormatsConfig;
2403 * ACPI_NHLT_DEVICES_INFO DevicesInfo;
2404 */
2405
2407
2408/* Values for LinkType field above */
2409
2410#define ACPI_NHLT_LINKTYPE_HDA 0
2411#define ACPI_NHLT_LINKTYPE_DSP 1
2412#define ACPI_NHLT_LINKTYPE_PDM 2
2413#define ACPI_NHLT_LINKTYPE_SSP 3
2414#define ACPI_NHLT_LINKTYPE_SLIMBUS 4
2415#define ACPI_NHLT_LINKTYPE_SDW 5
2416#define ACPI_NHLT_LINKTYPE_UAOL 6
2417
2418/* Values for DeviceId field above */
2419
2420#define ACPI_NHLT_DEVICEID_DMIC 0xAE20
2421#define ACPI_NHLT_DEVICEID_BT 0xAE30
2422#define ACPI_NHLT_DEVICEID_I2S 0xAE34
2423
2424/* Values for DeviceType field above */
2425
2426/* Device types unique to endpoint of LinkType=PDM */
2427#define ACPI_NHLT_DEVICETYPE_PDM 0
2428#define ACPI_NHLT_DEVICETYPE_PDM_SKL 1
2429/* Device types unique to endpoint of LinkType=SSP */
2430#define ACPI_NHLT_DEVICETYPE_BT 0
2431#define ACPI_NHLT_DEVICETYPE_FM 1
2432#define ACPI_NHLT_DEVICETYPE_MODEM 2
2433#define ACPI_NHLT_DEVICETYPE_CODEC 4
2434
2435/* Values for Direction field above */
2436
2437#define ACPI_NHLT_DIR_RENDER 0
2438#define ACPI_NHLT_DIR_CAPTURE 1
2439
2440typedef struct acpi_nhlt_config
2441{
2442 UINT32 CapabilitiesSize;
2443 UINT8 Capabilities[1];
2444
2446
2448{
2449 UINT8 VirtualSlot;
2450 UINT8 ConfigType;
2451
2453
2454/* Values for ConfigType field above */
2455
2456#define ACPI_NHLT_CONFIGTYPE_GENERIC 0
2457#define ACPI_NHLT_CONFIGTYPE_MICARRAY 1
2458
2460{
2461 UINT8 VirtualSlot;
2462 UINT8 ConfigType;
2463 UINT8 ArrayType;
2464
2466
2467/* Values for ArrayType field above */
2468
2469#define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA
2470#define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB
2471#define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC
2472#define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD
2473#define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE
2474#define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF
2475
2477{
2478 UINT8 Type;
2479 UINT8 Panel;
2480 UINT16 SpeakerPositionDistance; /* mm */
2481 UINT16 HorizontalOffset; /* mm */
2482 UINT16 VerticalOffset; /* mm */
2483 UINT8 FrequencyLowBand; /* 5*Hz */
2484 UINT8 FrequencyHighBand; /* 500*Hz */
2485 UINT16 DirectionAngle; /* -180 - +180 */
2486 UINT16 ElevationAngle; /* -180 - +180 */
2487 UINT16 WorkVerticalAngleBegin; /* -180 - +180 with 2 deg step */
2488 UINT16 WorkVerticalAngleEnd; /* -180 - +180 with 2 deg step */
2489 UINT16 WorkHorizontalAngleBegin; /* -180 - +180 with 2 deg step */
2490 UINT16 WorkHorizontalAngleEnd; /* -180 - +180 with 2 deg step */
2491
2493
2494/* Values for Type field above */
2495
2496#define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0
2497#define ACPI_NHLT_MICTYPE_SUBCARDIOID 1
2498#define ACPI_NHLT_MICTYPE_CARDIOID 2
2499#define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3
2500#define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4
2501#define ACPI_NHLT_MICTYPE_8SHAPED 5
2502#define ACPI_NHLT_MICTYPE_RESERVED 6
2503#define ACPI_NHLT_MICTYPE_VENDORDEFINED 7
2504
2505/* Values for Panel field above */
2506
2507#define ACPI_NHLT_MICLOCATION_TOP 0
2508#define ACPI_NHLT_MICLOCATION_BOTTOM 1
2509#define ACPI_NHLT_MICLOCATION_LEFT 2
2510#define ACPI_NHLT_MICLOCATION_RIGHT 3
2511#define ACPI_NHLT_MICLOCATION_FRONT 4
2512#define ACPI_NHLT_MICLOCATION_REAR 5
2513
2515{
2516 UINT8 VirtualSlot;
2517 UINT8 ConfigType;
2518 UINT8 ArrayType;
2519 UINT8 MicsCount;
2521
2523
2525{
2526 UINT8 VirtualSlot;
2530
2532
2533/* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */
2535{
2536 UINT16 FormatTag;
2537 UINT16 ChannelCount;
2538 UINT32 SamplesPerSec;
2539 UINT32 AvgBytesPerSec;
2540 UINT16 BlockAlign;
2541 UINT16 BitsPerSample;
2542 UINT16 ExtraFormatSize;
2543 UINT16 ValidBitsPerSample;
2544 UINT32 ChannelMask;
2545 UINT8 Subformat[16];
2546
2548
2550{
2552 ACPI_NHLT_CONFIG Config;
2553
2555
2557{
2558 UINT8 FormatsCount;
2559 ACPI_NHLT_FORMAT_CONFIG Formats[];
2560
2562
2564{
2565 UINT8 Id[16];
2566 UINT8 InstanceId;
2567 UINT8 PortId;
2568
2570
2572{
2573 UINT8 DevicesCount;
2574 ACPI_NHLT_DEVICE_INFO Devices[];
2575
2577
2578
2579/*******************************************************************************
2580 *
2581 * PCCT - Platform Communications Channel Table (ACPI 5.0)
2582 * Version 2 (ACPI 6.2)
2583 *
2584 ******************************************************************************/
2585
2586typedef struct acpi_table_pcct
2587{
2588 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2589 UINT32 Flags;
2590 UINT64 Reserved;
2591
2593
2594/* Values for Flags field above */
2595
2596#define ACPI_PCCT_DOORBELL 1
2597
2598/* Values for subtable type in ACPI_SUBTABLE_HEADER */
2599
2600enum AcpiPcctType
2601{
2602 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
2603 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
2604 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
2605 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
2606 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
2607 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
2608 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
2609};
2610
2611/*
2612 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER
2613 */
2614
2615/* 0: Generic Communications Subspace */
2616
2618{
2619 ACPI_SUBTABLE_HEADER Header;
2620 UINT8 Reserved[6];
2621 UINT64 BaseAddress;
2622 UINT64 Length;
2623 ACPI_GENERIC_ADDRESS DoorbellRegister;
2624 UINT64 PreserveMask;
2625 UINT64 WriteMask;
2626 UINT32 Latency;
2627 UINT32 MaxAccessRate;
2628 UINT16 MinTurnaroundTime;
2629
2631
2632
2633/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
2634
2636{
2637 ACPI_SUBTABLE_HEADER Header;
2638 UINT32 PlatformInterrupt;
2639 UINT8 Flags;
2640 UINT8 Reserved;
2641 UINT64 BaseAddress;
2642 UINT64 Length;
2643 ACPI_GENERIC_ADDRESS DoorbellRegister;
2644 UINT64 PreserveMask;
2645 UINT64 WriteMask;
2646 UINT32 Latency;
2647 UINT32 MaxAccessRate;
2648 UINT16 MinTurnaroundTime;
2649
2651
2652
2653/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
2654
2656{
2657 ACPI_SUBTABLE_HEADER Header;
2658 UINT32 PlatformInterrupt;
2659 UINT8 Flags;
2660 UINT8 Reserved;
2661 UINT64 BaseAddress;
2662 UINT64 Length;
2663 ACPI_GENERIC_ADDRESS DoorbellRegister;
2664 UINT64 PreserveMask;
2665 UINT64 WriteMask;
2666 UINT32 Latency;
2667 UINT32 MaxAccessRate;
2668 UINT16 MinTurnaroundTime;
2669 ACPI_GENERIC_ADDRESS PlatformAckRegister;
2670 UINT64 AckPreserveMask;
2671 UINT64 AckWriteMask;
2672
2674
2675
2676/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
2677
2679{
2680 ACPI_SUBTABLE_HEADER Header;
2681 UINT32 PlatformInterrupt;
2682 UINT8 Flags;
2683 UINT8 Reserved1;
2684 UINT64 BaseAddress;
2685 UINT32 Length;
2686 ACPI_GENERIC_ADDRESS DoorbellRegister;
2687 UINT64 PreserveMask;
2688 UINT64 WriteMask;
2689 UINT32 Latency;
2690 UINT32 MaxAccessRate;
2691 UINT32 MinTurnaroundTime;
2692 ACPI_GENERIC_ADDRESS PlatformAckRegister;
2693 UINT64 AckPreserveMask;
2694 UINT64 AckSetMask;
2695 UINT64 Reserved2;
2696 ACPI_GENERIC_ADDRESS CmdCompleteRegister;
2697 UINT64 CmdCompleteMask;
2698 ACPI_GENERIC_ADDRESS CmdUpdateRegister;
2699 UINT64 CmdUpdatePreserveMask;
2700 UINT64 CmdUpdateSetMask;
2701 ACPI_GENERIC_ADDRESS ErrorStatusRegister;
2702 UINT64 ErrorStatusMask;
2703
2705
2706
2707/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
2708
2710{
2711 ACPI_SUBTABLE_HEADER Header;
2712 UINT32 PlatformInterrupt;
2713 UINT8 Flags;
2714 UINT8 Reserved1;
2715 UINT64 BaseAddress;
2716 UINT32 Length;
2717 ACPI_GENERIC_ADDRESS DoorbellRegister;
2718 UINT64 PreserveMask;
2719 UINT64 WriteMask;
2720 UINT32 Latency;
2721 UINT32 MaxAccessRate;
2722 UINT32 MinTurnaroundTime;
2723 ACPI_GENERIC_ADDRESS PlatformAckRegister;
2724 UINT64 AckPreserveMask;
2725 UINT64 AckSetMask;
2726 UINT64 Reserved2;
2727 ACPI_GENERIC_ADDRESS CmdCompleteRegister;
2728 UINT64 CmdCompleteMask;
2729 ACPI_GENERIC_ADDRESS CmdUpdateRegister;
2730 UINT64 CmdUpdatePreserveMask;
2731 UINT64 CmdUpdateSetMask;
2732 ACPI_GENERIC_ADDRESS ErrorStatusRegister;
2733 UINT64 ErrorStatusMask;
2734
2736
2737/* 5: HW Registers based Communications Subspace */
2738
2739typedef struct acpi_pcct_hw_reg
2740{
2741 ACPI_SUBTABLE_HEADER Header;
2742 UINT16 Version;
2743 UINT64 BaseAddress;
2744 UINT64 Length;
2745 ACPI_GENERIC_ADDRESS DoorbellRegister;
2746 UINT64 DoorbellPreserve;
2747 UINT64 DoorbellWrite;
2748 ACPI_GENERIC_ADDRESS CmdCompleteRegister;
2749 UINT64 CmdCompleteMask;
2750 ACPI_GENERIC_ADDRESS ErrorStatusRegister;
2751 UINT64 ErrorStatusMask;
2752 UINT32 NominalLatency;
2753 UINT32 MinTurnaroundTime;
2754
2756
2757
2758/* Values for doorbell flags above */
2759
2760#define ACPI_PCCT_INTERRUPT_POLARITY (1)
2761#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
2762
2763
2764/*
2765 * PCC memory structures (not part of the ACPI table)
2766 */
2767
2768/* Shared Memory Region */
2769
2771{
2772 UINT32 Signature;
2773 UINT16 Command;
2774 UINT16 Status;
2775
2777
2778
2779/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
2780
2782{
2783 UINT32 Signature;
2784 UINT32 Flags;
2785 UINT32 Length;
2786 UINT32 Command;
2787
2789
2790
2791/*******************************************************************************
2792 *
2793 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
2794 * Version 0
2795 *
2796 ******************************************************************************/
2797
2798typedef struct acpi_table_pdtt
2799{
2800 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2801 UINT8 TriggerCount;
2802 UINT8 Reserved[3];
2803 UINT32 ArrayOffset;
2804
2806
2807
2808/*
2809 * PDTT Communication Channel Identifier Structure.
2810 * The number of these structures is defined by TriggerCount above,
2811 * starting at ArrayOffset.
2812 */
2813typedef struct acpi_pdtt_channel
2814{
2815 UINT8 SubchannelId;
2816 UINT8 Flags;
2817
2819
2820/* Flags for above */
2821
2822#define ACPI_PDTT_RUNTIME_TRIGGER (1)
2823#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
2824#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
2825
2826
2827/*******************************************************************************
2828 *
2829 * PHAT - Platform Health Assessment Table (ACPI 6.4)
2830 * Version 1
2831 *
2832 ******************************************************************************/
2833
2834typedef struct acpi_table_phat
2835{
2836 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2837
2839
2840/* Common header for PHAT subtables that follow main table */
2841
2842typedef struct acpi_phat_header
2843{
2844 UINT16 Type;
2845 UINT16 Length;
2846 UINT8 Revision;
2847
2849
2850
2851/* Values for Type field above */
2852
2853#define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
2854#define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
2855#define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
2856
2857/*
2858 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER
2859 */
2860
2861/* 0: Firmware Version Data Record */
2862
2864{
2865 ACPI_PHAT_HEADER Header;
2866 UINT8 Reserved[3];
2867 UINT32 ElementCount;
2868
2870
2872{
2873 UINT8 Guid[16];
2874 UINT64 VersionValue;
2875 UINT32 ProducerId;
2876
2878
2879
2880/* 1: Firmware Health Data Record */
2881
2883{
2884 ACPI_PHAT_HEADER Header;
2885 UINT8 Reserved[2];
2886 UINT8 Health;
2887 UINT8 DeviceGuid[16];
2888 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */
2889
2891
2892/* Values for Health field above */
2893
2894#define ACPI_PHAT_ERRORS_FOUND 0
2895#define ACPI_PHAT_NO_ERRORS 1
2896#define ACPI_PHAT_UNKNOWN_ERRORS 2
2897#define ACPI_PHAT_ADVISORY 3
2898
2899
2900/*******************************************************************************
2901 *
2902 * PMTT - Platform Memory Topology Table (ACPI 5.0)
2903 * Version 1
2904 *
2905 ******************************************************************************/
2906
2907typedef struct acpi_table_pmtt
2908{
2909 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2910 UINT32 MemoryDeviceCount;
2911 /*
2912 * Immediately followed by:
2913 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount];
2914 */
2915
2917
2918
2919/* Common header for PMTT subtables that follow main table */
2920
2921typedef struct acpi_pmtt_header
2922{
2923 UINT8 Type;
2924 UINT8 Reserved1;
2925 UINT16 Length;
2926 UINT16 Flags;
2927 UINT16 Reserved2;
2928 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */
2929 /*
2930 * Immediately followed by:
2931 * UINT8 TypeSpecificData[]
2932 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount];
2933 */
2934
2936
2937/* Values for Type field above */
2938
2939#define ACPI_PMTT_TYPE_SOCKET 0
2940#define ACPI_PMTT_TYPE_CONTROLLER 1
2941#define ACPI_PMTT_TYPE_DIMM 2
2942#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
2943#define ACPI_PMTT_TYPE_VENDOR 0xFF
2944
2945/* Values for Flags field above */
2946
2947#define ACPI_PMTT_TOP_LEVEL 0x0001
2948#define ACPI_PMTT_PHYSICAL 0x0002
2949#define ACPI_PMTT_MEMORY_TYPE 0x000C
2950
2951
2952/*
2953 * PMTT subtables, correspond to Type in acpi_pmtt_header
2954 */
2955
2956
2957/* 0: Socket Structure */
2958
2959typedef struct acpi_pmtt_socket
2960{
2961 ACPI_PMTT_HEADER Header;
2962 UINT16 SocketId;
2963 UINT16 Reserved;
2964
2966 /*
2967 * Immediately followed by:
2968 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount];
2969 */
2970
2971
2972/* 1: Memory Controller subtable */
2973
2975{
2976 ACPI_PMTT_HEADER Header;
2977 UINT16 ControllerId;
2978 UINT16 Reserved;
2979
2981 /*
2982 * Immediately followed by:
2983 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount];
2984 */
2985
2986
2987/* 2: Physical Component Identifier (DIMM) */
2988
2990{
2991 ACPI_PMTT_HEADER Header;
2992 UINT32 BiosHandle;
2993
2995
2996
2997/* 0xFF: Vendor Specific Data */
2998
3000{
3001 ACPI_PMTT_HEADER Header;
3002 UINT8 TypeUuid[16];
3003 UINT8 Specific[];
3004 /*
3005 * Immediately followed by:
3006 * UINT8 VendorSpecificData[];
3007 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount];
3008 */
3009
3011
3012
3013/*******************************************************************************
3014 *
3015 * PPTT - Processor Properties Topology Table (ACPI 6.2)
3016 * Version 1
3017 *
3018 ******************************************************************************/
3019
3020typedef struct acpi_table_pptt
3021{
3022 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
3023
3025
3026/* Values for Type field above */
3027
3028enum AcpiPpttType
3029{
3030 ACPI_PPTT_TYPE_PROCESSOR = 0,
3031 ACPI_PPTT_TYPE_CACHE = 1,
3032 ACPI_PPTT_TYPE_ID = 2,
3033 ACPI_PPTT_TYPE_RESERVED = 3
3034};
3035
3036
3037/* 0: Processor Hierarchy Node Structure */
3038
3040{
3041 ACPI_SUBTABLE_HEADER Header;
3042 UINT16 Reserved;
3043 UINT32 Flags;
3044 UINT32 Parent;
3045 UINT32 AcpiProcessorId;
3046 UINT32 NumberOfPrivResources;
3047
3049
3050/* Flags */
3051
3052#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
3053#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
3054#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
3055#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
3056#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
3057
3058
3059/* 1: Cache Type Structure */
3060
3061typedef struct acpi_pptt_cache
3062{
3063 ACPI_SUBTABLE_HEADER Header;
3064 UINT16 Reserved;
3065 UINT32 Flags;
3066 UINT32 NextLevelOfCache;
3067 UINT32 Size;
3068 UINT32 NumberOfSets;
3069 UINT8 Associativity;
3070 UINT8 Attributes;
3071 UINT16 LineSize;
3072
3074
3075/* 1: Cache Type Structure for PPTT version 3 */
3076
3078{
3079 UINT32 CacheId;
3080
3082
3083
3084/* Flags */
3085
3086#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
3087#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
3088#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
3089#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
3090#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
3091#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
3092#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
3093#define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
3094
3095/* Masks for Attributes */
3096
3097#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
3098#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
3099#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
3100
3101/* Attributes describing cache */
3102#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
3103#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
3104#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
3105#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
3106
3107#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
3108#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
3109#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
3110#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
3111
3112#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
3113#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
3114
3115/* 2: ID Structure */
3116
3117typedef struct acpi_pptt_id
3118{
3119 ACPI_SUBTABLE_HEADER Header;
3120 UINT16 Reserved;
3121 UINT32 VendorId;
3122 UINT64 Level1Id;
3123 UINT64 Level2Id;
3124 UINT16 MajorRev;
3125 UINT16 MinorRev;
3126 UINT16 SpinRev;
3127
3128} ACPI_PPTT_ID;
3129
3130
3131/*******************************************************************************
3132 *
3133 * PRMT - Platform Runtime Mechanism Table
3134 * Version 1
3135 *
3136 ******************************************************************************/
3137
3138typedef struct acpi_table_prmt
3139{
3140 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
3141
3143
3145{
3146 UINT8 PlatformGuid[16];
3147 UINT32 ModuleInfoOffset;
3148 UINT32 ModuleInfoCount;
3149
3151
3153{
3154 UINT16 Revision;
3155 UINT16 Length;
3156
3158
3160{
3161 UINT16 Revision;
3162 UINT16 Length;
3163 UINT8 ModuleGuid[16];
3164 UINT16 MajorRev;
3165 UINT16 MinorRev;
3166 UINT16 HandlerInfoCount;
3167 UINT32 HandlerInfoOffset;
3168 UINT64 MmioListPointer;
3169
3171
3173{
3174 UINT16 Revision;
3175 UINT16 Length;
3176 UINT8 HandlerGuid[16];
3177 UINT64 HandlerAddress;
3178 UINT64 StaticDataBufferAddress;
3179 UINT64 AcpiParamBufferAddress;
3180
3182
3183
3184/*******************************************************************************
3185 *
3186 * RASF - RAS Feature Table (ACPI 5.0)
3187 * Version 1
3188 *
3189 ******************************************************************************/
3190
3191typedef struct acpi_table_rasf
3192{
3193 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
3194 UINT8 ChannelId[12];
3195
3197
3198/* RASF Platform Communication Channel Shared Memory Region */
3199
3201{
3202 UINT32 Signature;
3203 UINT16 Command;
3204 UINT16 Status;
3205 UINT16 Version;
3206 UINT8 Capabilities[16];
3207 UINT8 SetCapabilities[16];
3208 UINT16 NumParameterBlocks;
3209 UINT32 SetCapabilitiesStatus;
3210
3212
3213/* RASF Parameter Block Structure Header */
3214
3216{
3217 UINT16 Type;
3218 UINT16 Version;
3219 UINT16 Length;
3220
3222
3223/* RASF Parameter Block Structure for PATROL_SCRUB */
3224
3226{
3228 UINT16 PatrolScrubCommand;
3229 UINT64 RequestedAddressRange[2];
3230 UINT64 ActualAddressRange[2];
3231 UINT16 Flags;
3232 UINT8 RequestedSpeed;
3233
3235
3236/* Masks for Flags and Speed fields above */
3237
3238#define ACPI_RASF_SCRUBBER_RUNNING 1
3239#define ACPI_RASF_SPEED (7<<1)
3240#define ACPI_RASF_SPEED_SLOW (0<<1)
3241#define ACPI_RASF_SPEED_MEDIUM (4<<1)
3242#define ACPI_RASF_SPEED_FAST (7<<1)
3243
3244/* Channel Commands */
3245
3246enum AcpiRasfCommands
3247{
3248 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
3249};
3250
3251/* Platform RAS Capabilities */
3252
3253enum AcpiRasfCapabiliities
3254{
3255 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
3256 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
3257};
3258
3259/* Patrol Scrub Commands */
3260
3261enum AcpiRasfPatrolScrubCommands
3262{
3263 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
3264 ACPI_RASF_START_PATROL_SCRUBBER = 2,
3265 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
3266};
3267
3268/* Channel Command flags */
3269
3270#define ACPI_RASF_GENERATE_SCI (1<<15)
3271
3272/* Status values */
3273
3274enum AcpiRasfStatus
3275{
3276 ACPI_RASF_SUCCESS = 0,
3277 ACPI_RASF_NOT_VALID = 1,
3278 ACPI_RASF_NOT_SUPPORTED = 2,
3279 ACPI_RASF_BUSY = 3,
3280 ACPI_RASF_FAILED = 4,
3281 ACPI_RASF_ABORTED = 5,
3282 ACPI_RASF_INVALID_DATA = 6
3283};
3284
3285/* Status flags */
3286
3287#define ACPI_RASF_COMMAND_COMPLETE (1)
3288#define ACPI_RASF_SCI_DOORBELL (1<<1)
3289#define ACPI_RASF_ERROR (1<<2)
3290#define ACPI_RASF_STATUS (0x1F<<3)
3291
3292
3293/*******************************************************************************
3294 *
3295 * RAS2 - RAS2 Feature Table (ACPI 6.5)
3296 * Version 1
3297 *
3298 *
3299 ******************************************************************************/
3300
3301typedef struct acpi_table_ras2 {
3302 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
3303 UINT16 Reserved;
3304 UINT16 NumPccDescs;
3305
3307
3308/* RAS2 Platform Communication Channel Descriptor */
3309
3310typedef struct acpi_ras2_pcc_desc {
3311 UINT8 ChannelId;
3312 UINT16 Reserved;
3313 UINT8 FeatureType;
3314 UINT32 Instance;
3315
3317
3318/* RAS2 Platform Communication Channel Shared Memory Region */
3319
3321 UINT32 Signature;
3322 UINT16 Command;
3323 UINT16 Status;
3324 UINT16 Version;
3325 UINT8 Features[16];
3326 UINT8 SetCapabilities[16];
3327 UINT16 NumParameterBlocks;
3328 UINT32 SetCapabilitiesStatus;
3329
3331
3332/* RAS2 Parameter Block Structure for PATROL_SCRUB */
3333
3335{
3336 UINT16 Type;
3337 UINT16 Version;
3338 UINT16 Length;
3339
3341
3342/* RAS2 Parameter Block Structure for PATROL_SCRUB */
3343
3346 UINT16 PatrolScrubCommand;
3347 UINT64 RequestedAddressRange[2];
3348 UINT64 ActualAddressRange[2];
3349 UINT32 Flags;
3350 UINT32 ScrubParamsOut;
3351 UINT32 ScrubParamsIn;
3352
3354
3355/* Masks for Flags field above */
3356
3357#define ACPI_RAS2_SCRUBBER_RUNNING 1
3358
3359/* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */
3360
3363 UINT16 AddrTranslationCommand;
3364 UINT64 SubInstId;
3365 UINT64 LogicalAddress;
3366 UINT64 PhysicalAddress;
3367 UINT32 Status;
3368
3370
3371/* Channel Commands */
3372
3373enum AcpiRas2Commands
3374{
3375 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1
3376};
3377
3378/* Platform RAS2 Features */
3379
3380enum AcpiRas2Features
3381{
3382 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0,
3383 ACPI_RAS2_LA2PA_TRANSLATION = 1
3384};
3385
3386/* RAS2 Patrol Scrub Commands */
3387
3388enum AcpiRas2PatrolScrubCommands
3389{
3390 ACPI_RAS2_GET_PATROL_PARAMETERS = 1,
3391 ACPI_RAS2_START_PATROL_SCRUBBER = 2,
3392 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3
3393};
3394
3395/* RAS2 LA2PA Translation Commands */
3396
3397enum AcpiRas2La2PaTranslationCommands
3398{
3399 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1,
3400};
3401
3402/* RAS2 LA2PA Translation Status values */
3403
3404enum AcpiRas2La2PaTranslationStatus
3405{
3406 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0,
3407 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1,
3408};
3409
3410/* Channel Command flags */
3411
3412#define ACPI_RAS2_GENERATE_SCI (1<<15)
3413
3414/* Status values */
3415
3416enum AcpiRas2Status
3417{
3418 ACPI_RAS2_SUCCESS = 0,
3419 ACPI_RAS2_NOT_VALID = 1,
3420 ACPI_RAS2_NOT_SUPPORTED = 2,
3421 ACPI_RAS2_BUSY = 3,
3422 ACPI_RAS2_FAILED = 4,
3423 ACPI_RAS2_ABORTED = 5,
3424 ACPI_RAS2_INVALID_DATA = 6
3425};
3426
3427/* Status flags */
3428
3429#define ACPI_RAS2_COMMAND_COMPLETE (1)
3430#define ACPI_RAS2_SCI_DOORBELL (1<<1)
3431#define ACPI_RAS2_ERROR (1<<2)
3432#define ACPI_RAS2_STATUS (0x1F<<3)
3433
3434
3435/*******************************************************************************
3436 *
3437 * RGRT - Regulatory Graphics Resource Table
3438 * Version 1
3439 *
3440 * Conforms to "ACPI RGRT" available at:
3441 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/
3442 *
3443 ******************************************************************************/
3444
3445typedef struct acpi_table_rgrt
3446{
3447 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
3448 UINT16 Version;
3449 UINT8 ImageType;
3450 UINT8 Reserved;
3451 UINT8 Image[];
3452
3454
3455/* ImageType values */
3456
3457enum AcpiRgrtImageType
3458{
3459 ACPI_RGRT_TYPE_RESERVED0 = 0,
3460 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
3461 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
3462};
3463
3464
3465/*******************************************************************************
3466 *
3467 * RHCT - RISC-V Hart Capabilities Table
3468 * Version 1
3469 *
3470 ******************************************************************************/
3471
3472typedef struct acpi_table_rhct {
3473 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
3474 UINT32 Flags; /* RHCT flags */
3475 UINT64 TimeBaseFreq;
3476 UINT32 NodeCount;
3477 UINT32 NodeOffset;
3479
3480/* RHCT Flags */
3481
3482#define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1)
3483/*
3484 * RHCT subtables
3485 */
3487 UINT16 Type;
3488 UINT16 Length;
3489 UINT16 Revision;
3491
3492/* Values for RHCT subtable Type above */
3493
3494enum acpi_rhct_node_type {
3495 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000,
3496 ACPI_RHCT_NODE_TYPE_CMO = 0x0001,
3497 ACPI_RHCT_NODE_TYPE_MMU = 0x0002,
3498 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003,
3499 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF,
3500};
3501
3502/*
3503 * RHCT node specific subtables
3504 */
3505
3506/* ISA string node structure */
3507typedef struct acpi_rhct_isa_string {
3508 UINT16 IsaLength;
3509 char Isa[];
3511
3512typedef struct acpi_rhct_cmo_node {
3513 UINT8 Reserved; /* Must be zero */
3514 UINT8 CbomSize; /* CBOM size in powerof 2 */
3515 UINT8 CbopSize; /* CBOP size in powerof 2 */
3516 UINT8 CbozSize; /* CBOZ size in powerof 2 */
3518
3519typedef struct acpi_rhct_mmu_node {
3520 UINT8 Reserved; /* Must be zero */
3521 UINT8 MmuType; /* Virtual Address Scheme */
3523
3524enum acpi_rhct_mmu_type {
3525 ACPI_RHCT_MMU_TYPE_SV39 = 0,
3526 ACPI_RHCT_MMU_TYPE_SV48 = 1,
3527 ACPI_RHCT_MMU_TYPE_SV57 = 2
3528};
3529
3530/* Hart Info node structure */
3531typedef struct acpi_rhct_hart_info {
3532 UINT16 NumOffsets;
3533 UINT32 Uid; /* ACPI processor UID */
3535
3536/*******************************************************************************
3537 *
3538 * SBST - Smart Battery Specification Table
3539 * Version 1
3540 *
3541 ******************************************************************************/
3542
3543typedef struct acpi_table_sbst
3544{
3545 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
3546 UINT32 WarningLevel;
3547 UINT32 LowLevel;
3548 UINT32 CriticalLevel;
3549
3551
3552
3553/*******************************************************************************
3554 *
3555 * SDEI - Software Delegated Exception Interface Descriptor Table
3556 *
3557 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
3558 * May 8th, 2017. Copyright 2017 ARM Ltd.
3559 *
3560 ******************************************************************************/
3561
3562typedef struct acpi_table_sdei
3563{
3564 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
3565
3567
3568
3569/*******************************************************************************
3570 *
3571 * SDEV - Secure Devices Table (ACPI 6.2)
3572 * Version 1
3573 *
3574 ******************************************************************************/
3575
3576typedef struct acpi_table_sdev
3577{
3578 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
3579
3581
3582
3583typedef struct acpi_sdev_header
3584{
3585 UINT8 Type;
3586 UINT8 Flags;
3587 UINT16 Length;
3588
3590
3591
3592/* Values for subtable type above */
3593
3594enum AcpiSdevType
3595{
3596 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
3597 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
3598 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
3599};
3600
3601/* Values for flags above */
3602
3603#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
3604#define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
3605
3606/*
3607 * SDEV subtables
3608 */
3609
3610/* 0: Namespace Device Based Secure Device Structure */
3611
3613{
3614 ACPI_SDEV_HEADER Header;
3615 UINT16 DeviceIdOffset;
3616 UINT16 DeviceIdLength;
3617 UINT16 VendorDataOffset;
3618 UINT16 VendorDataLength;
3619
3621
3623{
3624 UINT16 SecureComponentOffset;
3625 UINT16 SecureComponentLength;
3626
3628
3629
3630/*
3631 * SDEV sub-subtables ("Components") for above
3632 */
3634{
3635 ACPI_SDEV_HEADER Header;
3636
3638
3639
3640/* Values for sub-subtable type above */
3641
3642enum AcpiSacType
3643{
3644 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
3645 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
3646};
3647
3649{
3650 ACPI_SDEV_HEADER Header;
3651 UINT16 HardwareIdOffset;
3652 UINT16 HardwareIdLength;
3653 UINT16 SubsystemIdOffset;
3654 UINT16 SubsystemIdLength;
3655 UINT16 HardwareRevision;
3656 UINT8 HardwareRevPresent;
3657 UINT8 ClassCodePresent;
3658 UINT8 PciBaseClass;
3659 UINT8 PciSubClass;
3660 UINT8 PciProgrammingXface;
3661
3663
3665{
3666 ACPI_SDEV_HEADER Header;
3667 UINT32 Reserved;
3668 UINT64 MemoryBaseAddress;
3669 UINT64 MemoryLength;
3670
3672
3673
3674/* 1: PCIe Endpoint Device Based Device Structure */
3675
3676typedef struct acpi_sdev_pcie
3677{
3678 ACPI_SDEV_HEADER Header;
3679 UINT16 Segment;
3680 UINT16 StartBus;
3681 UINT16 PathOffset;
3682 UINT16 PathLength;
3683 UINT16 VendorDataOffset;
3684 UINT16 VendorDataLength;
3685
3687
3688/* 1a: PCIe Endpoint path entry */
3689
3691{
3692 UINT8 Device;
3693 UINT8 Function;
3694
3696
3697
3698/*******************************************************************************
3699 *
3700 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
3701 * From: "Guest-Host-Communication Interface (GHCI) for Intel
3702 * Trust Domain Extensions (Intel TDX)".
3703 * Version 1
3704 *
3705 ******************************************************************************/
3706
3707typedef struct acpi_table_svkl
3708{
3709 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
3710 UINT32 Count;
3711
3713
3714typedef struct acpi_svkl_key
3715{
3716 UINT16 Type;
3717 UINT16 Format;
3718 UINT32 Size;
3719 UINT64 Address;
3720
3722
3723enum acpi_svkl_type
3724{
3725 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
3726 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
3727};
3728
3729enum acpi_svkl_format
3730{
3731 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
3732 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
3733};
3734
3735
3736/*******************************************************************************
3737 *
3738 * TDEL - TD-Event Log
3739 * From: "Guest-Host-Communication Interface (GHCI) for Intel
3740 * Trust Domain Extensions (Intel TDX)".
3741 * September 2020
3742 *
3743 ******************************************************************************/
3744
3745typedef struct acpi_table_tdel
3746{
3747 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
3748 UINT32 Reserved;
3749 UINT64 LogAreaMinimumLength;
3750 UINT64 LogAreaStartAddress;
3751
3753
3754/* Reset to default packing */
3755
3756#pragma pack()
3757
3758#endif /* __ACTBL2_H__ */
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