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RTEMS 6.1-rc6
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25#ifndef _MIMXRT1166_cm4_FEATURES_H_
26#define _MIMXRT1166_cm4_FEATURES_H_
31#define FSL_FEATURE_SOC_ACMP_COUNT (4)
33#define FSL_FEATURE_SOC_AOI_COUNT (2)
35#define FSL_FEATURE_SOC_ASRC_COUNT (1)
37#define FSL_FEATURE_SOC_CAAM_COUNT (1)
39#define FSL_FEATURE_SOC_CAU_COUNT (1)
41#define FSL_FEATURE_SOC_CCM_COUNT (1)
43#define FSL_FEATURE_SOC_CSI_COUNT (1)
45#define FSL_FEATURE_SOC_CDOG_COUNT (1)
47#define FSL_FEATURE_SOC_DAC12_COUNT (1)
49#define FSL_FEATURE_SOC_DCDC_COUNT (1)
51#define FSL_FEATURE_SOC_DMAMUX_COUNT (1)
53#define FSL_FEATURE_SOC_EDMA_COUNT (1)
55#define FSL_FEATURE_SOC_EMVSIM_COUNT (2)
57#define FSL_FEATURE_SOC_ENC_COUNT (4)
59#define FSL_FEATURE_SOC_ENET_COUNT (2)
61#define FSL_FEATURE_SOC_EWM_COUNT (1)
63#define FSL_FEATURE_SOC_FLEXCAN_COUNT (3)
65#define FSL_FEATURE_SOC_FLEXIO_COUNT (2)
67#define FSL_FEATURE_SOC_FLEXRAM_COUNT (1)
69#define FSL_FEATURE_SOC_FLEXSPI_COUNT (2)
71#define FSL_FEATURE_SOC_GPT_COUNT (6)
73#define FSL_FEATURE_SOC_I2S_COUNT (4)
75#define FSL_FEATURE_SOC_IEE_COUNT (1)
77#define FSL_FEATURE_SOC_IGPIO_COUNT (15)
79#define FSL_FEATURE_SOC_IOMUXC_COUNT (1)
81#define FSL_FEATURE_SOC_IOMUXC_LPSR_COUNT (1)
83#define FSL_FEATURE_SOC_KPP_COUNT (1)
85#define FSL_FEATURE_SOC_LCDIF_COUNT (1)
87#define FSL_FEATURE_SOC_LMEM_COUNT (1)
89#define FSL_FEATURE_SOC_LPADC_COUNT (2)
91#define FSL_FEATURE_SOC_LPI2C_COUNT (6)
93#define FSL_FEATURE_SOC_LPSPI_COUNT (6)
95#define FSL_FEATURE_SOC_LPUART_COUNT (12)
97#define FSL_FEATURE_SOC_MCM_COUNT (1)
99#define FSL_FEATURE_SOC_MPU_COUNT (1)
101#define FSL_FEATURE_SOC_MU_COUNT (1)
103#define FSL_FEATURE_SOC_OCOTP_COUNT (1)
105#define FSL_FEATURE_SOC_OTFAD_COUNT (2)
107#define FSL_FEATURE_SOC_PDM_COUNT (1)
109#define FSL_FEATURE_SOC_PIT_COUNT (2)
111#define FSL_FEATURE_SOC_PWM_COUNT (4)
113#define FSL_FEATURE_SOC_PXP_COUNT (1)
115#define FSL_FEATURE_SOC_PUF_COUNT (1)
117#define FSL_FEATURE_SOC_RDC_COUNT (1)
119#define FSL_FEATURE_SOC_RDC_SEMAPHORE_COUNT (2)
121#define FSL_FEATURE_SOC_SEMA4_COUNT (1)
123#define FSL_FEATURE_SOC_SEMC_COUNT (1)
125#define FSL_FEATURE_SOC_SNVS_COUNT (1)
127#define FSL_FEATURE_SOC_SPDIF_COUNT (1)
129#define FSL_FEATURE_SOC_SRC_COUNT (1)
131#define FSL_FEATURE_SOC_TMR_COUNT (4)
133#define FSL_FEATURE_SOC_USBHS_COUNT (2)
135#define FSL_FEATURE_SOC_USBHSDCD_COUNT (2)
137#define FSL_FEATURE_SOC_USBNC_COUNT (2)
139#define FSL_FEATURE_SOC_USBPHY_COUNT (2)
141#define FSL_FEATURE_SOC_USDHC_COUNT (2)
143#define FSL_FEATURE_SOC_WDOG_COUNT (2)
145#define FSL_FEATURE_SOC_XBARA_COUNT (1)
147#define FSL_FEATURE_SOC_XBARB_COUNT (2)
149#define FSL_FEATURE_BOOT_ROM_HAS_ROMAPI (1)
154#define FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL (1)
156#define FSL_FEATURE_ADC_ETC_HAS_TRIGm_CHAIN_a_b_IEn_EN (1)
158#define FSL_FEATURE_ADC_ETC_HAS_NO_TSC0_TRIG (1)
160#define FSL_FEATURE_ADC_ETC_HAS_NO_TSC1_TRIG (1)
165#define FSL_FEATURE_AOI_MODULE_INPUTS (4)
167#define FSL_FEATURE_AOI_EVENT_COUNT (4)
172#define FSL_FEATURE_ASRC_PARAMETER_REGISTER_NAME_ASRPM (1)
177#define FSL_FEATURE_FLEXCAN_HAS_MESSAGE_BUFFER_MAX_NUMBERn(x) (64)
179#define FSL_FEATURE_FLEXCAN_HAS_DOZE_MODE_SUPPORT (1)
181#define FSL_FEATURE_FLEXCAN_INSTANCE_HAS_DOZE_MODE_SUPPORTn(x) (1)
183#define FSL_FEATURE_FLEXCAN_HAS_GLITCH_FILTER (1)
185#define FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER (1)
187#define FSL_FEATURE_FLEXCAN_INSTANCE_HAS_EXTENDED_TIMING_REGISTERn(x) (1)
189#define FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA (1)
191#define FSL_FEATURE_FLEXCAN_INSTANCE_HAS_RX_FIFO_DMAn(x) (1)
193#define FSL_FEATURE_FLEXCAN_SUPPORT_ENGINE_CLK_SEL_REMOVE (0)
195#define FSL_FEATURE_FLEXCAN_INSTANCE_SUPPORT_ENGINE_CLK_SEL_REMOVEn(x) (0)
197#define FSL_FEATURE_FLEXCAN_HAS_ERRATA_5641 (0)
199#define FSL_FEATURE_FLEXCAN_HAS_ERRATA_5829 (0)
201#define FSL_FEATURE_FLEXCAN_HAS_ERRATA_6032 (0)
203#define FSL_FEATURE_FLEXCAN_HAS_ERRATA_9595 (0)
205#define FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE (1)
207#define FSL_FEATURE_FLEXCAN_INSTANCE_HAS_FLEXIBLE_DATA_RATEn(x) (1)
209#define FSL_FEATURE_FLEXCAN_HAS_MEMORY_ERROR_CONTROL (1)
211#define FSL_FEATURE_FLEXCAN_INIT_MEMORY_BASE_1 (0x80)
213#define FSL_FEATURE_FLEXCAN_INIT_MEMORY_SIZE_1 (0xA60)
215#define FSL_FEATURE_FLEXCAN_INIT_MEMORY_BASE_2 (0xF28)
217#define FSL_FEATURE_FLEXCAN_INIT_MEMORY_SIZE_2 (0xD8)
219#define FSL_FEATURE_FLEXCAN_HAS_ENHANCED_BIT_TIMING_REG (0)
221#define FSL_FEATURE_FLEXCAN_HAS_PN_MODE (0)
223#define FSL_FEATURE_FLEXCAN_HAS_NO_SUPV_SUPPORT (0)
228#define FSL_FEATURE_CCM_HAS_ERRATA_50235 (0)
233#define FSL_FEATURE_CDOG_HAS_NO_RESET (1)
238#define FSL_FEATURE_IGPIO_HAS_DR_SET (1)
240#define FSL_FEATURE_IGPIO_HAS_DR_CLEAR (1)
242#define FSL_FEATURE_IGPIO_HAS_DR_TOGGLE (1)
247#define FSL_FEATURE_ACMP_HAS_C3_REG (1)
249#define FSL_FEATURE_ACMP_HAS_C0_LINKEN_BIT (1)
251#define FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT (0)
253#define FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT (0)
255#define FSL_FEATURE_ACMP_HAS_C1_INNSEL_BIT (0)
257#define FSL_FEATURE_ACMP_HAS_C1_DACOE_BIT (0)
259#define FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT (1)
261#define FSL_FEATURE_ACMP_HAS_C2_RRE_BIT (0)
266#define FSL_FEATURE_CSI_NO_REG_PREFIX (1)
271#define FSL_FEATURE_DAC12_HAS_NO_ITRM_REGISTER (1)
273#define FSL_FEATURE_DAC12_HAS_HW_TRIGGER (0)
278#define FSL_FEATURE_DCDC_HAS_CTRL_REG (1)
280#define FSL_FEATURE_DCDC_VDD_OUTPUT_COUNT (2)
282#define FSL_FEATURE_DCDC_HAS_NO_CURRENT_ALERT_FUNC (1)
284#define FSL_FEATURE_DCDC_HAS_SWITCHING_CONVERTER_DIFFERENTIAL_MODE (1)
286#define FSL_FEATURE_DCDC_HAS_REG0_DCDC_IN_DET (1)
288#define FSL_FEATURE_DCDC_HAS_NO_REG0_EN_LP_OVERLOAD_SNS (1)
290#define FSL_FEATURE_DCDC_HAS_REG3_FBK_SEL (1)
295#define FSL_FEATURE_EDMA_MODULE_CHANNEL (32)
297#define FSL_FEATURE_EDMA_DMAMUX_CHANNELS (32)
299#define FSL_FEATURE_EDMA_CHANNEL_GROUP_COUNT (1)
301#define FSL_FEATURE_EDMA_HAS_ERROR_IRQ (1)
303#define FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT (32)
305#define FSL_FEATURE_EDMA_MODULE_CHANNEL_IRQ_ENTRY_SHARED_OFFSET (16)
307#define FSL_FEATURE_EDMA_SUPPORT_8_BYTES_TRANSFER (1)
309#define FSL_FEATURE_EDMA_SUPPORT_16_BYTES_TRANSFER (0)
311#define FSL_FEATURE_EDMA_SUPPORT_32_BYTES_TRANSFER (1)
316#define FSL_FEATURE_DMAMUX_MODULE_CHANNEL (32)
318#define FSL_FEATURE_DMAMUX_DMAMUX_CHANNELS (64)
320#define FSL_FEATURE_DMAMUX_HAS_TRIG (1)
322#define FSL_FEATURE_DMAMUX_HAS_A_ON (1)
324#define FSL_FEATURE_DMAMUX_CHCFG_REGISTER_WIDTH (32)
329#define FSL_FEATURE_MIPI_DSI_HAS_SEPARATE_SUBMODULE (1)
334#define FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT (0)
336#define FSL_FEATURE_ENC_HAS_CTRL3 (1)
338#define FSL_FEATURE_ENC_HAS_LASTEDGE (1)
340#define FSL_FEATURE_ENC_HAS_POSDPER (1)
345#define FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE (1)
347#define FSL_FEATURE_ENET_QUEUE (3)
349#define FSL_FEATURE_ENET_HAS_AVB (1)
351#define FSL_FEATURE_ENET_HAS_TIMER_PWCONTROL (1)
353#define FSL_FEATURE_ENET_HAS_EXTEND_MDIO (1)
355#define FSL_FEATURE_ENET_HAS_ADD_1588_TIMER_CHN_INT (1)
357#define FSL_FEATURE_ENET_INSTANCE_HAS_INTERRUPT_COALESCEn(x) (1)
359#define FSL_FEATURE_ENET_INSTANCE_QUEUEn(x) \
360 (((x) == ENET) ? (1) : \
361 (((x) == ENET_1G) ? (3) : (-1)))
363#define FSL_FEATURE_ENET_INSTANCE_HAS_AVBn(x) \
364 (((x) == ENET) ? (0) : \
365 (((x) == ENET_1G) ? (1) : (-1)))
367#define FSL_FEATURE_ENET_INSTANCE_HAS_TIMER_PWCONTROLn(x) \
368 (((x) == ENET) ? (1) : \
369 (((x) == ENET_1G) ? (0) : (-1)))
371#define FSL_FEATURE_ENET_INSTANCE_HAS_EXTEND_MDIOn(x) (1)
373#define FSL_FEATURE_ENET_INSTANCE_HAS_ADD_1588_TIMER_CHN_INTn(x) (1)
375#define FSL_FEATURE_ENET_HAS_RECEIVE_STATUS_THRESHOLD (1)
377#define FSL_FEATURE_ENET_HAS_RGMII_TXC_DELAY (1)
379#define FSL_FEATURE_ENET_HAS_RGMII_RXC_DELAY (0)
381#define FSL_FEATURE_ENET_TIMESTAMP_CAPTURE_BIT_INVALID (0)
383#define FSL_FEATURE_ENET_HAS_EXTRA_CLOCK_GATE (0)
388#define FSL_FEATURE_EWM_HAS_CLOCK_SELECT (1)
390#define FSL_FEATURE_EWM_HAS_PRESCALER (1)
395#define FSL_FEATURE_FLEXIO_HAS_SHIFTER_STATUS (1)
397#define FSL_FEATURE_FLEXIO_HAS_PIN_STATUS (1)
399#define FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP (1)
401#define FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP (1)
403#define FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP (1)
405#define FSL_FEATURE_FLEXIO_HAS_STATE_MODE (1)
407#define FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE (1)
409#define FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH (1)
411#define FSL_FEATURE_FLEXIO_VERID_RESET_VALUE (0x2000001)
413#define FSL_FEATURE_FLEXIO_PARAM_RESET_VALUE (0x2200808)
415#define FSL_FEATURE_FLEXIO_TIMCFG_TIMDCE_FIELD_WIDTH (3)
417#define FSL_FEATURE_FLEXIO_DMA_REQUEST_BASE_CHANNEL (0)
422#define FSL_FEATURE_FLEXRAM_INTERNAL_RAM_BANK_SIZE (32768)
424#define FSL_FEATURE_FLEXRAM_INTERNAL_RAM_TOTAL_BANK_NUMBERS (16)
426#define FSL_FEATURE_FLEXRAM_HAS_MAGIC_ADDR (1)
428#define FSL_FEATURE_FLEXRAM_HAS_ECC (0)
433#define FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNTn(x) (8)
435#define FSL_FEATURE_FLEXSPI_HAS_NO_DATA_LEARN (1)
437#define FSL_FEATURE_FLEXSPI_HAS_INTEN_AHBBUSERROREN (1)
439#define FSL_FEATURE_FLEXSPI_HAS_AHBCR_CLRAHBTX_RXBUF (0)
441#define FSL_FEATURE_FLEXSPI_HAS_NO_IP_PARALLEL_MODE (0)
443#define FSL_FEATURE_FLEXSPI_HAS_NO_AHB_PARALLEL_MODE (0)
445#define FSL_FEATURE_FLEXSPI_SUPPORT_ADDRESS_SHIFT (0)
458#define FSL_FEATURE_PUF_PWR_HAS_MANUAL_SLEEP_CONTROL (1)
460#define FSL_FEATURE_PUF_HAS_SHIFT_STATUS (0)
462#define FSL_FEATURE_PUF_HAS_IDXBLK_SHIFT (1)
464#define FSL_FEATURE_PUF_HAS_NO_RESET (1)
469#define FSL_FEATURE_LCDIF_HAS_NO_AS (1)
471#define FSL_FEATURE_LCDIF_HAS_NO_RESET_PIN (1)
473#define FSL_FEATURE_LCDIF_HAS_LUT (1)
478#define FSL_FEATURE_LCDIFV2_CLUT_RAM_OFFSET (0x2000)
480#define FSL_FEATURE_LCDIFV2_INT_DOMAIN_COUNT (2)
482#define FSL_FEATURE_LCDIFV2_LAYER_COUNT (8)
484#define FSL_FEATURE_LCDIFV2_LAYER_CSC_COUNT (2)
489#define FSL_FEATURE_LMEM_HAS_SYSTEMBUS_CACHE (1)
491#define FSL_FEATURE_HAS_L1CACHE (1)
493#define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (32)
495#define FSL_FEATURE_L1DCACHE_LINESIZE_BYTE (32)
500#define FSL_FEATURE_LPADC_FIFO_COUNT (1)
502#define FSL_FEATURE_LPADC_HAS_CFG_SUBSEQUENT_PRIORITY (1)
504#define FSL_FEATURE_LPADC_HAS_CMDL_DIFF (1)
506#define FSL_FEATURE_LPADC_HAS_CMDL_CSCALE (1)
508#define FSL_FEATURE_LPADC_HAS_CMDL_CTYPE (0)
510#define FSL_FEATURE_LPADC_HAS_CMDL_MODE (0)
512#define FSL_FEATURE_LPADC_HAS_CMDH_WAIT_TRIG (0)
514#define FSL_FEATURE_LPADC_HAS_CTRL_CALOFS (0)
516#define FSL_FEATURE_LPADC_HAS_CTRL_CAL_REQ (0)
518#define FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS (0)
520#define FSL_FEATURE_LPADC_HAS_CFG_ADCKEN (0)
522#define FSL_FEATURE_LPADC_HAS_CFG_VREF1RNG (0)
524#define FSL_FEATURE_LPADC_HAS_CFG_CALOFS (0)
526#define FSL_FEATURE_LPADC_HAS_OFSTRIM (0)
528#define FSL_FEATURE_LPADC_HAS_CFG_PWRSEL (1)
530#define FSL_FEATURE_LPADC_HAS_CMDL_ALTB_CSCALE (0)
532#define FSL_FEATURE_LPADC_HAS_CMDL_ALTBEN (0)
534#define FSL_FEATURE_LPADC_HAS_CMDL_ALTB_ADCH (0)
536#define FSL_FEATURE_LPADC_HAS_CTRL_CALOFSMODE (0)
538#define FSL_FEATURE_LPADC_CONVERSIONS_AVERAGED_BITFIELD_WIDTH (3)
540#define FSL_FEATURE_LPADC_HAS_TCTRL_CMD_SEL (1)
545#define FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(x) (0)
547#define FSL_FEATURE_LPI2C_FIFO_SIZEn(x) (4)
552#define FSL_FEATURE_LPSPI_FIFO_SIZEn(x) (16)
554#define FSL_FEATURE_LPSPI_HAS_SEPARATE_DMA_RX_TX_REQn(x) (1)
556#define FSL_FEATURE_LPSPI_HAS_CCR1 (0)
561#define FSL_FEATURE_LPUART_HAS_IRQ_EXTENDED_FUNCTIONS (0)
563#define FSL_FEATURE_LPUART_HAS_LOW_POWER_UART_SUPPORT (1)
565#define FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS (1)
567#define FSL_FEATURE_LPUART_HAS_FIFO (1)
569#define FSL_FEATURE_LPUART_HAS_MODIR (1)
571#define FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT (1)
573#define FSL_FEATURE_LPUART_HAS_IR_SUPPORT (1)
575#define FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT (1)
577#define FSL_FEATURE_LPUART_HAS_10BIT_DATA_SUPPORT (1)
579#define FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT (1)
581#define FSL_FEATURE_LPUART_HAS_BAUD_RATE_FINE_ADJUST_SUPPORT (0)
583#define FSL_FEATURE_LPUART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT (1)
585#define FSL_FEATURE_LPUART_HAS_RX_RESYNC_SUPPORT (1)
587#define FSL_FEATURE_LPUART_HAS_BOTH_EDGE_SAMPLING_SUPPORT (1)
589#define FSL_FEATURE_LPUART_IS_SCI (1)
591#define FSL_FEATURE_LPUART_FIFO_SIZEn(x) (4)
593#define FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING (1)
595#define FSL_FEATURE_LPUART_HAS_DMA_ENABLE (1)
597#define FSL_FEATURE_LPUART_HAS_DMA_SELECT (0)
599#define FSL_FEATURE_LPUART_HAS_BIT_ORDER_SELECT (1)
601#define FSL_FEATURE_LPUART_HAS_SMART_CARD_SUPPORT (0)
603#define FSL_FEATURE_LPUART_HAS_IMPROVED_SMART_CARD_SUPPORT (0)
605#define FSL_FEATURE_LPUART_HAS_LOCAL_OPERATION_NETWORK_SUPPORT (0)
607#define FSL_FEATURE_LPUART_HAS_32BIT_REGISTERS (1)
609#define FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT (1)
611#define FSL_FEATURE_LPUART_HAS_WAIT_MODE_OPERATION (0)
613#define FSL_FEATURE_LPUART_HAS_SEPARATE_DMA_RX_TX_REQn(x) (1)
615#define FSL_FEATURE_LPUART_HAS_SEPARATE_RX_TX_IRQ (0)
617#define FSL_FEATURE_LPUART_HAS_PARAM (1)
619#define FSL_FEATURE_LPUART_HAS_VERID (1)
621#define FSL_FEATURE_LPUART_HAS_GLOBAL (1)
623#define FSL_FEATURE_LPUART_HAS_PINCFG (1)
628#define FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET (1)
633#define FSL_FEATURE_CSI2RX_HAS_NO_REG_PREFIX (1)
638#define FSL_FEATURE_MU_SIDE_B (1)
640#define FSL_FEATURE_MU_HAS_CCR (0)
642#define FSL_FEATURE_MU_HAS_SR_RS (1)
644#define FSL_FEATURE_MU_HAS_RESET_INT (0)
646#define FSL_FEATURE_MU_HAS_SR_MURIP (0)
648#define FSL_FEATURE_MU_HAS_SR_HRIP (0)
650#define FSL_FEATURE_MU_NO_CLKE (1)
652#define FSL_FEATURE_MU_NO_NMI (1)
654#define FSL_FEATURE_MU_NO_RSTH (1)
656#define FSL_FEATURE_MU_NO_MUR (1)
658#define FSL_FEATURE_MU_NO_HR (1)
660#define FSL_FEATURE_MU_HAS_HRM (0)
662#define FSL_FEATURE_MU_NO_PM (1)
664#define FSL_FEATURE_MU_HAS_RESET_ASSERT_INT (0)
666#define FSL_FEATURE_MU_HAS_RESET_DEASSERT_INT (0)
671#define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14)
673#define FSL_FEATURE_INTERRUPT_IRQ_MAX (105)
678#define FSL_FEATURE_OCOTP_HAS_TIMING_CTRL (0)
680#define FSL_FEATURE_OCOTP_HAS_WORDLOCK (1)
685#define FSL_FEATURE_PDM_FIFO_OFFSET (4)
687#define FSL_FEATURE_PDM_CHANNEL_NUM (8)
689#define FSL_FEATURE_PDM_FIFO_WIDTH (4)
691#define FSL_FEATURE_PDM_FIFO_DEPTH (8)
693#define FSL_FEATURE_PDM_HAS_RANGE_CTRL (1)
695#define FSL_FEATURE_PDM_HAS_STATUS_LOW_FREQ (1)
697#define FSL_FEATURE_PDM_HIGH_QUALITY_CLKDIV_FACTOR (93)
699#define FSL_FEATURE_PDM_VERY_LOW_QUALITY_CLKDIV_FACTOR (43)
701#define FSL_FEATURE_PDM_HAS_NO_VADEF (0)
706#define FSL_FEATURE_PIT_TIMER_COUNT (4)
708#define FSL_FEATURE_PIT_HAS_LIFETIME_TIMER (1)
710#define FSL_FEATURE_PIT_HAS_CHAIN_MODE (1)
712#define FSL_FEATURE_PIT_HAS_SHARED_IRQ_HANDLER (1)
714#define FSL_FEATURE_PIT_HAS_MDIS (1)
719#define FSL_FEATURE_PWM_HAS_CHANNELA (1)
721#define FSL_FEATURE_PWM_HAS_CHANNELB (1)
723#define FSL_FEATURE_PWM_HAS_CHANNELX (1)
725#define FSL_FEATURE_PWM_HAS_FRACTIONAL (1)
727#define FSL_FEATURE_PWM_HAS_MUX_TRIGGER_SOURCE_SEL (1)
729#define FSL_FEATURE_PWM_SUBMODULE_COUNT (4U)
731#define FSL_FEATURE_PWM_FAULT_CH_COUNT (1)
736#define FSL_FEATURE_PXP_HAS_DITHER (0)
738#define FSL_FEATURE_PXP_HAS_EN_REPEAT (1)
740#define FSL_FEATURE_PXP_HAS_NO_CSC2 (1)
742#define FSL_FEATURE_PXP_HAS_NO_LUT (1)
747#define FSL_FEATURE_RTWDOG_HAS_WATCHDOG (1)
749#define FSL_FEATURE_RTWDOG_HAS_32BIT_ACCESS (1)
754#define FSL_FEATURE_SAI_HAS_FIFO (1)
756#define FSL_FEATURE_SAI_FIFO_COUNTn(x) (32)
758#define FSL_FEATURE_SAI_CHANNEL_COUNTn(x) \
759 (((x) == SAI1) ? (4) : \
760 (((x) == SAI2) ? (1) : \
761 (((x) == SAI3) ? (1) : \
762 (((x) == SAI4) ? (1) : (-1)))))
764#define FSL_FEATURE_SAI_MAX_WORDS_PER_FRAME (32)
766#define FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE (1)
768#define FSL_FEATURE_SAI_HAS_FIFO_PACKING (1)
770#define FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR (1)
772#define FSL_FEATURE_SAI_HAS_ON_DEMAND_MODE (1)
774#define FSL_FEATURE_SAI_HAS_CLOCKING_MODE (0)
776#define FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER (0)
778#define FSL_FEATURE_SAI_INT_SOURCE_NUM (2)
780#define FSL_FEATURE_SAI_HAS_MCR (0)
782#define FSL_FEATURE_SAI_HAS_NO_MCR_MICS (1)
784#define FSL_FEATURE_SAI_HAS_MDR (0)
786#define FSL_FEATURE_SAI_HAS_BCLK_BYPASS (1)
788#define FSL_FEATURE_SAI_HAS_MCR_MCLK_POST_DIV (0)
790#define FSL_FEATURE_SAI_HAS_CHANNEL_MODE (1)
795#define FSL_FEATURE_SEMC_HAS_NOR_WDH_TIME (0)
797#define FSL_FEATURE_SEMC_HAS_NOR_WDS_TIME (0)
799#define FSL_FEATURE_SEMC_HAS_NOR_LC_TIME (1)
801#define FSL_FEATURE_SEMC_HAS_NOR_RD_TIME (1)
803#define FSL_FEATURE_SEMC_HAS_SRAM_WDH_TIME (1)
805#define FSL_FEATURE_SEMC_HAS_SRAM_WDS_TIME (1)
807#define FSL_FEATURE_SEMC_HAS_SRAM_LC_TIME (1)
809#define FSL_FEATURE_SEMC_HAS_SRAM_RD_TIME (1)
811#define FSL_FEATURE_SEMC_SUPPORT_SRAM_COUNT (4)
813#define FSL_FEATURE_SEMC_HAS_DELAY_CHAIN_CONTROL (1)
815#define FSL_FEATURE_SEMC_HAS_SRAM_RDH_TIME (1)
817#define FSL_FEATURE_SEMC_SUPPORT_SDRAM_PS_BITWIDTH (2)
819#define FSL_FEATURE_SEMC_ERRATA_050577 (0)
821#define FSL_FEATURE_SEMC_SDRAM_SUPPORT_COLUMN_ADDRESS_8BIT (1)
823#define FSL_FEATURE_SEMC_HAS_DBICR2 (1)
825#define FSL_FEATURE_SEMC_HAS_NAND_HW_ECC (0)
830#define FSL_FEATURE_SNVS_HAS_SRTC (1)
832#define FSL_FEATURE_SNVS_PASSIVE_TAMPER_FILTER (0)
834#define FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS (0)
836#define FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER (0)
849#define FSL_FEATURE_TMPSNS_HAS_AI_INTERFACE (1)
854#define FSL_FEATURE_USBPHY_HAS_DCD_ANALOG (0)
856#define FSL_FEATURE_USBPHY_HAS_TRIM_OVERRIDE_EN (1)
858#define FSL_FEATURE_USBPHY_28FDSOI (1)
863#define FSL_FEATURE_USBHS_EHCI_COUNT (2)
865#define FSL_FEATURE_USBHS_ENDPT_COUNT (8)
870#define FSL_FEATURE_USDHC_HAS_EXT_DMA (0)
872#define FSL_FEATURE_USDHC_HAS_HS400_MODE (1)
874#define FSL_FEATURE_USDHC_HAS_SDR50_MODE (1)
876#define FSL_FEATURE_USDHC_HAS_SDR104_MODE (1)
878#define FSL_FEATURE_USDHC_HAS_RESET (0)
880#define FSL_FEATURE_USDHC_HAS_NO_RW_BURST_LEN (1)
882#define FSL_FEATURE_USDHC_INSTANCE_SUPPORT_8_BIT_WIDTHn(x) \
883 (((x) == USDHC1) ? (0) : \
884 (((x) == USDHC2) ? (1) : (-1)))
886#define FSL_FEATURE_USDHC_INSTANCE_SUPPORT_HS400_MODEn(x) (1)
888#define FSL_FEATURE_USDHC_INSTANCE_SUPPORT_1V8_SIGNALn(x) (1)
890#define FSL_FEATURE_USDHC_REGISTER_HOST_CTRL_CAP_HAS_NO_RETUNING_TIME_COUNTER (1)
895#define FSL_FEATURE_XBARA_INTERRUPT_COUNT (4)
900#define FSL_FEATURE_XRDC2_DOMAIN_COUNT (16)